An Energy-Efficient Hypervisor Scheduler for Asymmetric Multi- core 1 Ching-Chi Lin Institute of...
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Transcript of An Energy-Efficient Hypervisor Scheduler for Asymmetric Multi- core 1 Ching-Chi Lin Institute of...
An Energy-Efficient Hypervisor Scheduler for Asymmetric Multi-core
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Ching-Chi LinInstitute of Information Science, Academia Sinica
Department of Computer Science and Information Engineering, National Taiwan University
You-Cheng Syu, Pangfeng LiuDepartment of Computer Science and Information Engineering, National Taiwan University
Graduate Institute of Networking and Multimedia, Nation Taiwan University
Chao-Jui Chang, Jan-Jan WuInstitute of Information Science, Academia Sinica
Research Center for Information Technology Innovation, Academia Sinica
Po-Wen Cheng, Wei-Te HsuInformation and Communications Research Laboratories, Industrial Technology Research Institute
BackgroundAsymmetric multi-core architecture.
◦Consists of cores with different capabilities. ARM: big.LITTLE architecture. Qualcomm: asynchronous Symmetrical Multi-
Processing (aSMP) Nvidia: variable Symmetric Multiprocessing
(vSMP) …etc.
◦Aim to achieve both performance and energy-efficient. CPU-intensive v.s. non-CPU-intensive
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MotivationDifferent scheduling goals
between homogenous and asymmetric multi-core platforms.◦Homogeneous multi-core: load-
balancing. Distributes workloads evenly to obtain
maximum performance.
◦Asymmetric multi-core: maximize power efficiency with modest performance sacrifices.
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Hypervisor SchedulerAssigns the virtual cores to
physical cores for execution.◦Determines the execution order and
amount of time assigned to each virtual core according to a scheduling policy.
◦Current solutions Xen - credit-based scheduler KVM - completely fair scheduler
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OS Kernel
GUEST2
Scheduler
VCPU VCPU
OS Kernel
GUEST2
Scheduler
VCPU VCPU
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ARM Cortex-A15
ARM Cortex-A7
OS Kernel
GUEST1
Scheduler
VCPU VCPU
Hypervisor
vCPU Scheduler
Performance Power-saving
Low computing resource requirement
High computing resource requirement
If Guest OS scheduler is not asymmetric-aware, it will assign tasks to vCPUs evenly in order to achieve load balancing.
Task 1
Task 2
Task 3
Task 4
Hypervisor vCPU scheduler will assign vCPUs evenly to physical ARM cores since it is not asymmetric-aware.
Cannot take advantage on
big.LITTLE core architeture
Current Hypervisor Architecture and Problem
OS Kernel
GUEST2
Scheduler
VCPU VCPU
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ARM Cortex-A15
ARM Cortex-A7
OS Kernel
GUEST1
Scheduler
VCPU VCPU
Hypervisor
vCPU Scheduler
Performance Power-saving
Assume that the scheduler in the Guest OS is asymmetric-aware.
Hypervisor vCPU scheduler will assign vCPUs evenly to physical ARM cores in order to achieve load-balancing.
Cannot take advantage on
big.LITTLE core architeture
Current Hypervisor Architecture and Problem(Cont.)
VCPUVCPU VCPUVCPUWaste energyPerformance Degradation
GoalDesign a new hypervisor
scheduling mechanism for asymmetric multi-core platform.◦Periodically generates an energy-
efficient scheduling plan. the amount of time each virtual core
should run on each physical core.
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AssumptionsThe scheduling mechanism in the
guest OS is already asymmetry-aware.
The hypervisor is aware of the frequency of each virtual core.
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Virtual Core Scheduling Problem
For every time period, given the operating frequency of each virtual core, the scheduler has to generate a scheduling plan such that◦The power consumption is minimized.◦Guarantee performance.
Scheduling plan◦the amount of time each virtual core
should run on each physical core.10
ModelTwo types of cores – virtual cores
and physical cores.
Power consumption of a physical core◦a function of core type, core
frequency, and the load of the core. Load: the percentage of time a core is
executing virtual cores.
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PerformanceA ratio between the computing
resource assigned, to the computing resource requested.◦Ex: request 800 CPU cycles, assign
to 720 CPU cycles, the performance is 720/800 = 0.9.
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Optimization ProblemObjective function:
n: number of physical core
Generate a scheduling plan◦ai,j:the amount of time executing
virtual core j on physical core i.◦Some constraints.
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)min(1
n
iiPower
ConstraintsEqual performance of each
virtual core.◦Resource sufficient: all virtual core
with performance = 1.◦Resource insufficient: all virtual core
with equal performance less than 1.
Time assign to a virtual core should be less than a time interval.
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Constraints(Cont.)A physical core has a fixed
amount of computing resources in a time interval.◦Load of a physical core ≦ 100%.
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Our SolutionGiven the objective function and
constraints.Apply linear programming to
generate a feasible scheduling plan.◦Can find solution in a short time
since the number of virtual and physical cores are small constants.
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SimulationCompare the power consumption
of our asymmetry-aware scheduler with that of a credit-based scheduler.
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Simulation EnvironmentTwo types of physical cores
◦power-hunger “big” cores frequency: 1600MHz
◦power-efficient “little” cores frequency: 600MHz
◦The DVFS mechanism is disabled.
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ScenarioTwo “big” and two “little’’ cores.Dual-core VM.Two sets of input:
◦Case 1: Both VMs with light workloads. 250MHz for each virtual core.
◦Case 2: One VM with heavy workloads, the other with modest workloads. Heavy:1200MHz for each virtual core Modest:600MHz for each virtual core.
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Simulation Results
◦Case 1: asymmetry-aware method is about 43.2% of that of credit-based method.
◦Case 2:asymmetry-aware method uses 95.6% of energy used by the credit-base method.
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Power(Watt)
Case 1Light-load VMs
Asymmetry-aware 0.295
Credit-based 0.683
Case 2Heavy-load VM + Modest-load
VM
Asymmetry-aware 2.382
Credit-based 2.491
SummaryWe develop an energy-efficient
asymmetry-aware scheduling mechanism for asymmetric multi-core platforms.◦Generate energy-efficient scheduling
plans with performance guarantee.Simulation results show that the
asymmetry-aware strategy saves up to 57.2% energy against credit-based method.
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