An Efficient IP Lookup Architecture with Fast Update Using Single-Match TCAMs

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An Efficient IP Lookup A rchitecture with Fast Up date Using Single-Match TCAMs Author: Jinsoo Kim, Junghwan Kim Publisher: WWIC 2008 Presenter: Chen-Yu Chaug Date: 2008/11/12

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An Efficient IP Lookup Architecture with Fast Update Using Single-Match TCAMs. Author: Jinsoo Kim, Junghwan Kim Publisher: WWIC 2008 Presenter: Chen-Yu Chaug Date: 2008/11/12. Outline. Introduction Related work Propose IP Lookup Architecture IP Lookup and Update Algorithms - PowerPoint PPT Presentation

Transcript of An Efficient IP Lookup Architecture with Fast Update Using Single-Match TCAMs

Page 1: An Efficient IP Lookup Architecture with Fast Update Using Single-Match TCAMs

An Efficient IP Lookup Architecture with Fast Update Using Single-Match TCAMs

Author: Jinsoo Kim, Junghwan KimPublisher: WWIC 2008Presenter: Chen-Yu ChaugDate: 2008/11/12

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Introduction(1/4)

Most of the IP lookup schemes can be classified into software approaches based on trie and hardware approaches based on TCAM (Ternary Content Addressable Memory).

Trie-based IP lookup schemes usually require several memory accesses. In contrast, TCAM can perform a lookup operation in a single cycle owing to its parallel access characteristics. Therefore, TCAM have been paid much attention to in recent years.

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Introduction(2/4)

There may be several matches in an IP lookup operation, it is required to determine the best match, i.e., LMP.

For the determination of the LMP, all prefixes of a TCAM needs to be ordered by some criteria such as length. Under the ordered circumstance a priority encoder can select the LMP on the uppermost location among all matched prefixes.

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Introduction(3/4)

Most of TCAM-based lookup schemes need several movements of prefix entries for a single update because the ordering must be maintained in the TCAMs.

Therefore, frequent updates may consume many computation cycles in the IP lookup engine and result in the degradation of the lookup performance.

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Introduction(4/4)

In this paper, we present a new architecture to provide fast update by using single-match TCAMs.

Our algorithms guarantee that each single-match TCAM generates at most one match for a given destination address. So, it can eliminate both the ordering constraint and the priority encoder in a single-match TCAM, which makes the update fast.

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Ordering constraint

Prefix-length ordering constraint: Two prefixes of the same length don’t need to be

in any specific order. L-algorithm PLO_OPT

Chain-ancestor ordering constraint There’s an ordering constraint between two

prefixes if and only if one is a prefix of the other. CAO_OPT

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L-algorithm

Two prefix in the same length can be in any order.

L-algorithm, that can create an empty space in a TCAM in no morethan L memory shifts (recall that L = 32 ).

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PLO_OPT

The basic idea of the PLO_OPT algorithm is to keep all the unused entries in the center of the TCAM.

PLO_OPT brings down the worst-case number of memoryoperations per update to L/2.

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Better Algorithm ?

8

15

29

31

P1

P2

P3

P4

P2 has no ordering constraint with P3 or P4.

Maximal chain

PLO constraint is too Restrictive than needed.

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CAO_OPT(1/2)

The CAO_OPT algorithm also keeps the free space pool in the center of the TCAM.

Basic idea: for every prefix, the longest chain that this prefix belongs to should be split around the free space pool as equally as possible.

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CAO_OPT(2/2)

P1

P2P3

P4

P4 < P3 < P1, P2 < P1

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Summary of Simulation Results

Algorithm L-algo PLO_OPT CAO_OPT

Average 7.27 4.098 1.015

Standard deviation

4.09 2.03 0.01

Worst Case 21 12 3

MAE-Est

Entries 43344

Isertion 34204

Deletion 9140

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Conventional TCAM-Based Architecture Conventional TCAM-based IP Lookup architecture

in PLO (prefix length order).

PriorityEncoder

Location 0

1

2

3

4

5

6

103.23.122.7 P1

P1 103.23.122/23 171.3.2.22

P2

P3

P4

P5

103.23/16

101.1/16

101.20/13

100/9

171.3.2.4

120.33.32.98

320.3.3.1

10.0.0.111

Prefix Next-hop1

1

0

0

0

0

0

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Design of the Proposed Architecture(1/4) The maximum number of matched entries in a TCAM d

epends on the maximum depth of levels of the prefix search trie.

The maximum length of any chain currently does not exceed 7, so there can be at most 7 matches.

If the forwarding table is partitioned into several TCAMs so that there is no ancestor-descendant relation in each partitioned TCAM, then it is guaranteed that there exists at most one match in each TCAM.

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Design of the Proposed Architecture(2/4) Proposed IP Lookup Architecture

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Design of the Proposed Architecture(3/4) Each of TCAM0 to TCAM6 should contain a disjoint set

of prefixes. So the result of lookup for a given IP address will be no more than one match in each TCAM.

Obviously, the single-match TCAMs don’t have priority encoder logic.

The selection logic selects longest one among those matches by using length data and sends out the corresponding output port number.

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Design of the Proposed Architecture(4/4) In case that there is no suitable singlematch TCAM for

a new inserting prefix, the conventional TCAM will be assigned.

Ex: There are only two single-match TCAMs and two disjoint prefixes p1=10100* and p2 = 1011* are stored in different single-match TCAMs. Then there is no way to insert a new prefix, p8=10* into any of the single-match TCAMs without moving an existing prefix.

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Search algorithm Ex: 10100100

P1(10100*),10 P7(00*),15TCAM0

TCAM1

TCAM2

TCAM5

TCAM3

TCAM4

P2(1011*),11 P4(010*),13

P3(1110*),11

P5(100*),14

P6(110*),14

P10(0*),18 P8(10*),16

TCAM6 P9(11*),17

SelectionLogic

P1,5

P8,2

10

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Insertion algorithm(1/3) Ex: 101*

P1(10100*),10 P7(00*),15TCAM0

TCAM1

TCAM2

TCAM5

TCAM3

TCAM4

P2(1011*),11 P4(010*),13

P3(1110*),11

P5(100*),14

P6(110*),14

P10(0*),18 P8(10*),16

TCAM6 P9(11*),17

P9(11*),17 TCAM7

Conventional TCAM

101*

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← true

Available[0] ← true

Available[0] ← true

Available[0] ← true

Randomly Insertion

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Insertion algorithm(2/3) Ex: 1*

P1(10100*),10 P7(00*),15TCAM0

TCAM1

TCAM2

TCAM5

TCAM3

TCAM4

P2(1011*),11 P4(010*),13

P3(1110*),11

P5(100*),14

P6(110*),14

P10(0*),18 P8(10*),16

TCAM6 P9(11*),17

TCAM7

Conventional TCAM

1*

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Available[0] ← false

Insert to TCAM7

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Insertion algorithm(3/3)

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Deletion algorithm

For the prefix deletion it is needed to determine which TCAM contains the prefix p (As shown in line 1).

Then the prefix can be deleted from the TCAM (As show in line 2).

The function delete_from() is performed differently whether it operates on conventional TCAM or single-match TCAM.

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Simulation Environment(1/2)

In our simulation we used routing tables from Route Views[9].

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Simulation Environment(2/2)

Comparison of Memory Movements

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Simulation Results(1/3)

Memory Movements per Update

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Simulation Results(2/3)

The Number of Prefixes in Each TCAM

0.33%

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Simulation Results(3/3)

Insertions and Deletions

0.19% and 0.18%

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Discussion

The updating performance is related to two factors The number of updates in the conventional TCAM. The number of deletions in the single -match TCAMs.

The simulation results show that the number of updates in the conventional TCAM is quite small.

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Outline

Introduction

Related work

Propose IP Lookup Architecture

IP Lookup and Update Algorithms

Performance Evaluation

Conclusion

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Conclusion

Novel assignment strategies for prefix insertion should be developed and evaluated in further research.

The design of the hardware to eliminate memory movements also remains for future work.