An Efficient Algorithm to Verify Generalized False Paths

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An Efficient Algorithm to Verify An Efficient Algorithm to Verify Generalized False Paths Generalized False Paths Olivier Coudert Olivier Coudert OC Consulting, Germany OC Consulting, Germany Mentor Graphics, San Jose, CA Mentor Graphics, San Jose, CA June 15, June 15, 2010 2010 ocoudert.com

Transcript of An Efficient Algorithm to Verify Generalized False Paths

Page 1: An Efficient Algorithm to Verify Generalized False Paths

An Efficient Algorithm to Verify An Efficient Algorithm to Verify Generalized False PathsGeneralized False Paths

Olivier CoudertOlivier Coudert

OC Consulting, GermanyOC Consulting, GermanyMentor Graphics, San Jose, CAMentor Graphics, San Jose, CA

June 15,June 15, 20102010

ocoudert.com

Page 2: An Efficient Algorithm to Verify Generalized False Paths

SummarySummary

False pathFalse path

Static (co-)sensitization Static (co-)sensitization

Generalized false pathGeneralized false path

Incremental (co-)sensitization functionIncremental (co-)sensitization function

Experimental resultsExperimental results

ConclusionConclusion

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c

A

B

D

xy

foo

False pathFalse path

if (if (cc) ) xx = = AA else else xx = = BB;;DD = foo( = foo(AA, …);, …);if (if (cc) ) yy = = DD else else yy = = xx;;

set_false_path –from set_false_path –from AA –through –through xx –to –to yy

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False pathFalse path

Used to remove pessimism from STAUsed to remove pessimism from STA More accurate timing pictureMore accurate timing picture Lead to better optimizationLead to better optimization

Missing false pathMissing false path Over constrained designOver constrained design Bloated areaBloated area

Incorrect false pathIncorrect false path Miss target timingMiss target timing May lead to chip failureMay lead to chip failure

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PathPath

Side inputSide input

Controlling valueControlling value

Controlled valueControlled value

Notations and assumptionsNotations and assumptions

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Static sensitizationStatic sensitization

All side inputs are non controllingAll side inputs are non controlling

Static sensitizable true pathStatic sensitizable true path

0

0

1

1

0

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Static sensitizationStatic sensitization

1

10

10

conflict

Not statically sensitizableNot statically sensitizable

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Not statically sensitizableNot statically sensitizable

……but a true path (because of glitch)but a true path (because of glitch)

Static sensitizationStatic sensitization

0

0

0

d

d

2d

2d 3d

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Static co-sensitizationStatic co-sensitization

Whenever a gate is controlled, the on-pin is Whenever a gate is controlled, the on-pin is controllingcontrolling

Non statically co-sensitizable false pathNon statically co-sensitizable false path

10

0

1conflict

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Decision criteriaDecision criteria

Statically Statically sensitizablesensitizable

Statically co-Statically co-sensitizablesensitizable Path typePath type

sensitizable co-sensitizablesensitizable co-sensitizable

yesyes

nono

truetrue

falsefalse

undecidedundecidedyesyesnono

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Generalized false pathGeneralized false path

All paths withAll paths with

),...,( 1 nPPG),...,,...,,...,( 321 npppp

nkPp kk ≤≤∈ 1,

1P 2P 3P 1−kP kP 1−nP nP… …

PO PI,1 ⊆⊆ nPP , with

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Generalized false pathGeneralized false path

E.g., SDC –the de facto industry standardE.g., SDC –the de facto industry standard set_false_path {–from [pin|net|cell]+} set_false_path {–from [pin|net|cell]+} [–through [pin|net|cell]+]*[–through [pin|net|cell]+]* {–to [pin|net|cell]+}{–to [pin|net|cell]+}

Typical design has 1,000-20,000 SDC Typical design has 1,000-20,000 SDC constraints constraints

Number of paths is exponential w.r.t. |G|Number of paths is exponential w.r.t. |G| Brute force approach not practicalBrute force approach not practical

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(co-)Sensitization function(co-)Sensitization function

Sen(p) = Sen(p) = χ χ function of input patterns that function of input patterns that statically sensitize some path from PI to pin pstatically sensitize some path from PI to pin p All side inputs are non controllingAll side inputs are non controlling

yx

x1

x2

y

⊕ yx1

x2

Sen(y) = Sen(x)

Sen(y) = Sen(x1)

Sen(y) = Sen(x1).x2

+ Sen(x2)

+ Sen(x2).x1

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CoSen(y) = y.CoSen(x1) + ~x1.CoSen(x1)

(co-)Sensitization function(co-)Sensitization function

CoSen(p) = CoSen(p) = χχ function of input patterns that function of input patterns that statically co-sensitize some path from PI to pin pstatically co-sensitize some path from PI to pin p If gate is controlled then the on-pin is controllingIf gate is controlled then the on-pin is controlling

yx

x1

x2

y

⊕ yx1

x2

CoSen(y) = CoSen(x)

CoSen(y) = CoSen(x1) + CoSen(x2)

+ y.CoSen(x2) + ~x2.CoSen(x2)

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(co)-Sensitization w.r.t. G(P1, …, Pn)(co)-Sensitization w.r.t. G(P1, …, Pn)

(Co)Sen(p) = (Co)Sen(p) = χχ function of input patterns that function of input patterns that statically (co-)sensitize some subpath of G statically (co-)sensitize some subpath of G from PI to pin pfrom PI to pin p

∑∈ nPp

p)(Sen is SATG contains a true path, i.e., incorrect constraint

∑∈ nPp

p)(CoSen is UNSATG has only false paths, i.e., correct constraint⇒

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PI

(co)-Sensitization w.r.t. G(co)-Sensitization w.r.t. G

Assume Sen has been built for Assume Sen has been built for

),,...,( 11 kk PPPG −),...,( 11 −kPPG

2P 1−kP kP

1P

… PO

Sen = ?Sen ≠ ?Sen =

0

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(co)-Sensitization w.r.t. G(co)-Sensitization w.r.t. G

Zero Sen on all visited pins but onZero Sen on all visited pins but on

2P … PO

Sen = 0

kP1−kP

vanish

PI

1P

1−kP

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(co)-Sensitization w.r.t. G(co)-Sensitization w.r.t. G

2P … POkP1−kPPI

1P

Zero Sen on all visited pins but onZero Sen on all visited pins but on

Sen must reach to not vanish Sen must reach to not vanish 1−kP

Sen = 0

1−kP

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ComplexityComplexity

Sen and CoSen are built by adding a constant Sen and CoSen are built by adding a constant number of 2-input gates for every 2-input number of 2-input gates for every 2-input AND/XOR gate in the netlistAND/XOR gate in the netlist

Thus Sen and CoSen’s expression sizes are Thus Sen and CoSen’s expression sizes are in O(|G|ln|G|)in O(|G|ln|G|)

Final cost dominated by the SAT query on the Final cost dominated by the SAT query on the Sen/CoSen expression (NP-complete)Sen/CoSen expression (NP-complete)

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Verify SDC constraintsVerify SDC constraints

Handoff from RTL to P&RHandoff from RTL to P&R

Average ~1.3M gates, ~80k registersAverage ~1.3M gates, ~80k registers

~1000 SDC constraints/hour~1000 SDC constraints/hour

10% of the constraints are incorrect10% of the constraints are incorrect

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Filter false paths out of timing reportFilter false paths out of timing report

Less pessimistic timing pictureLess pessimistic timing picture

Detected false path can be used to re-optimizeDetected false path can be used to re-optimize

Average ~1.3M gates, ~80k registers Average ~1.3M gates, ~80k registers

~230 false paths generated per hour~230 false paths generated per hour

On average, ~6% of reported paths are falseOn average, ~6% of reported paths are false

Up to 20% of reported paths are falseUp to 20% of reported paths are false

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ConclusionConclusion

Verify generalized false pathVerify generalized false path No path enumerationNo path enumeration No exponential-size formulasNo exponential-size formulas Build O(n ln n) expressions for staticallyBuild O(n ln n) expressions for statically

(co-)sensitization(co-)sensitization Call SAT on expressionsCall SAT on expressions

10x faster than best known industrial 10x faster than best known industrial techniquestechniques 1000 SDC constraints on 1000 SDC constraints on

1M+ gates design in 1h1M+ gates design in 1h