algorithm

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COMMONWEALTH OF AUSTRALIA Copyright Regulations 1969 WARNING This material has been reproduced and communicated to you by or on behalf of Monash University pursuant to Part VB of the Copyright Act 1968 (the Act). The material in this communication may be subject to copyright under the Act. Any further reproduction or communication of this material by you may be the subject of copyright protection under the Act. Do not remove this notice.

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  • COMMONWEALTH OF AUSTRALIACopyright Regulations 1969WARNING

    This material has been reproduced and communicated to you by or on behalf of Monash University pursuant to Part VB of the Copyright Act 1968 (the Act).

    The material in this communication may be subject to copyright under the Act. Any further reproduction or communication of this material by you may be the subject of copyright protection under the Act.

    Do not remove this notice.

  • Mealy and Moore MachinesCSE2303 Formal Methods ILecture 8

  • OverviewMoore MachinesMealy MachinesSequential Circuits

  • A Moore Machine

    a

    b

    OUT

    q0

    q1

    q2

    1

    q1

    q1

    q1

    0

    q2

    q1

    q3

    0

    q3

    q3

    q1

    1

  • Definition of a Moore MachineA finite set of statesq0, q1, q2, etc.q0 is the start stateAlphabet of input lettersAlphabet of output lettersTransitionsA unique one for each letter and each stateOutput TableA letter for each state

  • Moore Machine for abaq3/1aababba,bq0/0q1/0q2/0q4/0

  • Defining a LanguageTo change a FA into a Moore machine which accepts the same languageName each stateName the Start state q0Output 0 in all non-final statesOutput 1 in all Final states.A string is accepted if after it has been completed read in the last letter printed is 1.

  • A Mealy Machine

    Qold

    IN

    Qnew

    OUT

    q0

    a

    q1

    1

    q0

    b

    q2

    0

    q1

    a

    q1

    1

    q1

    b

    q1

    1

    q2

    a

    q1

    0

    q2

    b

    q2

    0

  • Definition of a Mealy MachineA finite set of statesq0, q1, q2, etc.q0 is the start stateAlphabet of input lettersAlphabet of output lettersTransitionsA unique one for each letter and each stateEach transition also has one output letter

  • Equivalence of MachinesEvery Moore machine can be turned into a Mealy machine.Every Mealy machine can be turned into a Moore machine.Every regular language can be defined by Moore machine or a Mealy machine.All languages defined by a Moore machine or a Mealy machine are regular.

  • Sequential CircuitsThe output depends on the sequence of past inputs.

    The circuits consist ofa logic gates i.e. AND, OR, NOT, NAND, NORstorage elements i.e. flip-flops, latches.

  • Clocked Synchronous Sequential CircuitsClockedMeans all the flip-flops employ a clock input.SynchronousMeans all the flip-flops use the same clock signal.

    These circuits only change state when a triggering edge or tick occurs on the clock signal.

  • Logic GatesAND NOTORABABA

    A

    B

    AND

    0

    0

    0

    0

    1

    0

    1

    0

    0

    1

    1

    1

    A

    B

    OR

    0

    0

    0

    0

    1

    1

    1

    0

    1

    1

    1

    1

    A

    NOT

    0

    1

    1

    0

  • D Flip-FlopStores one bit of informationnew value of Q = old value of DQ* = DDQQCLKNOT Q

  • Moore CircuitNext State Logic CircuitState MemoryOutput Logic Circuitclock inputclock signalinputoutput

  • Moore Machineq0/1q1/0q2/0q3/1aaabbba,b

    a

    b

    OUT

    q0

    q1

    q2

    1

    q1

    q1

    q1

    0

    q2

    q1

    q3

    0

    q3

    q3

    q1

    1

  • Mealy CircuitNext State Logic CircuitState MemoryOutput Logic Circuitclock inputclock signalinputoutput

  • Mealy Machineq0q1q2b/0a/0a/1a/1, b/1b/0

    Q

    IN

    Q*

    OUT

    q0

    a

    q1

    1

    q0

    b

    q2

    0

    q1

    a

    q1

    1

    q1

    b

    q1

    1

    q2

    a

    q1

    0

    q2

    b

    q2

    0

  • D1 = IND2 = IN OR ((Q1 AND Q2) OR (NOT Q2))OUT = Q1 AND Q2Q1* = D1 Q2* = D2INANDOUTORD2clock signalORD1Q1Q2Q2

  • D1 = IND2 = IN OR ((Q1 AND Q2) OR (NOT Q2))OUT = Q1 AND Q2Q1* = D1 Q2* = D2

    Q1

    Q2

    IN

    Q1*

    Q2*

    OUT

    0

    0

    0

    0

    1

    0

    0

    0

    1

    1

    1

    0

    0

    1

    0

    0

    0

    0

    0

    1

    1

    1

    1

    0

    1

    0

    0

    0

    1

    0

    1

    0

    1

    1

    1

    0

    1

    1

    0

    0

    1

    1

    1

    1

    1

    1

    1

    1

  • Q1

    Q2

    q0

    0

    0

    q1

    0

    1

    q2

    1

    0

    q3

    1

    1

    Q

    Q1

    Q2

    IN

    Q*

    Q1*

    Q2*

    OUT

    q0

    0

    0

    0

    q1

    0

    1

    0

    q0

    0

    0

    1

    q3

    1

    1

    0

    q1

    0

    1

    0

    q0

    0

    0

    0

    q1

    0

    1

    1

    q3

    1

    1

    0

    q2

    1

    0

    0

    q1

    0

    1

    0

    q2

    1

    0

    1

    q3

    1

    1

    0

    q3

    1

    1

    0

    q1

    0

    1

    1

    q3

    1

    1

    1

    q3

    1

    1

    1

  • Q

    IN

    Q*

    OUT

    q0

    0

    q1

    0

    q0

    1

    q3

    0

    q1

    0

    q0

    0

    q1

    1

    q3

    0

    q2

    0

    q1

    0

    q2

    1

    q3

    0

    q3

    0

    q1

    1

    q3

    1

    q3

    1

  • Exerciseq0q1q21/00/00/10/1, 1/11/0Find the corresponding sequential circuit for the following Mealy Machine.

  • q0q1q21/00/00/10/1, 1/11/0

    Q

    IN

    Q*

    OUT

    q0

    0

    q1

    1

    q0

    1

    q2

    0

    q1

    0

    q1

    1

    q1

    1

    q1

    1

    q2

    0

    q1

    0

    q2

    1

    q2

    0

  • q0q1q21/00/00/10/1, 1/11/0Choose an unique binary code for each state.

    Q

    A

    B

    IN

    Q*

    A*

    B*

    OUT

    q0

    0

    0

    0

    q1

    0

    1

    1

    q0

    0

    0

    1

    q2

    1

    0

    0

    q1

    0

    1

    0

    q1

    0

    1

    1

    q1

    0

    1

    1

    q1

    0

    1

    1

    q2

    1

    0

    0

    q1

    0

    1

    0

    q2

    1

    0

    1

    q2

    1

    0

    0

    A

    B

    q0

    0

    0

    q1

    0

    1

    q2

    1

    0

  • A* = (A B IN ) (A B IN )B* = (A B IN ) (A B IN ) OUT = (A B IN ) (A B IN ) (A B IN )

    A

    B

    IN

    A*

    B*

    OUT

    0

    0

    0

    0

    1

    1

    0

    0

    1

    1

    0

    0

    0

    1

    0

    0

    1

    1

    0

    1

    1

    0

    1

    1

    1

    0

    0

    0

    1

    0

    1

    0

    1

    1

    0

    0

  • A* = IN (B )B* = A*OUT = (A ) (IN B )

    A

    B

    IN

    A*

    B*

    OUT

    0

    0

    0

    0

    1

    1

    0

    0

    1

    1

    0

    0

    0

    1

    0

    0

    1

    1

    0

    1

    1

    0

    1

    1

    1

    0

    0

    0

    1

    0

    1

    0

    1

    1

    0

    0

  • A* = IN (B )B* = A*OUT = (A ) (IN B )A*A

  • PreparationReadChapters 12 of the Text BookRevisionKnow what the following machines are and how to use them.Moore MachineMealy MachineBe able to find the equations for a sequential circuit corresponding to a Mealy machine.