Ak57 DVD Service Manual

TABLE OF CONTENTS

1. INTRODUCTION.....................................................................................................4 1.1. Purpose ....................................................................................................................................4 1.2. Scope .......................................................................................................................................4 1.3. General Features .......................................................................................................................4

2. GENERAL DESCRIPTION .....................................................................................5 2.1. Introduction ..............................................................................................................................5 2.2. System Building Blocks...............................................................................................................5

2.2.1. AK57 Chassis Block Diagrams 5 2.2.1.1. Genaral ...................................................................................................................5 2.2.1.2. SMPS ......................................................................................................................6 2.2.1.3. DEFLECTION...........................................................................................................6

2.2.2. AK57 Chassis Main Blocks 7 2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP).................................................................................8 2.2.2.2. Audio....................................................................................................................16 2.2.2.3. External AV I/O .....................................................................................................18 2.2.2.4. AV Switching .........................................................................................................19 2.2.2.4.1. MC74VHC4052 ..................................................................................................19 2.2.2.4.2. NLAST4599 .......................................................................................................21 2.2.2.5. TUNER..................................................................................................................23 2.2.2.6. SAW FILTERS........................................................................................................25 2.2.2.6.1. K3958M (IF Filter for Video Applications).............................................................25 2.2.2.6.2. K9656M (IF Filter for Audio Applications) ............................................................25 2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications).......................................................26 2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications).......................................................26 2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications) ......................................................27 2.2.2.7. SMPS ....................................................................................................................27 2.2.2.7.1. PRIMARY BLOCK ...............................................................................................27 2.2.2.7.1.1. SMPS CONTROLLER (NCP1207)..........................................................................28 2.2.2.7.1.2. MOSFET............................................................................................................31 2.2.2.7.1.2.1. MTP3N60E ......................................................................................................31 2.2.2.7.1.2.2. MTP6N60E ......................................................................................................32 2.2.2.7.2. SECONDARY BLOCK...........................................................................................33 2.2.2.7.3. SMPS Block Diagram..........................................................................................33 2.2.2.8. DEFLECTION.........................................................................................................34 2.2.2.8.1. HORIZANTAL DEFLECTION ................................................................................34 2.2.2.8.2. MD1803DFX ......................................................................................................34 2.2.2.8.3. FBT...................................................................................................................36 2.2.2.8.4. AN15524A (VERTICAL DEFLECTION OUTPUT).....................................................37 2.2.2.9. CRT BOARD ..........................................................................................................39

2.2.3. AK57 Chassis Scematics 42 2.2.3.1. Part1 ....................................................................................................................42 2.2.3.2. Part2 ....................................................................................................................43 2.2.3.3. Part3 ....................................................................................................................44 2.2.3.4. Part4 ....................................................................................................................45

2.2.4. DVD PLAYER 46 2.2.4.1. General Description ...............................................................................................46 2.2.4.1.1. MT1389D ..........................................................................................................46 2.2.4.1.2. SDRAM Memory Interface ..................................................................................46

2.2.4.1.3. Drive Interfaces.................................................................................................47 2.2.4.2. System Block Diagram and MT1389D Pin Description...............................................47 2.2.4.2.1. MT1389D Pin Description ...................................................................................47 2.2.4.2.2. 2.1 Sytem Block Diagram ...................................................................................56 2.2.4.3. Audio Output.........................................................................................................57 2.2.4.4. Audio DACS...........................................................................................................57 2.2.4.5. Video Interface......................................................................................................57 2.2.4.6. Flash Memory........................................................................................................58 2.2.4.7. Serial Eeprom Memory ...........................................................................................58 2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component Configuration...................58 2.2.4.9. Scematics..............................................................................................................58 2.2.4.9.1. Part1 ................................................................................................................58 2.2.4.9.2. Part2 ................................................................................................................59 2.2.4.9.3. Part3 ................................................................................................................60 2.2.4.9.4. Part4 ................................................................................................................61 2.2.4.9.5. Part 5 ...............................................................................................................62

2.3. AK57 Service Menu..................................................................................................................64 2.4. TUNER SETTINGS....................................................................................................................75

1. Introduction

1.1. Purpose This document is prepared for the UOCII TV project and describes the whole system features and operating principles to be used in hardware design phase. The document is based on “Device Specification UOCII-Version 1.12” from Philips Semiconductors. Prior to hardware design start, all parties involved must agree with the contents of this document.

1.2. Scope The document covers detailed descriptions of 11AK56 chassis system building blocks.

1.3. General Features 11AK57 is a 90° / 50 Hz. chassis which is capable of driving 14” superflat and 15” realflat CRT’s . The chassis will have the following main features; • Remote Control • 100 programs • On Screen Display • Mono • Colour Standarts ; PAL, SECAM, NTSC, • Transmission standarts ; B/G, L/L’ I/I’, DK, • Teletext ; One pages, • Multi-standard alignment free PLL tuning, • DVD or DVIX Player • DVB-T option • Europe Scart • Detachable headphone output option, • Front or side or back AV input option, • Back AV output option, • Coaxial output for IDTV/DVB-T • 2W (%10 THD), • 90-270V 50Hz or 170V-270V 50Hz SMPS • Less than 3W • DVD-Video, DVD R/RW, CD-R/RW, CD-Audio and MP3 Audio, JPEG (Picture CD), Video CD

and its sub formats like CVD, SVCD, DVCD.

2. General Description

2.1. Introduction This chapter describes system building blocks and their detailed descriptions.

2.2. System Building Blocks

2.2.1. AK57 Chassis Block Diagrams

2.2.1.1. Genaral

UOCII

DVD

DV

D12V

DV

D5V

DV

D3V

3

DV

D-IR

DVD-ON

DVD-MONO

DVD-CVBS

DVD-SPDIF

DVB-T

IDTV

30V

IDTV

12V

IDTV-MONOIDTV-CVBS

IDTV-SPDIF

Rx

Tx

IRQ

SPDIF

SPDIF-OUT

RCA OUT

RC

A-C

VB

S-O

UT

RC

A-M

ON

O-O

UT

RCA IN

RCA-CVBS-IN

RCA-MONO-IN

Sca

rt1

SC-PIN8

RGB-FB

SC-R

SC-G

SC-B

SC-CVBS-IN

SC-MONO-IN

SC-CVBS-OUT

SC-MONO-OUT

4052

V1

V2

V3

V4

A1

A2

A3

A4

VOUT

AOUT

STB 8V

3V3S

TBEEPROM

WP

I2C5VSTB

IFBLOCK TUNER

IFSECAM PORT

TUN-IF

AGC

33V

5V

DEFLECTION

B+

12V33V5V 8V

VERTICAL DRIVE

HORIZANTAL DRIVE

HOR. FB

CRT BOARDRGB

BLKIN

V+

HE

ATE

R

RGB

EHT

2822M

MUTE

MONO

MUTE

TV-IR

KE

YB

OA

RD

NC

LED

75

76

80

42

28

33

77

69

70

74

2 50 51 52 53 47 68 56

67 1 9,39

59,61,66

73

71,72

18,19,23,24

3

22

16,17

30

31

56,57,58

55

48

78

P2.2_PWM1

P2.3_PWM2

P2.4_PWM3

P0.3_ADC0

CVBS2

AUDIO2

AUDEEM

P1.2_INT0

P1.3_T1

P2.1_PWM0

P2.0_PWM0

P3.3_AD

C3

AUDOUT1

P2.5_PWM4

P3.1_AD

C1

P1.0_INT1

P0.6P0.5

P1.1_T0

CVB

S1O

P3.2_AD

C2

A12V

IDTV

30V

B+

12V

DVD12V

IDTV12

A12V

DVD5V

5VSTB

3V3STB

DVD3V3

STB

SMPS

11AK57GENERAL BLOCK DIAGRAM

SW1SW0

SW0

SW2

NLAST4599

NLAST4599

2.2.1.2. SMPS

NCP1207

220V50Hz

1

2

3

4 5

6

8DMAG

I_SENSE

CONT_INT

GND

VCC

VI

DRIVER

B+

A12V

DVD12V

12V

IDTV12V

9V TR.REG 3V3STB

TR.REG 5VSTB

6V LDO DVD3V3

LDO DVD5V

STB11AK57

SMPS BLOCK DIAGRAM

5

2

8

7 9

10

11

12

14

13

16

15

2.2.1.3. DEFLECTION

Lin.

Horz.Yoke

30KV

SCREEN

HORIZONTAL

G2 FOCUS

30KV

FOCUS

CRTBOARD

Heater

Heater

-14V VERTICAL

+14V VERTICAL

TRAN

SISTO

RS

VERTICALAMPLIFIERAN5524A

VERTICALDRIVE

RGBDRIVE

HORIZONTALDRIVE

+33V

+9V+8V

+5V

VERTICAL YOKE

2.2.2. AK57 Chassis Main Blocks AK57 chassis main blocks are; • UOCII : Microcontroller + Video Proccessor + Sound Proccessor + IF + Teletext • AUDIO : Audio Amp., • EXT. AV I/O : Scart , AV input, AV output, • AV SWITCHING : 4052, 4599 • TUNER : PLL Tuner

• SAW FILTERS • SMPS : SMPS Controller, SMT, Bridge Rect., Line Filters • DEFLECTION : FBT, HOT, Vertical Amplifier, Line Driver, • CRT BOARD : RGB Amp. with transistors,

2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP) UOCII is composed of microcontroller, video proccessor, sound proccessor and IF blocks. The various versions of the TDA955X H/N1 series combine the functions of a video processor together with a microcontroller.The ICs are intended to be used in economy television receivers with 90 and 110 degree picture tubes. The ICs have supply voltages of 8V and 3.3V and they are mounted in a QFP 80 envelope. The features are given in the following feature list. FEATURES

TV-signal processor

• Multi-standard vision IF circuit with alignment-free PLL demodulator • Internal (switchable) time-constant for the IF-AGC circuit • The QSS and mono FM functionality are both available so that an FM/AM TV receiver can

be built without the use of additional ICs • The mono intercarrier sound circuit has a selective • FM-PLL demodulator which can be switched to the different FM sound frequencies

(4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external band-pass filters can be omitted.

• The FM-PLL demodulator can be set to centre frequencies of 4.74/5.74 MHz so that a second sound channel can be demodulated. In such an application it is necessary that an external bandpass filter is inserted.

• The vision IF and mono intercarrier sound circuit can be used for the demodulation of FM radio signals

• Video switch with 2 external CVBS inputs and a CVBS output. One of the CVBS inputs can be used as Y/C input.

• 2 external audio inputs. The selection of the various inputs is coupled to the selection of the CVBS signals

• Integrated chrominance trap circuit • Integrated luminance delay line with adjustable delay time • Switchable group delay correction in the CVBS path • Picture improvement features with peaking (with switchable centre frequency,

depeaking, variable positive/negative overshoot ratio and video dependent coring), dynamic skin tone control and blue-, black- and white stretching

• Integrated chroma band-pass filter with switchable centre frequency • Switchable DC transfer ratio for the luminance signal • Only one reference (12 MHz) crystal required for the m-Controller, Teletext- and the

colour decoder • PAL/NTSC or multi-standard colour decoder with automatic search system

• Internal base-band delay line • Indication of the Signal-to-Noise ratio of the incoming CVBS signal • A linear RGB/YUV/YPBPR input with fast blanking for external RGB/YUV sources. The

synchronisation circuit can be connected to the incoming Y signal. The Text/OSD signals are internally supplied from the

• m-Controller/Teletext decoder. • RGB control circuit with ‘Continuous Cathode Calibration’, white point and black level off-

set adjustment so that the colour temperature of the dark and the light parts of the screen can be chosen independently.

• Contrast reduction possibility during mixed-mode of OSD and Text signals • Adjustable ‘wide blanking’ of the RGB outputs • Horizontal synchronization with two control loops and alignment-free horizontal oscillator • Vertical count-down circuit • Vertical driver optimized for DC-coupled vertical output stages • Horizontal and vertical geometry processing • Horizontal and vertical zoom function for 16 : 9 applications • Horizontal parallelogram and bow correction for large screen picture tubes • Low-power start-up of the horizontal drive circuit

Microcontroller

• 80C51 m-controller core standard instruction set and timing • 1 ms machine cycle • 32 - 128Kx8-bit late programmed ROM • 3 - 12Kx8-bit DataRAM (shared between Display, Acquisition and Auxiliary RAM) • Interrupt controller for individual enable/disable with two level priority • Two 16-bit Timer/Counter registers • One 16-bit Timer with 8-bit Pre-scaler • WatchDog timer • Auxiliary RAM page pointer • 16-bit Data pointer • Stand-by, Idle and Power Down modes • 14 bits PWM for Voltage Synthesis Tuning • 8-bit A/D converter with 4 multiplexed inputs • 5 PWM (6-bits) outputs for control of TV analogue signals • 18 general I/O ports

Data Capture

• Text memory for 1 or 10 pages • In the 10 page versions inventory of transmitted Teletext pages stored in the

Transmitted Page Table (TPT) and Subtitle Page Table (SPT) • Data Capture for US Closed Caption • Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling

(WSS) bit decoding • Automatic selection between 525 WST/625 WST • Automatic selection between 625 WST/VPS on line 16 of VBI • Real-time capture and decoding for WST Teletext in Hardware, to enable optimized m-

processor throughput

• Automatic detection of FASTEXT transmission • Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters • Signal quality detector for video and WST/VPS data types • Comprehensive teletext language coverage • Full Field and Vertical Blanking Interval (VBI) data capture of WST data

Display

• Teletext and Enhanced OSD modes • Features of level 1.5 WST and US Close Caption • Serial and Parallel Display Attributes • Single/Double/Quadruple Width and Height for characters • Scrolling of display region • Variable flash rate controlled by software • Enhanced display features including overlining, underlining and italics • Soft colours using CLUT with 4096 colour palette • Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12x13,

12x16 (VxH)] • Fringing (Shadow) selectable from N-S-E-W direction • Fringe colour selectable • Meshing of defined area • Contrast reduction of defined area • Cursor • Special Graphics Characters with two planes, allowing four colours per character • 32 software redefinable On-Screen display characters • 4 WST Character sets (G0/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic) • G1 Mosaic graphics, Limited G3 Line drawing characters • WST Character sets and Closed Caption Character set in single device

Optional Used ICs at AK57 chassis are TDA9550 H/N1, TDA9551 H/N1, TDA9552 H/N1.

FUNCTIONALOF TDA9550 H/N1

• TV range is 90° • Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable

centre frequency Audio switch • Automatic Volume Levelling • PAL decoder • NTSC decoder • ROM size 32 – 64K • User RAM size 1K • One page teletext • Close Captioning

FUNCTIONALOF TDA9551H


centre frequency Audio switch

• Automatic Volume Levelling • PAL decoder • SECAM decoder • NTSC decoder • ROM size 32 – 64K • User RAM size 1K • One page teletext • Close Captioning

FUNCTIONALOF TDA9552H


centre frequency Audio switch • Automatic Volume Levelling • QSS sound IF amplifier with separate input and AGC circuit • AM sound demodulator without extra reference circuit • PAL decoder • SECAM decoder • NTSC decoder • ROM size 32 – 64K • User RAM size 1K • One page teletext • Close Captioning

BLOCK DIAGRAM

PINING

2.2.2.2. Audio The TDA2822 is DUAL LOW-VOLTAGE POWER AMPLIFIER.

• Supply voltage down to 1.8V • Low crossover distorsion • Low quıescent current • Bridge or stereo configuration

ELECTRICALCHARACTERISTICS

Figure: Test Circuit (Stereo)

Figure: Test Circuit (Bridge)

Figure: Application in 11AK56

2.2.2.3. External AV I/O SCART PINING

1. Audio right output 0.5Vrms / 1KΩ 2. Audio right input 0.5Vrms / 10KΩ 3. Audio left output 0.5Vrms / 1KΩ 4. Ground AF 5. Ground Blue 6. Audio left input 0.5Vrms / 10KΩ 7. Blue input 0.7Vpp / 75Ω 8. AV switching input 0-12VDC /10KΩ 9. Ground Green 10. Not Used 11. Green input 0.7Vpp / 75Ω 12. Not Used 13. Ground Red 14. Ground Blanking 15. Red input 0.7Vpp / 75Ω 16. Blanking input 0-0.4VDC, 1-3VDC / 75Ω 17. Ground CVBS output 18. Ground CVBS input 19. CVBS output 1Vpp / 75Ω 20. CVBS input 1Vpp / 75Ω 21. Ground

Front/Side/Back AV Input

Audio 0.5Vrms / 10KΩ Video 1Vpp / 75Ω Back AV Output Audio 0.5Vrms / 1KΩ Video 1Vpp / 75Ω

2.2.2.4. AV Switching

2.2.2.4.1. MC74VHC4052 The MC74VHC4052 utilize silicon--gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel--Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL outputs. These devices have been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal--gate CMOS analog switches.

• Fast Switching and Propagation Speeds • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Analog Power Supply Range (VCC -- VEE) = 2.0 to 12.0 V • Digital (Control) Power Supply Range (VCC -- GND) = 2.0 to 6.0 V • Improved Linearity and Lower ON Resistance Than Metal—Gate Counterparts • Low Noise

2.2.2.4.2. NLAST4599 The NLAST4599 is an advanced high speed CMOS single pole − double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full power−supply range (from VCC to GND). The device has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches. The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.

Features • Select Pin Compatible with TTL Levels • Channel Select Input Over−Voltage Tolerant to 5.5 V • Fast Switching and Propagation Speeds • Break−Before−Make Circuitry • Low Power Dissipation: ICC = 2 _A (Max) at TA = 25°C • Diode Protection Provided on Channel Select Input • Improved Linearity and Lower ON Resistance over Input Voltage • Latch−up Performance Exceeds 300 mA

• ESD Performance: HBM > 2000 V; MM > 200 V • Chip Complexity: 38 FETs • Pb−Free Packages are Available

2.2.2.5. TUNER

Channel coverage of PLLTuner for VHF/UHF

OFF-AIR CHANNELS CABLE CHANNELS BAND

CHANNELS FREQUENCY RANGE (MHz) CHANNELS

FREQUENCY RANGE (MHz)

Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25

Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25

High Band E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz. Noise Typical Max. Gain Min. Typical Max. Low band : 5dB 9dB All channels : 38dB 44dB 52dB Mid band : 5dB 9dB Gain Taper (of-air channels): 8dB High band : 6dB 9dB Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels. Terminals for External Connection

Electrical conditions

2.2.2.6. SAW FILTERS

2.2.2.6.1. K3958M (IF Filter for Video Applications)

Standard

• B/G • D/K • I • L/L’

Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output

Features

• TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz • Constant group delay

2.2.2.6.2. K9656M (IF Filter for Audio Applications)

Standard

• B/G • D/K • I • L/L’

Pin configuration

1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output

Features

• TV IF audio filter with two channels • Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75 MHz

(L’- NICAM) • Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32,35 MHz

and 33,40 MHz

2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications)

Standard

• B/G • D/K


Features

• TV IF filter with Nyquist slope and sound shelf • Broad sound shelf for sound carriers at 32,40MHz and 33,40 MHz • Group delay predistortion

2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications)

Standard

• B/G • I • L/L’


Features

• TV IF filter with two Nyquist slope and sound shelf • Picture carriers at 33,90 MHz and 38,90 MHz • Broad sound shelf at 15 dB level for sound carriers at 32,90 MHz and 33,40 MHz • Constant group delay

2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications)

Standard

• B/G


Features

• TV IF filter with Nyquist slope and sound shelf • Picture carrier at 38.90MHz • Reduced group delay predistortion as compared with standard B/G, half

2.2.2.7. SMPS

2.2.2.7.1. PRIMARY BLOCK AC power applied via AC inlet, line filter components prevent chassis from incoming noise of AC line, also prevents AC line against created noises by TV. Bridge rectifier and bulk capacitor converts AC voltage to DC voltage. Applied DC voltage to primary winding is then swicthed via MOSFET by primary controller in a controlled manner. SMPS controller works on quasi-resonant PWM and gets first supply voltage from AC line (SMPS Controller supply). Controller drives MOSFET according to feedback information supplied by shunt regulator and opto-coupler, according to that information adjusts on-time of MOSFET for required power. After the start-up in normal operation mode SMPS controller is supplied by SMT. Primary block consist of following main parts, AC Inlet (PL800), Fuse (F800), Varistor (R803),

Line Filter For EMC (C801,L800,C800), SMPS Controller (IC806), SMPS Controller supply for first Start-up (R807), Bridge Rectifier (D820,D821,D822,D823), Rectifier For SMPS Controller(D803), Bulk Cap (C809), Clamping Circuitry (R820, C810, C811, D824), SMT (Switch Mode Transformer) (TR800), SMT Driver MOSFET (Q802), Current Sense Resistor (R828), Protection Components for MOSFET Failure (D805,D806,R826)

2.2.2.7.1.1. SMPS CONTROLLER (NCP1207) PWM Current-Mode Controller for Free Running Quasi-Resonant Operation The NCP1207A combines a true current mode modulator and a demagnetization detector to ensure full borderline/critical Conduction Mode in any load/line conditions and minimum drain voltage switching (Quasi−Resonant operation). Due to its inherent skip cycle capability, the controller enters burst mode as soon as the power demand falls below a predetermined level. As this happens at low peak current, no audible noise can be heard. An internal 8.0 _s timer prevents the free−run frequency to exceed 100 kHz (therefore below the 150 kHz CISPR−22 EMI starting limit), while the skip adjustment capability lets the user select the frequency at which the burst foldback takes place. The Dynamic Self−Supply (DSS) drastically simplifies the transformer design in avoiding the use of an auxiliary winding to supply the NCP1207A. This feature is particularly useful in applications where the output voltage varies during operation (e.g. battery chargers). Due to its high−voltage technology, the IC is directly connected to the high−voltage DC rail. As a result, the short−circuit trip point is not dependent upon any VCC auxiliary level. The transformer core reset detection is done through an auxiliary winding which, brought via a dedicated pin, also enables fast Overvoltage Protection (OVP). Once an OVP has been detected, the IC permanently latches off. Finally, the continuous feedback signal monitoring implemented with an overcurrent fault protection circuitry (OCP) makes the final design rugged and reliable.

Features • Free−Running Borderline/Critical Mode Quasi−Resonant Operation • Current−Mode with Adjustable Skip−Cycle Capability • No Auxiliary Winding VCC Operation • Auto−Recovery Overcurrent Protection • Latching Overvoltage Protection • External Latch Triggering, e.g. Via Overtemperature Signal • 500 mA Peak Current Source/Sink Capability • Undervoltage Lockout for VCC Below 10 V • Internal 1.0 ms Soft−Start • Internal 8.0 _s Minimum TOFF • Adjustable Skip Level • Internal Temperature Shutdown • Direct Optocoupler Connection • SPICE Models Available for TRANsient Analysis • Pb−Free Package is Available Typical Applications • AC/DC Adapters for Notebooks, etc. • Offline Battery Chargers • Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.) • Auxiliary Power Supplies (USB, Appliances, TVs, etc.)

Typical Application:

Internal Circuit Architecture

2.2.2.7.1.2. MOSFET The MTP3N60E used for voltage range 170-270V, The MTP6N60E used for voltage range 90 – 270V.

2.2.2.7.1.2.1. MTP3N60E N–Channel Enhancement–Mode Silicon Gate This advanced high voltage TMOS E–FET is designed to with stand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a drain–to–source diode with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. Avalanche Energy Capability Specified at Elevated Temperature Low Stored Gate Charge for Efficient Switching Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor — Absorbs High Energy in the Avalanche Mode Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode

2.2.2.7.1.2.2. MTP6N60E N–Channel Enhancement–Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.

• Robust High Voltage Termination • Avalanche Energy Specified • Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode • Diode is Characterized for Use in Bridge Circuits • IDSS and VDS(on) Specified at Elevated Temperature

2.2.2.7.2. SECONDARY BLOCK Switching primary winding of SMT induces voltages to secondary windings of SMT. Induced voltages are then rectified by secondary recitification diodes and capacitors. Output Voltages +3.3.V_STB : The signal is +3.3VDC and continuous stand-by on/off. Used for digital part of UOCII. +5V_STB : The signal is +5VDC and continuos stand-by on/off. Used for port control. B+ : The voltage needed for FBT. Voltage range 114V – 117V according to CRT. 12V : The voltage needed for horizantal driver circuit. 12V_A : The voltage supply of audio amplifier. 12V_DVD : The voltage needed for DVD. 12V_IDTV : The voltage needed for IDTV. +5V_DVD : The voltage needed for DVD. +3.3.V_DVD : The voltage needed for DVD.

2.2.2.7.3. SMPS Block Diagram

NCP1207

220V50Hz

1

2

3

4 5

6

8DMAG

I_SENSE

CONT_INT

GND

VCC

VI

DRIVER

B+

A12V

DVD12V

12V

IDTV12V

9V TR.REG 3V3STB

TR.REG 5VSTB

6V LDO DVD3V3

LDO DVD5V

STB11AK57

SMPS BLOCK DIAGRAM

5

2

8

7 9

10

11

12

14

13

16

15

2.2.2.8. DEFLECTION

2.2.2.8.1. HORIZANTAL DEFLECTION Deflection block consist of following main parts, Horizontal driver transistor (Q600), Horizontal driver (L600), HOT (Horizontal Output Transistor) (Q603), FBT (TR600), Linearity Coil (L601), Flyback Capacitors (C611), S-correction capacitor (C622), Modulated S-correction capacitor (C623), Hdrive signal is buffered and applied to line driver transistor by a capacitor. Line driver produces necessary base currents, parallel diode to base series resistor speeds up the reverse base current. UOCII has soft-start and soft-stop features to have more safe operation. There are two base current adjustment resistors on the circuit. Collector current differs according to CRT sizes . Tube dependent components are choosen to fit best picture performance by keeping; 11-12usec. Flyback time, Max. 1300V. collector voltage (peak-detect mode measurement)

2.2.2.8.2. MD1803DFX HIGH VOLTAGE NPN POWER TRANSISTOR FOR STANDARD DEFINITION CRT DISPLAY

Features • State-Of-The-Art Technology: – Diffused collector “ENHANCED GENERATION” • More stable performance versus operating temperature variation • Low base drive requirement • Tighter hFE range at operating collector current • Fully insulated power package U.L. compliant • Integrated free wheeling diode • In compliance eith the 2002/93/EC EUROPEAN DIRECTIVE

2.2.2.8.3. FBT Operating Ampient Temperatue : -10°C..........+60°C Stroge Ampient Temperature : -20°C..........+80°C Operating Horizantal Frequency : 15.625KHz ±0.5KHz INDUCTANCE (Between pin1 to pin3) : 3.02mH ± %8 INTERNAL RESISTANCE : Max. 2.2Ohm Regulation:Max.%10 FLYBACK TIME : 11.5µsec COLLECTOR VOLTAGE : 1000Vp_p FOCUS VOLTAGE RANGE % OF EHT: min.≤18.2 max.≥34.6 DEFLECTION CURRENT : 3.1Ap_p max. AUXLIARY OUTPUTS: Heater Voltage : 6.3Vrms / max 750mA RGB Supply : +200V / max 30mA ±%5 Vertical Supply : +14V / max 1A ±%5 Vertical Supply : -14V / max 1A ±%5 Auxliary Voltage : +9V / max 1A ±%5 Tuning Voltage : +33V max 100mA ±%5

2.2.2.8.4. AN15524A (VERTICAL DEFLECTION OUTPUT) The AN5524A (TV vertical deflection output circuit) is a monolithic integrated circuit designed for vertical deflection output, such as TV and display.

Features

• Built-in Pump-up circuit • Built-in Thermal protection circuit • Maximum deflection current = 1.6Ap-p • Dimple forming type :

Advantages : a) Withstand repeated movements between the body and the solder joint of the IC (when a heat-sink is used). b) Better vibration absorber (eg. CTV installed in the bus/coach).

• VCC operating range : 12V ~ 30V

2.2.2.9. CRT BOARD Transistors are used for amplifying RGB signals. 2SC2482 For High Voltage Switching And Amplifier Applications:

• High Voltage : V(BR)=300V. • Small Collector Output Capacitance : Cob=3.0pF (typ.)

2.2.3. AK57 Chassis Scematics

2.2.3.1. Part1

SC

_G

_IN

L123

1u

L100

470k

R225

330R

R214

470R

R184

L116

50V

39p

C100

+8V

PL111

1

2

3

BC848BQ117

10n

C105

100R

R174

K3958M

Z100

IN1

1

IN2

2G

ND 3O

UT

14

OU

T2

5

PL105

1

100R

R234

100R

R178

50V

10n

C107

16V

100u

C131

50V

10n

C112 SAW_SW

PL112

1

2

100R

R145

50V

10u

C181

1k

R208

50V1n5

C162

100R

R164

VP

RO

T

3k3

R226

1N4148

D104

CVBS_OUT

ST

BY

SC

_F

BL

K

16V220nC178

BC

848B

Q110

100R

R237

25V

100n

C121

KEYBOARD

100RR143

4R7

R195

EHT_INFO

+5V

100R

R231

+33V

820R

R215

SC

_R

_IN

2k2

R200

16V

47u

C110

47pC139

50V

L122

2u2

100u

C137

100R

R229

4R

7

R116

50V

10n

C164

+12V_A

16V

100n

C154

16V

220n

C159

100R

R227

4.5MHz_TRAP

Z102

1

2

3

25V10n

C113

SC

_A

_O

UT

16V

100n

C158

50V

4u7 C

155

L121

100R

R147

50V1u

C176

+5V_STB

TDA2822M

IC102

1OUT1

2SUPPLY_VOLT

3OUT2

4GND5 IN21

6 IN22

7 IN11

8 IN12

+5V

16V100nC140

100R

R162

50V

47p

C188

220n

C149

63V

16V

100n

C141

BC848B

Q119

4k7

R138

+8V

RE

MO

TE

100k

R217

BLM21A601S

L103

4k3

R165

220R

R221

100RR242

100RR191

470R

R206

27k

R199

100RR203

SC

_S

TA

TU

S

4R

7

R117

50V

1u

C153

1N

4148

D107

SC

_B

_IN

3k9

R161

RCA_A_IN

L10122u

100n

C145

50V1n5

C161

100RR223

100RR148

100RR114

120kR218

S102

1N4148

D101

100R

R189

75R

R239

390R

R196

50V

10u

C111

IC103

1P

3.1

_A

DC

1

2P

3.2

_A

DC

2

3P

3.3

_A

DC

3

4V

SS

C_

P

5P

0.5

6P

0.6

7V

SS

A

8D

EC

9V

P2

10

DE

CD

IG

11

PH

2L

F

12

PF

1L

F

13

GN

D3

14

DE

CB

G

15

AV

L

16

VD

RB

25GND2

26SNDPLL

27REFOUT_SNDIF

28AUDIO2

29AUDIO3

30HOUT

31FBISO

32DECSDEM

33AUDEEM

34EHTO

35PLLIF

36SIFAGC

37IC2

38SVO_IFOUT

39VP1

40CVBS1

49

IFV

O2

50

INS

SW

2

51

R2

_V

IN

52

G2

_Y

IN

53

B2

_U

IN

54

BC

LIN

55

BL

KIN

56

RO

57

GO

58

BO

59

VD

DA

60

VP

E

61

VD

DC

62

OS

CG

ND

63

XT

AL

IN

64

XT

AL

OU

T

65 RESET

66 VDDP

67 P1.0_INT1

68 P1.1_T0

69 P1.2_INTO

70 P1.3_T1

71 P1.6_SCL

72 P1.7_SDA

73 P2.0_PMW

74 P2.1_PWM0

75 P2.2_PWM1

76 P2.3_PWM2

77 P2.4_PWM3

78 P2.5_PWM4

79 NC

80 P3.0_ADC0

17

VD

RA

18

IFIN

1

19

IFIN

2

20

IRE

F4

5C

46

WH

ST

R

47

CV

BS

10

48

AU

DO

UT

1

21

VS

C

22

AG

CO

UT

23

IC

24

IC1

41

GN

D

42

CV

BS

2

43

GN

DA

1

44

CV

BS

3_

Y

6k2

R220

S101

BC848BQ118

220kR136

75R

R212

100nC103

50V

EHT_INFO

30k

R201

SC

_F

BL

K

R179

15k

1k

R149

16V

100n

C130

AU

DIO

_O

UT

BA591

D105

SE

L_C

VB

S

R102100R

100R

R175

100R

R180

SDA

330R

R252

75R

R230

16V

100n

C187

50V

47u

C193

10k

R204

+3V

3_S

TB

BC848B

Q116

50V

6n8

C106

L120

L117

+5V

_S

TB

SDA

3k3

R235

SC_A_OUT

100RR144

4k7

R130

CV

BS

_O

UT

SC

_B

_IN

50V 10n

C165

16V100nC172

16V

100n

C144

10k

R105

220RR216

100R

R198

4n7

C198

50V

1kR205

+3V

3_S

TB

BC

848B

Q109

50V

4n7

C180

330RR125

MUTE

16V

100nC147

SC

_R

_IN

50V

4u7

C170

50V

1u

C169

16V100uC102

SC_STATUS

75R

R240

PL

10

6

1

2

3

4

5

AUDIO_OUT

12MHz

X100

PL

10

7

1

2

R1001k

75RR188

50V

39p

C104

680k

R219

25V

100n

C123

4k7

R131

REMOTE

D103

+5V

_S

TB

SCL

39k

R187

+5V

_S

TB

1k2

R209

15k

R173

100R

R169

+8V

330k

R158

50V

2u2

C156

47u

C135

16V

75R

R228

6u8

L118

1k2

R210

HO

UT

50V

150p

C197

Q111

1kR197

RCA_V_IN

MUTE

25V

100n

C120

16V100uC136

22RR190

16V

220n

C182

6k2

R112

16V

100u

C138

47pC142

50V

100R

R176

SC

_G

_IN

SD

A

+3V3_STB

HFLYBACK

100R

R160

KEYBOARD

SCL

+8V

16V220nC177

16V

100u

C173

BC848B

Q100

100R

R186

IN1

1

IN2

2G

ND 3O

UT

14

OU

T2

5

38

.9M

Hz_

TV

TU

NT

U1

00

AGC 1

VT 2

AS 3

SCL 4

SDA 5

NC 6

VS 7

NC/ADC 8

VST 9

IF2/GND 10

IF1 11

75R

R232

100RR142

VE

RT

-

10n

C175

50V

BC848B

Q112

3k3

R182

50V

10u

C143

2n7

C174

50V

50V4n7

C151

PL104

1

5k6

R103

50V

100n

C157

1k

R207

10k

R236

TX

+5V_STB

L113

100R

R185

150p

C191

50V

SC

_V

_IN

50V

150p

C195

1k

R211

SC

_A

_IN

16V

220n

C160

16V

100n

C171

SEL_MONO

SC

_A

_O

UT

2k7R224

50V

2n2

C152

PL108

1

2

50V

100n

C101

16V47u

C183

5k6R104

50V

100p

C196

220R

R159

PL

10

3

1

2

3

4

5

50V270p

C186

SC

L

470R

R177

100RR115

4k7

R137

27k

R202

R101100R

16V

220n

C168

180R

R2224.5MHz_TRAP

Z103

1

2

3

100R

R146

10k

R167

10k

R129

16V

100n

C132

100R

R166

100nC163

63V

VE

RT

+

1k

R113

SA

W_S

W

PL

119

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

BC858BQ107

63V

220n

C150

L115

1u

50V22u

C108

10k

R141

75R

R244

BC858B

Q115

16V

100nC148

IRQ

KEYBOARD

75RR213

12kR111

1N4148

D100

50V

820p

C179

+8V

AB C

RACK_RCA_DVBJK101

31 2 4 5

AB

C

RA

CK

_R

CA

_D

VB

JK102

31

24

5

+5V

AGC

AGC

IF1

IF2

IF2

IF1

4k7

R139

4k7

R140

4k7

R153

4k7

R150

4k7

R151

4k7

R152

100RR154

100RR155

100RR156

100RR157

RX

SW0

SW1

SW2

DVD_ON

100R

R168

4k7

R163

LED

R126330R

100RR128

LED

D102

PL

11

3

1

2

3

DVD_CVBS

DVD_ON

75R

R233

PL

11

4

1

2

PL

11

5

1

2

75R

R245

IDTV_CVBS

IDTV_MONO 1kR246

10kR243

PL

11

6

1

2

3

1kR249

DVD_MONO

PL

11

71

2

DVD_SPDIF

PL

11

81

2

IDTV_SPDIF

M74HC4052

IC101

1 Y0

2 Y2

3 COM_Y_OUT_IN

4 Y3

5 Y1

6 INH

7 VEE

8 GND 9B

10A

11X3

12X0

13COM_X_OUT_IN

14X1

15X2

16VCC

50V4u7

C12450V4u7

C125

50V4u7

C12650V4u7

C127

RCA_V_IN

IDTV_CVBS

DVD_CVBS

SC_V_IN

IDTV_MONO

SC_A_IN

RCA_A_IN

DVD_MONO

50V10u

C122

10kR118

10kR119

10kR120

10kR121

SW0

SW1

47RR110

2k2

R109

10k

R108

10R

R106

150R

R107

BC848BQ102

+5V

SEL_CVBS

SEL_MONO2k2

R133

10k

R132

10R

R134

+8V

150R

R135

BC848BQ106

47RR122

+5V

RF_MONO

100RR250

100RR251

10k

R247

10k

R248

47RR183

10k

R192

220R

R193

100R

R194

BC858BQ113

BC

848B

Q114

+5V

_S

PD

IF

25V10n

C166

50V

1n

C167

A

RC

A_JA

CK

_1P

_90_L

ON

GJK

100

12

PL109

1

2

3

50V390p

C146

PL102

1

2

3

4

TX

IRQ

RX

BLM21A601S

L107

+5V

33V

D106

BL

M21A

601S

L104

BLM21A601S

L105

BLM21A601S

L106

BLM21A601S

L109

BLM21A601S

L108

BLM21A601S

L110

BLM21A601S

L119

470R

R181

10k

R241

NLAST4599

IC105

1 SW

2 VSS

3 GND 4IN1

5OUT

6IN2

NLAST4599

IC104

1 SW

2 VSS

3 GND 4IN1

5OUT

6IN2SW0

RF_MONO

SEL_MONO

+5V

+5V

SW2

BLM21A601S

L112

BLM21A601S

L111

16V

10u

C134

16V

10u

C133

DVD_SPDIF

IDTV_SPDIF

300R

R170

300R

R172

1k

R238

SPDIF_OUT

S100

SPDIF_OUT

BC858BQ104

BC848BQ103

+5V_STB

BC848BQ105

10kR127

50V220p

C128

BL

M21A

601S

L114

25V100n

C114

25V100n

C115

25V100n

C116

25V100n

C117

10kR123

50V4u7

C109

100RR124

16V

220n

C118

PL100

1

2

3

4

5

6

PL101

1

2

3

4

5

6

BLM21A601S

L102

PL

12

0

1 2 3 4 5

+5V_SPDIF

16V

100nC203

BLM21A601S

L124

1kR254

S103

S104

ESD_20V

D109

ES

D_20V

D110

ES

D_20V

D111

ES

D_20V

D112

ES

D_20V

D113

ES

D_20V

D114

ES

D_20V

D115

ES

D_20V

D116

ES

D_20V

D117

ES

D_20V

D118

ES

D_20V

D119

ESD_20V

D120

ES

D_20V

D121

ES

D_20V

D122

ES

D_20V

D123

S105

ES

D_20V

D124

B5V

1_S

OD

123

D125

PL121

1

2

24LC02

IC100

1 A0

2 A1

3 A2

4 VSS 5SDA

6SCL

7WP

8VCC

ST

BY

_P

R

5V

1

D108

S106

50V10n

C204

50V10n

C205

BLM21A601S

L125

08/10/2007 01 of 04

001.sht

Rev.03

Ver. AuthorYALCIN ELIK

Sheet

11AK57 VIDEO&AUDIO

OPTIONAL

DATE

COMMON

TV R&D GROUPVESTEL ELECTRONICS2.2.3. AK57 Chassis Scematics

2.2.3.1. Part1

10k

R826

1k

R841

L801

BA

159

D812

MT

P6N

60E

/SS

P7N

60A

Q802

33R

R833

4k7R842

UF5407

D814

16V1000u

C823

25V

1000u

C832

10RR824

2k2

R845

D800

400VMCR22_6

IC806

MC44608

1 DEMAG

2 I_SENSE

3 CONT_IN

4 GND 5DRIVER

6VCC

7NC

8VI

BC848BQ803

BYD33D

D808

C5V

6_S

OD

123

D813

A 1K 2

400V150uC809

2x27m

L800

123

4

+12V

1N4148

D816

1N

4007

D822

50V

100nC

826

2R2

R806

TCET110G

IC811

1

23

4

1k8

R835

50V68n

C841

BC848BQ804

BA159

D824

1kV100p

C820

1N

4007

D821

1k2

R832

PL

80

0

1 2

PL803

1

150n

C801

250V

PL

80

2

123

STBY

25V100nC812

33kR821

50V

100n

C830

75RR838

65uH

L806

1N

4148

D803

1kV100p

C821

22kR834

1N

4007

D818

50V

22n

C828

4M7

R810

630V47n

C810

2u2

L804

150n

C800

250V

33k

R820

1N

4007

D8201n

C802

1kV

B+

1N

4007

D823

50V

1n

C827

SMPS_46

TR800

DRAIN8

6+300V

7NC3

VVC

4

GND

3

NC2 5

NC1 2

NC

1

GND316

+112V15

+14V11

+8V59

GND112

+8V5_110

GND214

+22V13

9R

TH

800

99k

R839

1kR807

BYD33D

D809

22kR831

1N

4007

D819

1kV470pC817

50V33u

C813

4kV2n2

C805

330RR825

150uH

L807

L803

1kV1nC822

+12V_A

160V

47u

C840

3.1

5A

F800

4kV4n7

C804

1k

R830

1n

C806

1kV

VAR-510V

R803

2kR815

100V

4n7

C814

TL431SAMF2D802

1N

4148

D801

10k

R823

BC

858B

Q801

470R

R822

10k

R816

10k

R827

50V

1n

C816

50V47n

C815

50V

100p

C807

1kV

1n

C803

220u

C844

16V

+3V3_STB

50V

100n

C843

6V

32200u

C842

16V

220u

C833

UF5402

D807

1kV100p

C818

50V

100nC836

16V

470u

C824

UF5402

D811

1kV1nC825

BYD33D

D810

L4931IC813

1

2

3

50V

100n

C838

16V

2200u C

837

1kR836

+5V_DVD

+5V_DVD

LM1117IC815

4

VOUT2OUT

1

GND3 IN

+3V3_DVD

6V32200uC846

16V100nC845

+12V_IDTV

+12V_IDTV

+3V3_DVD

+33V_IDTV

PL804

1

2

3

4

5

6

2u2

L805

16V

1u

C834

+12V_DVD

+12V_DVD

16V2200uC831

50V

100n

C835

PL805

1

2

3

4

5

KA78R12IC814

4

VDIS2OUT1 IN

3

GND

+5V_STB

BC848BQ805

22kR843

22kR844

STBY

78L05_TO92IC812

1

2

3

1kV220p

C811

470R

R849

2k2

R846

1kV1n

C839BA159

D815

86k

R837

1N

4148

D825

RL800

1

2

3

4

5

6

S800

0R

22

R828

C8V

2

D804

4R7

R850

S817

TL431SAMF2

D827

1kV470pC847

160V

33u

C848

680R

R851

250V

1u

C849

1M

R852

150k

R853

MCR_GATE

MCR_GATE

1k

R854

50V

10u

C850

5k1

R855

5k1

R856BC848BQ808

25V

100n

C851

470R

R857

STB_SUPPLY

STB_SUPPLY

BC

327

Q809

BC848BQ810

BC848BQ811

10kR858

10kR859

10kR860

150R

R861

560RR862

C2V

7

D828

ES

D_20V

D829

ES

D_20V

D830

ES

D_20V

D831

10kR864

1N4148

D832

1N4148_SOD123

D805

1N

4148_S

OD

123

D806

S818

50V1n

C852

1k

R865

1N4148

D833

1N4148

D834

1N4148

D835

1N4148

D836

1k5R866

BC858BQ812

3k3

R867

+3V3_STB

22kR868

C2V4_SOD123

D838

16V

1u

C853

16V1uC854

1N

4148

D839

220k

R869

BC848BQ813

STBY

STBY_PR

AUDIO_PR

AUDIO_PR

HOR_PR

HOR_PR

+12V_IDTV

DVD_PR

DVD_PR

16V

1u

C855

680kR871

680kR872

680kR873

1kV

10n

C856

2W

3R

3R

863

08/10/2007Ver.

02 of 0403 SMPS GROUP

11AK57 SMPS

DATE

TV R&D GROUPVESTEL ELECTRONICS

002.sht

Rev. Author Sheet

PROTECTION

PL601

1

2

EHT

FOCUS

G2

FBT_AK19

TR600

COLLECTOR1

NC2

150V3

4E_W

45V5

15V6

GND17

HEATER8

200V9

EHTINFO10

10V11

GND212

GND313

BA159_SMD

D609

BU2508AF

Q603

VIDEO_B+

BA159

D607

1.6

kV

7n5

C611

250V

10u

C619

VIDEO_B+

B+

R6042k2

VPROT

2k2

R601

100p

C603

50V

2n2

C600

50V

50V

2n2

C601

VERT+

HER107D603

5k1

R606

390R

R607

PL600

1

227k

R605

STV9379FAIC600

1IN

VE

RT

_IN

2V

CC

3F

BK

SU

PP

LY

4G

ND

5O

UT

6O

UT

SU

PP

LY

7N

_IN

VE

RT

_IN

VERT-

63V

100u

C602

1R

R608

100V

100n

C608

1kR632

EHT_INFO

100V

22n

C625

+8V10kR634

22RR603

16V100uC605

+12V

HOUT

1N

4148

D612

2kV2n2C607

BC639Q600

R611

100R

47R

R618

100V47n

C606

BA159

D606

25V

470u

C615

25V

470u

C616

+14V

+14V

-14V

-14V

100V

22n

C604 10R

R612

+33V

50V

100u

C626

1/2W0R22R630

BA159

D611

+8V

16V

220u

C618

1/2W0R22R622

BY299

D608

4R7R614

75R

R617

BC639

Q602

16V

100u

C610

+5V

16V

100u

C609

1N

4148

D605

250V47nC612

+5V

1N

4148

D604

HFLYBACK 250V

330n

C622

5k1

R627

BA

159

D610

250V10u

C623

L600

1

42

3

5

100RR610

16V

100n

C617

1/2W0R47R624

250V47nC613

75R

R616

BC639Q601

C5V

6

D602

C8V

2

D601

10R

R609

33R

R633+33V_IDTV

C8V

2

D600

10k

R619

1/2W0R22R620

1/2W0R22R621

1W1R

R631

33R

R613

100k

R600

500V1n

C614

1/4

WR

628

PL603

1

2

3

4

50V

100n

C624

1/2W1R5

R602

TV R&D GROUP

03AuthorRev.

08/10/2007 03 of 04YALCIN ELIK

VESTEL ELECTRONICS

SheetVer.

11AK57 DEFLECTION

DATE

003.sht

HEATER

+9V

50V180p

C903

3k3

R905

1k8R904

1k5R920

100RR917

10k

R911

PL

90

6

1

3k3

R903

2SC2482Q900

2SC2482Q902

50V180p

C902

1k5R923

1k8R900

PL

90

3

1234

330R

R910

G3

EHT

PL902

5

R

3

G

B

8

2G1

4G2

6GND

7F2

1 9

100RR918

10k

R912

3k3

R901

1k8R902

1kV2n7

C913

PL905

1

50V180p

C901

50V

820p

C909

PL900

1

2

3

4

51k5

R919

BF421Q904

50V

820p

C905

2SC2482Q901

PL904

1

50V

820p

C907

PL907

1

50V220pC900

100RR922

330R

R909

BF421Q903

10k

R907

330R

R914

BF421Q905

G3

EHT

PL901

5

R

3

G

B

8

2G1

4G2

6GND

7F2

1 9

+200V

+200V

+200V

BF422Q906

BF422Q907

BF422Q908

75R

R924

75R

R925

75R

R926

+200V

+200V

+200V

+200V

08/10/2007Ver.

04 of 0403 YALCIN ELIK

11AK57 CRT BOARD

DATE

TV R&D GROUPVESTEL ELECTRONICS

004.sht

Rev. Author Sheet

2.2.4. DVD PLAYER

2.2.4.1. General Description

2.2.4.1.1. MT1389D The MT1389D Progressive Scan DVD-Player Combo Chip is a single-chip MPEG video decoding chip that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. Copy protection, DVD system navigation, system control and housekeeping functions. The features of this chip can be listed as follows:

Features • Progressive scan DVD-player combo chip • Integrated NTSC/PAL encoder. • Built-in progressive video output • DVD-Video, VCD 1.1, 2.0, and SVCD • Unified track buffer and A/V decoding buffer. • Direct interface of 32-bit SDRAM. • Servo controller and data channel processing. Video Related Features: • Macrovision 7.1 for NTSC/PAL interlaced video. • Simultaneous composite video and S-video outputs, or composite and YUV outputs, or composite

and RGB outputs. • 8-bit CCIR 601 YUV 4:2:2 output. • Decodes MPEG video and MPEG2 main profile at main level. • Maximum input bit rate of 15Mbits/sec Audio Related Features: • Dolby Digital (AC-3) and Dolby Pro Logic. • Dolby Digital S/PDIF digital audio output. • High-Definition Compatible Digital. (HDCD) decoding. • Dolby Digital Class A and HDCD certified. • CD-DA. • MP3.

2.2.4.1.2. SDRAM Memory Interface

The MT1389D provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16MB of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb addressing. The memory interface controls access to both external SDRAM memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers.

2.2.4.1.3. Drive Interfaces The MT1389D supports the DV34 interface, and other RF and servo interfaces used by many types of DVD loaders. These interfaces meet the specifications of many DVD loader manufacturers.

2.2.4.2. System Block Diagram and MT1389D Pin Description

2.2.4.2.1. MT1389D Pin Description

2.2.4.2.2. 2.1 Sytem Block Diagram

A sample system block diagram for the MT1389D DVD player board design is shown in the following figurre:

2.2.4.3. Audio Output The MT1389D supports two-channel and six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389D also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.

2.2.4.4. Audio DACS The MT1389D supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389D internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-channel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.

2.2.4.5. Video Interface

Video Display Output The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the MT1389D. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode. The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation.

Video Bus

The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many chrominance lines as luminance.

Video Post-Processing The MT1389D video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through a combination of special hardware and software. Horizontal upsampling and filtering is done with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable scaling ratio.

Video Timing The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically is used for TV displays, the single for computer displays.

2.2.4.6. Flash Memory The decoder board supports 70ns Flash memories. FLASH_512K_8b The MT1389D permits 8- bit common memory I/O accesses.

2.2.4.7. Serial Eeprom Memory An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.

2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component Configuration

The MT1389D audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew. The transmit I2S interface supports the 112, 128, 192, 256, 384, and 512 sampling frequency formats, where sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S transmit interface can be 16, 18, 20, 24, and 32-bit samples. For Linear PCM audio stream format, the MT1389D supports 48 kHz and 96 kHz. Dolby Digital audio only upports 48 kHz. The MT1389D incorporates a built-in programmable analog PLL in the device architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or an input to the MT1389D. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in (RSD) and audio receive frame sync (RWS).

2.2.4.9. Scematics

2.2.4.9.1. Part1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MUTE

AUDIO OUT 3C

1 5Saturday, December 09, 2006

COMMON1389E_HD60

MediaTek Confidential

changqiao

Tom Wang

Title

Size Document Number Rev

Date: Sheet of

MediaTek (ShenZhen) Inc.

Drawn:

Checked:

+12V

ALLCH

+12V

ARRCH

DV33

VCC

GND

A_MUTE

A_MUTE

1/2VCC

AL

MUTE_DAC

AR

MUTE_DAC

A_MUTE

1/2VCC

LCHRCH

1/2VCC

+12V

DV33[1,2,3]

VCC[1,2,4]

GND[1,2,3,4]

AR[2]AL[2]

MUTE_DAC[2]

LCH [4]RCH [4]

+12V[1]

DV33

+12V

VCC

+12V

Q253906

2

13

C74 100pF

R1185.1k

R1265.1k

+

C79

10uF/16v

R17210k

+

-

U13ANJM4558 OPA

3

21

84

+

C80 10uF/16v

D19 1N4148/NC1 2

R119100

R147 1K

Q162N3904SOT23

2

13

R120 10K

R174

10k

CB57

0.1uF

C78 100pF

+

-

U13BNJM4558 OPA

5

67

84

R124 470 + CE31

100uF/16V

R121

10K

C77

1000pF

R125

10k

R127100

R134

10K/NC

Q28 3906/NC

2

1 3

D17

4.7V

12

R173100k

R171

10K/NC

+ CE38

47uF/16V

C83

1000pF

R123 22k

+

C75

10uF/16v

R11624k

Q153906

2

13

R12224k

Q142N3904SOT23

2

13

R117

10k

+

C76 10uF/16v

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3906C

EB

OPTICALP=2.54mm

B E3904 / 3906

C

VIDEO OUT 3Custom2 5Saturday, December 09, 2006

COMMON1389E_HD60


changqiao

Tom Wang

Title


Date: Sheet of


Drawn:

Checked:

G

CVBSR

VB

LCHRCH

ASPDIF

R

R/V

VCCGND

VB

G

CVBS

CVBSO

G/Y

B/U

CVBSO

RGB/CVBS#

B/U

RGB/CVBS#

G/YR/V

ASPECT

LCH

ASPECT

RCH

ASPDIF

+12V

+5VV

G[2]R[2]CVBS[2]

VB[2]

ASPDIF[2]LCH[5]RCH[5]

VCC[1,2,5]GND[1,2,3,5]

RGB_SWITCH[ 2 ]

FS0[ 2 ]

FS1[ 2 ]

+12V[1]

VCC

+5VV

+5VV

+5VV

+5VV

+5VV

+5VV

+5VV

+5VVVCC

VCC

+12V

+5VV

D29

1N4148/NC

12

R80

75/NC

Q63906/NC

2

13

L27 1.8uH

L20

10uH/NC

D21

1N4148/NC

12

R9175

C109

0.1UF

R184 680

C105

47P

C57

47P

+ C50

47uF/16v/NC

D28

1N4148/NC

12

L23 1.8uH

D20

1N4148/NC

12

R186

75

L28 1.8uH

R76 0

R9075

C110

100PF

+ C5210uF/16v

R8675/NC

Q113906/NC

2

13

Q32

2N39042

13

R183 2K

C58

47P

C48

0.1uF

R180

100/NC

R178 100

D27

1N4148/NC

12

C111

100PF

R87

75/NC

Q103906/NC

2

13

R188 2k

C51

0.1uF

C100

47P

R89 0

D26

1N4148/NC

12

R7875

Q30

90142

13

D25

1N4148/NC

12

L26 1.8uH

Q31

2N39042

13

C63

47P

D24

1N4148/NC

12

R8475

R181 10K

R74

75/NC

C112

27PF

Q293906

2

13

R182 4.7K

J10

TJC3-3AW

123

R185

1k

R73 33

TP3

R187 2k

R88 0

C64

47P

R179 75

J9

TJC3-10AW

12345678910

C101

47P

Q83906/NC

2

13

C104

47P

R82 0

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

16Mb

IIC

DRAM

FLASH

FLASH

DRAM

SDRAM&FLASH 3B


COMMON1389E_HD60


changqiao

Tom Wang

Title


Date: Sheet of


Drawn:

Checked:

A9

A3AD3

A1

A19

A4

AD6

AD1

A17A16

A13A14

AD0A2

A6

A8

A18

AD7A7

AD5

A12

A15

A10

AD2

AD4

A11

A5

A0

DBA1

DQ8

DQ14

MA11

DRAS#

MA2

DQ15

MA5

DQ10

MA4

DQ13

MA8

DBA0

DQM1

DCS#

DQ9

SDCLK

MA9

DQ11

MA3

MA6

DQM0

MA7

MA0

DCAS#DWE#

MA10

SDCKE

DQ12

MA1

A20 AA20

PRD#PWR#

AA20

DQ2

DQ5

DQ1

DQ6

DQ4DQ3

DQ0

DQ7

DQ6

DQ11

DQ0

DQ7

DQ3DQ2

DQ5

DQ10

DQ12DQ13

DQ8DQ9

DQ1

DQ15

DQ4

DQ14SDCLKSDCKE

DWE#

DBA1

DCAS#

MA0

MA8

MA1

MA3MA2

MA9MA10

MA6MA7

DBA0

DQM1DQM0

SDA

AD[0..7]

DQ[0..15]

SCL

PRD#PWR#

DWE# WE#

DCS#RAS#

DCAS#

CS#DRAS#

CAS#

DBA0 BA0

DCKE

DBA1 BA1

SDCLK

SDCKE

A[0..20]

CAS#RAS#

CS#WE#

MA[0..11]BA[0..1]DQM[0..1]DCLKDCKE

GNDDV33

VCC

DCLK

MA4MA5

DRAS#

PCE#

PCE#

GND

SD33

SCLSDA

DQ[0..15][2]

SCL[2,3]

AD[0..7][2]

SDA[2,3]

PRD#[2]PWR#[2]

A[0..20][2]

CAS#[2]

WE#[2]CS#[2]

RAS#[2]

MA[0..11][2]

DQM[0..1][2]BA[0..1][2]

DCLK[2]DCKE[2]

DV33[1,2,5]GND[1,2,4,5]

VCC[1]

PCE#[2]

SD33

SD33DV33 SD33

SD33

SD33

FVCC

FVCC

FVCC

DV33

DV33

DV33 FVCC

R85 0

L29 FB

CB40

0.1uF

C10710PF

R61 33

CB52

0.1uF

R63 33

CB460.1uF

+ CE25

47uF/16v

U7

ESMT M12L16161A-7

1

23

4

56

7

89

10

1112

1314

15161718

1920

21222324

25

26

272829303132

33

3435

36

37

38

3940

41

4243

44

4546

47

4849

50

VCC

DQ0DQ1

VSSQ

DQ2DQ3

VCCQ

DQ4DQ5

VSSQ

DQ6DQ7

VCCQDQML

WECASRASCS

BA/A11A10

A0A1A2A3

VCC

VSS

A4A5A6A7A8A9

NC

CKECLK

DQMH

NC

VCCQ

DQ8DQ9

VSSQ

DQ10DQ11

VCCQ

DQ12DQ13

VSSQ

DQ14DQ15

VSS

U9

IC FLASH MX29LV800 8Mb

2524232221201918

8

10

28

4716

29313335

7

26

384042443032

14

3639414345

37

2711

9

34

46

6

45

321

4817

12

A0A1A2A3A4A5A6A7A8

A20

OE

BYTEA18

D0D1D2D3

A9

CE

D4D5D6D7D8D9

WP/ACC

D11D12D13D14

D15/A-1

VCC

GND1WE

A19

D10

GND2

A10

A12A11

A13A14A15A16A17

RESET

U8

ESMT M12L64164A/N.CTSOP54

1

24

12

57

9

810

46

1113

15

16171819

3522

23242526

14

41

293031323334

36

3738

39

40

43

4244

52

4547

49

48505153

54

2021

3

6

27

28

VCC

DQ0DQ1

VSSQ

DQ2DQ3

VCCQ

DQ4DQ5

VSSQ

DQ6DQ7

DQML

WECASRASCS

A11A10/AP

A0A1A2A3

VCC

VSS

A4A5A6A7A8A9

NC

CKECLK

DQMH

NC

VCCQ

DQ8DQ9

VSSQ

DQ10DQ11

VCCQ

DQ12DQ13DQ14DQ15

VSS

BA0/A13BA1/A12

VCCQ

VSSQ

VCC

VSS

R70

10k

CB430.1uF

U11

EEPROM 24C02SOP8

1234 5

678NC

NCNCGND SDA

SCLWP

VCC

RN1

33x4

1 23 45 67 8

CB450.1uF

CB42

0.1uF

CB53

0.1uF

R671k

CB38

0.1uF

CB470.1uF

R68

10k

CB50

0.1uF

R62 33

CB41

0.1uF

CB39

0.1uF

R651k

R60 33

R64 0/NC

+CE26

10uF/16v

CB440.1uF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IIC

G

VIDEO INTERFACE

C

2SK3018

2N3904

B

FLASH

AUDIO INTERFACE

3

3

2SB1132

1

3

2

E

C

1

2

E

MEMORY

1

D

B

S

C

RS-232

use DIP decal

MT1389E LQFP 216 3C


COMMON1389E_HD60


changqiao

Tom Wang

Title


Date: Sheet of


Drawn:

Checked:

DMSO

PCE#

V1P4

FOSO

TRSO

A

WE#

F+

AD[0..7]

SCL

SP+SL-

T+

C

RAS#

ASPDIF

PRD#PWR#

D

SL+

DCLK

DCKE

FMSO

T-

SP-

B

IOA

SDA

AVCC1

CAS#

LDO1

LDO2

OP-

D

CS#

BA[0..1]

DQM[0..1]

PWR#PCE#

V20

V1P

4

V1P4

JITFO

ADIN

A5

A11

A19

AD

7

V20

LDO1

B

BA0

DCLK

MA11MA9

MA5

AD

0

TEZISLV

CC

ADIN

A7

DD

BB

WE#

RAS#

MA6

PC

E#

VS

CK

RFV

DD

3

AD

6

CS#

A16

A13

A10

FMO

C

OPO

MA7

MA4

OP+

FE

AA

MA3

A6

DMO

V2P8

DQ8

BA1

MA0

DCKE

PRD

#

AD

3

V2P8

DQM1

MA1

A1

AD

1

A12

FOO

CAS#

MA10

RFV

DD

3

AD

2

AD

5

A14

A9

JITFN

TRO

PW

R#

A20

OP-OPO

OP+

A4

A8

TROPEN

LDO2

A

DAC

VDD

3

A2

A0AD

4

A15

RFV

18

MA2

MA8

A3

V1P4

PLL

VD

D3

A17

STBY

RFO

F-

SD

A

MDI1

SP-

SL+SL-

LIMITSP+

CDIOARFOABF

V20AVCC1

E

LD-CDMDI1AVCC1

LD-DVD

V18

VS

DA

SC

L

VS

TB

RX

DTX

D

UR

ST#

IR

DQ12

DQ10

DQ9

DQ2

DQ0

DQ14

DQ1

DQ4

DAC

VDD

3

FSVREF

TRIN

RFV

DD

3

JITF

OJI

TFN

XO

XI

XTA

LI

PLLVDD3

APLLVDD3

AP

LLV

DD

3

ADAC

VDD

3

AL

AR

R VB

G

CV

BS

MUTE_DAC

STBY

MUTE_DAC

CVBSRGVB

ALAR

DQ

7D

QM

0

DQ

6D

Q5

ASPDIFDACVDD3

ADACVDD3

ADAC

VDD

3

AD

VC

M

AA

DV

DD

3

VSTBVSDAVSCK

RFV18

AADVDD3DV33

TRC

LOSE

IOA

FS0RGB_SWITCH

URST#VCC

IR

DV33GND

DQ3

DQ11

MA[0..11]DQ[0..15]

DQ13

DQ15

TxDRxD

V1P4

FMO

FOO

V1P4

V1P4

DMO

V1P4

TROFMSODMSO

FOSOTRSO

TRIN

LOAD+TROUT

LOAD-

MOVCC

TROPEN

LOAD+

TROUT

LIMITV18

A[0..20]

A18

RFVDD3

DACVDD3

VCC

TRCLOSE

LOAD-

RFVDD3

RFV33

RFV33

DV33

GND

GND

XI XO

FS1FS0

RGB_SWITCH

FS1

SDA [3]

PCE# [3]

ASPDIF [4]

SCL [3]

PRD# [3]PWR# [3]

WE# [3]CS# [3]

RAS# [3]CAS# [3]DCKE [3]

DCLK [3]

AD[0..7] [3]

PCE# [3]PWR# [3]

BA[0..1] [3]

DQM[0..1] [3]

CVBS [4]R [4]G [4]VB [4]

AL [5]AR [5]

VSCK [1]

VSTB [1]VSDA [1]

MUTE_DAC [5]

FS0 [4]RGB_SWITCH [4]

URST# [1]

VCC [1,4,5]

IR [1]

DV33 [1,3,5]GND [1,3,4,5]

DQ[0..15] [3]

MA[0..11] [3]

A[0..20] [3]

FS1 [4]

AVCC1

RFV33

VCC

VCC MO_VCC

MO_VCCMO_VCC

V18

DV33

DV33

V18

DV33

RFV33

V18

DV33

DV33

V18

DV33

DV33

ADACVDD3

V18

DV33

VCC

DV33

DV33

DV33

DV33

L37 FB

C40

330pF

C9

0.1u

F

C15

0.47

uF/N

.C

C37NC

R33 10k

CB27

0.1uF

C32 1uF

R31 100k

R40 10

+ CE22

47uF/16v

J2

PH2.0-6AW

654321

J4

PH2.0-5AW

12345

CB31

0.1uF

C41

0.1uF

CB16

0.1uF

CB20

0.1uF

L31 FB

C29 1uFC30 1uF

C42

0.015uF

+CE36

47uF/16v

CB24

0.1uF

C17

1000

pF

+ CE1210uF/16vDC4

+

C14

10uF/16v

R23 1

TP4

+ CE2147uF/16v

CB33

0.1uF

R26

560

R16150k

CB19

0.1uF

CB15

0.1uF

C4 2200pF

CB10

0.1uF

TOP

HA1

HEADER 24 SMD0.5 TOP

242322212019181716151413121110987654321

2526

R58

10k

+ CE16

47uF/16v

C13

1500pF

C27

0.1u

F

R15150k

Q12N3904

2

13

L10

1.8uH

C39

330pF

R83 1

CB14

0.1uF

C36

0.1uF

R17533 Y1

27MHz

R4 100

R20 NC

+CE1947uF/16v

Q24

8550

R54 10k

Q98050

1

2

3

+C12

10uF/16v

R47 18k

R431

C3 390pF

Q218550

C44

150pF

Q208050

1

2

3

R5210k

CB26

0.1uF

R38NC

U4

CD5954

1

910

12

32

15

7

1413

21

1920

24

27

6

45

28

8

111718

16

2322

2526

2930

VINFC

PVCC1PGND

VOSL+

CF2CF1

VOTK+

VNFFC

VOFC+VOFC-

PVCC2

PGNDVNFTK

CTK2

BIAS

VOSL

VINSL+VINSL-

STBY

VCC

VOSL-VOLD+VOLD-

VOTK-

VINLDPREGND

CTK1VINTK

G1G2 R7 2K

CB30

0.1uF

C50.1uF/NC

R5320k

C33 1uF

C1833pF

L11 10uH0603

R5 100

C216800pFC0603/SMD

+ CE17

47uF/16v

R17

680k

R8 2K

R421

R55 20k

CB17

0.1uF

R17633

+ CE13

47uF/16v

CB22

0.1uF

R32 10k

R11 680k

Q5

85502

13

+ CE24

47uF/16v

R35 100k

+CE15

47uF/16v

CB18

0.1uF

CB34

0.1uF

C43150pF

R18

15k

+ CE34

100uF/16v

C108

100NF

C23

0.03

3uFCB13

0.1uF

CB23

0.1uF

R49 10k

CB28

0.1uF

L13FB

R451

C34

0.1uF

CB36

0.1uF

R41 10

C24

0.04

7uF

C31 1uF

C1933pF

R13

100k

CB32

0.1uF

L30 10UH

MT1389EPin Assignment v1.4

U3MT1389ELQFP216/SMD

2

210

345

1

212

213

6789

1011121314151617181920212223

216

2827

3029

3231

43

2625

33343536

4241

45

3940

46

3837

65646261605958

52

81777655 7473727163 83

5354

7057 827566 68 806956 67 84 85 86 87 88 89 90 91 92 93 94 95 106

96 97

204

205

98 99 100

101

102

103

104

105

107

108

162161160159158157156155154153152151150149148147146145144143142141140139

137138

136135134133132131130129128

126127

125124123122121120

118119

117116115114113

111112

110109

209

215

24

214

191

189

198

197

208

207

196

211

206

203

201

202

200

199

194

195

192

184

185

182

181

180

179

186

178

177

175

173

174

164

171

170

169

168

172

167

166

165

163

193

44

4748495051

78 79

176

183

188

190

187

DVDA

CR

TPLP

DVDBDVDCDVDD

AGND

OSP

OSN

DVDRFIPDVDRFINMAMBMCMDSASBSCSDCDFONCDFOPTNITPIMDI1MDI2LDO2LDO1

AVD

D3

V2REFOSGND

VREFOV20

TEOFEO

FG/ADIN1

RFLVL/RFONCSO/RFOP

TEZISLVOP_OUTOP_INNOP_INP

FOOTRO

GPIO1/HSYNC#

TROPENPWMPWMOUT1/ADIN0

GPIO2

FMODMO

HIG

HA2

HIG

HA3

HIG

HA5

HIG

HA6

DVD

D3

HIG

HA7

A16

IOA6

AD

7

AD

5A

D4

IOA

18

DV

SS

AD

2A

D1

AD

0

HIG

HA4

IOA

0

IOA7HIGHA0

IOO

E#

IOW

R#

A17

AD

3

HIG

HA1

IOC

S#

ALE

IOA

1

IOA

19

IOA

20

DVD

D18

UW

R#

UR

D#

DVD

D3

UP

1_2

UP

1_3

GPI

O6

UP

1_4

UP

1_5

UP

1_6

UP

1_7

UP

3_0

RD

6

UP

3_1

UP

3_4

ADC

VDD

3A

DC

VS

S

UP

3_5

GPI

O7

ICE

PR

ST#

IR INT0

#D

QM

0#R

D7

RD

5D

VDD

3

FSVREF

DACVDDCSPDIF

MC_DATAASDATA3ASDATA2ASDATA1ASDATA0

ALRCKACLKABCK

GPIO5DVSS

GPIO4GPIO3

DVDD18RA4RA5RA6RA7RA8RA9

RA11

DVDD3CKE

RCLKRA3RA2RA1

DVDD18RA0

RA10BA1BA0

RAS#RCS#

CAS#RWE#DQM1

RD8RD9

DVSS

RD11RD10

RD12RD13RD14RD15

RD0

RD2RD1

RD3RD4

HR

FZC

IRE

F

SVDD3

RFG

C

RFG

ND

18

ADAC

VDD

1

IDA

CE

XLP

PLL

VS

S

RFR

PA

CR

FRPD

C

JITF

N

RFG

ND

RFV

DD

3

LPFO

P

LPFI

PLP

FIN

LPFO

NP

LLV

DD

3

XTA

LIJI

TFO

RFV

DD

18

AR

/SD

ATA

1A

VC

M

AR

F(S

W)

AD

AC

VS

S2

AD

AC

VS

S1

AP

LLV

SS

AL/

SD

ATA

2

AP

LLC

AP

AP

LLV

DD

AK

IN1

AK

IN2

AD

VC

M

CV

BS

R/C

r/CV

BS

/SY

B/C

b/S

CD

AC

VS

SA

G/Y

/SY

/CV

BS

AA

DV

SS

DAC

VDD

AD

AC

VS

SB

DAC

VDD

B

DA

CV

SS

C

XTA

LO

GPIO0/VSYNC#

IOA2DVDD18IOA3IOA4IOA5

AD

6IO

A21

AA

DV

DD

AR

S

ALF(

CTR

)

ADAC

VDD

2

ALS

/SD

ATA

0

+

C1110uF/16v

R441

R46 20k

R48 15k

R24 10k

C260.1uF

+ CE18

47uF/16v

C162200pF

R196.8

R12 0

Q2

2SK3018

2

13

CB21

0.1uF

R14 100k

C38

0.1uF

C10

20pF

R1010

C25

0.04

7uFC20

0.1u

F

CB11

0.1uF

C45

0.1UF

R9 750k

J3

PH2.0-4AW

4321

C286800pFC0603/SMD

+ CE1410uF/16v

C6

0.1uF

Q3

2SK3018

2

13

CB25

0.1uF

CB12

0.1uF

R50 10k

C22

0.1u

F

Q4

85502

13

R51 20k

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

COMMON1389E_HD60_V3

Audio DAC

MT1389E

Audio 3.3V

DEVICE

Date

DVDD3

TYPE

Digital 1.8V

Digital 3.3V

2 MT1389E

OP AMP.

NAME

DV33 History

Audio +12V

Digital 5V

Audio DAC

Servo 3.3VRev

Audio 5V

MT1389E

VCC

V1

Digital 3.3V SDRAM

RFV33

SD33

AVDD5

P#

1 INDEX & POWER, RESET

MT1389E

4 VIDEO OUT & AV-CON

SUPPLY

V18

+12V-12V Audio -12V OP AMP.

AV33 Laser Diode 3.3V

3 SDRAM & FLASH

5 AUDIO OUT - WM8766

2005.01.19

MT1389E (LQFP216) DVD MP Board for SANYO HD60 PUH

Initial released. Modified from 3-SY1389DP1-V11

RESET Circuit

V2 Add SCART and VGA output 2005.03.01

V3 Modify Video backend circuit.2005.03.09

P=2.54mm

P=2.54mm

INDEX 3C


COMMON1389E_HD60


changqiao

Tom Wang

Title


Date: Sheet of


Drawn:

Checked:

URST#

VCC

URST#

DV33

IR

VSTB

VSCKVSDA

VSCK

GND

IRVCCVSDA

+12V

IR

VSTB

GND [ 2,3,4,5]

VCC [ 2,4,5 ]

URST# [ 2 ]

DV33 [ 2,3,5]

IR [ 2 ]

VSCK[2]VSDA[2]VSTB[2]

+12V [4 5 ]

+12V

DV33

V18

+12VCC

+5VCC

+3.3VCC

DV33

VCC

+3.3VCC

+5VCC

+12VCC

VCC

DV33

+3.3VCC

+CE10

100uF/16v

+ CE7

100uF/16v

C110pF

D9

1N4007

L32

FB

R3

10k

FM1

FM2

L36 FB

CB80.1uF

CON1

TJC3-6AWHEAD6-2.54/H

123456

R2

10K

U10AZ-1117 3.3V/NC

3

1

2IN

GN

D

OUT

+ CE910uF/16vDC4

+ CE1

10uF/16v

L35 FB

CB5

0.1uF

CB7

0.1uF

R177

10

CON2

TJC3-6AW

123456

CB3

0.1uF

D3

1N4148

+CE5

100uF/25v

+CE39

100uF/16v/NC

R1

10k

+ CE2

100uF/16v

L33

FB

R610k

D11

1N4007+ CE37

100uF/16v

2.3. AK57 Service Menu

S-No OSD Tanım ( Definition )

Mümkün Ayarlar ( Possible Settings )

Varsayılan Değer ( Default )

001 FAPS First APS ON = Aktif OFF = İn-Aktif ON = Active OFF = In-active

OFF

002 ISPM I2C Modu ( I2C Mode )

OFF OFF

003 INIT Yazılım ve donanım resetleme ( Resetting software and hardware )

ON = Resetleme aktif OFF = Resetleme in-aktif ON = Enable resetting OFF = Disable resetting

OFF

Table 1 Init




004 AGCSPD IF AGC hızı ( IF AGC speed )

0 = Yavaş 1 = Standart 2 = Hızlı 3 = Hız seviyesi 2’ den daha yüksek 0 = Slow 1 = Standard 2 = Fast 3 = Fastest

1

005 AGCTO AGC Take over 0..63 31

Table 2 AGC Servis ayarları ( AGC Service settings )




006 COFF Cut – Off Ayarı ( Cut-Off setting )

0..63 32

Table 3 VG2 Alignment Servis ayarları ( VG2 Alignment Service settings )




007 VERT SLOP Dikey eğim (VSL), SBL biti yarı blank’e anahtarlanmalıdır. ( Vertical slope (VSL), SBL bit should be keyed to half-blank.)

0..63 32

008 SCORRECTION S-doğrulaması (SC) ( S-correction (SC) )

0..63 32

009 VERT SHIFT 4:3 Wide Screen için dikey kaydırma ( 4:3 vertical shifting for Wide Screen )

0..63 32

010 VERT AMP Dikey genlik (VA) ( Vertical Amplitude (VA) )

0..63 32

011 HOR SHIFT Yatay kaydırma ( Horizontal shifting )

0..63 32

012 VERT SHIFT16 16:9 Wide Screen için dikey kaydırma ( 16:9 vertical shifting for Wide Screen )

0..63 32

013 VERT AMP16 16:9 Dikey genlik ( 16:9 Horizontal amplitude )

0..63 32

014 RGB HSH 50 Hz’lik RGB modunda yatay kaydırma ( In RGB mode with 50 Hz, horizontal shifting )

0..63 37

015 RGB HSH60 60 Hz’lik RGB modunda yatay kaydırma ( In RGB mode with 60 Hz, horizontal shifting )

0..63 37

016 60HZ HSH 43 4:3 MODE 60 Hz yatay kaydırma ( In 4:3 MODE with 60 Hz, horizontal shifting )

0..63 31

017 60HZ VSH 43 4:3 MODE 60 Hz dikey kaydırma ( In 4:3 MODE with 60 Hz, vertical shifting )

0..63 31

018 60HZ VA 43 4:3 MODE 60 Hz dikey genlik ( In 4:3 MODE with 60 Hz, vertical amplitude )

0..63 31

019 60HZ VSH 169 16:9 MODE 60 Hz dikey kaydırma ( In 16:9 MODE with 60 Hz, vertical shifting )

0..63 31

020 60HZ VA 169 16:9 MODE 60 Hz Dikey genlik ( In 16:9 MODE with 60 Hz, vertical amplitude )

0..63 31

Table 4 Geometri Servis ayarları ( Geometry Service settings )

S-No OSD Tanım

( Definition ) Mümkün Ayarlar ( Possible Settings )


021 QSS Qss amfi mode değiştirici ( Switching the mode of the QSS amplifier )

ON = QSS Aktif OFF = QSS İn-aktif ON = QSS Active OFF = QSS In-Active

ON

022 OIF IF-PLL’de DC ofset doğrultması ( DC offset correction at IF-PLL )

0..63 29

023 IF PLL demodulatör frekansı ( PLL demodulator frequency )

0 = 58.75 MHz 1 = 45.75 MHz 2 = 38.90 MHz 3 = 38.00 MHz 4 = 33.40 MHz 5 = 42.00 MHz 6 = 33.90 MHz 7 = 48.00 MHz 8 = EXTERNAL

2

024 OFR Frekans Girişi Aktivasyonu: Installation menüsündeki Tuning Mode olan Frekans modunu aktif veya pasif hale getirir. ( Frequency Entry Activation: Frequency mode which is value Tuning Mode item on the Installation menu can be enabled or disabled by OFR. )

ON = Aktif OFF = İn-aktif ON = Active OFF = In-Active

ON

025 FFI IF-PLL Hız filtresi ( Fast filter IF-PLL )

ON =Hızlı zaman sabiti OFF = Normal zaman sabiti ON = Fast time constant OFF = Normal time constant

OFF

026 BS1 (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..15 1


0..15 2


0..15 4

029 CB (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255 142




030 B1-H (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255 12

031 B1-L (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255 32

032 B2-H (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255 30

033 B2-L (Gerekli ayarlamayı yapmak için ilgili Tuner dökümanına bakılmalıdır.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255 2

Table 5 Tuning Servis ayarları ( Tuning Service settings )




034 FRAV AV için Peaking merkezi frekansı ( For AV, Peaking center frequency )

0 = 2.7 Mhz 1 = 3.1 Mhz 2 = 3.5 Mhz

1

035 YSCM SECAM için Y-delay ayarı ( For SECAM, Y-delay setting )

0..15 12

036 YNTS NTSC için Y-delay ayarı ( For NTSC, Y-delay setting )

0..15 2

037 YPAL PAL için Y-delay ayarı ( For PAL, Y-delay setting )

0..15 2

038 YAV1 AV-1 için Y-delay ayarı ( For AV-1, Y-delay setting )

0..15 4

039 YSVHS SVHS için Y-delay ayarı ( For S-VHS-2, Y-delay setting )

0..15 4

Table 6 Video Servis ayarları ( Video Service settings )

S-No OSD Tanım



040 WPRC Cold için White point Red

0..63 32




( For Cold, White point Red ) 041 WPGC Cold için White point Green

( For Cold, White point Green )

0..63 32

042 WPBC Cold için White point Blue ( For Cold, White point Blue )

0..63 31

043 BLORB Black seviyesi ofset Red – Blue ( Black level offset Red – Blue)

0..63 32

044 BLOG Black seviyesi ofset Green ( Black level offset Green )

0..63 32

045 WPRN Normal için White point Red ( For Normal, White point Red )

0..63 37

046 WPGN Normal için White point Green ( For Normal, White point Green )

0..63 32

047 WPBN Normal için White point Blue ( For Normal, White point Blue )

0..63 19

048 BLRB-RGB RGB için Black seviyesi ofset Red – Blue ( For RGB, Black level offset Red – Blue )

0..63 32

049 BLG-RGB RGB için Black seviyesi ofset Green ( For RGB, Black level offset Green )

0..63 32

050 WPRW Warm için White point Red ( For Warm, White point Red )

0..63 49

051 WPGW Warm için White point Green ( For Warm, White point Green )

0..63 40

052 WPBW Warm için White point Blue ( For Warm, White point Blue )

0..63 25

053 BLRB-YUV YUV için Black seviyesi ofset Red – Blue ( For YUV, Black level offset Red – Blue )

0..63 32

054 BLG-YUV YUV için Black seviyesi ofset Green ( For YUV, Black level offset Green )

0..63 32

055 WPRW-RGB RGB için White point Red ( For RGB, White point Red )

0..63 32

056 WPGW-RGB RGB için White point Green ( For RGB, White point Green )

0..63 40

057 WPBW-RGB RGB için White point Blue ( For RGB, White point Blue )

0..63 32

Table 7 White ton ayarları ( White tone adjustments )




058 OSO Dikey overscan’de Switch-off ( Switch-off at vertical overscan )

ON = Aktif Switch-off OFF = İn-aktif Switch-off ON = Enable Switch-off OFF = Disable Switch-off

ON

059 FSL Dikey sync için Forced Slicing seviyesi ( For vertical sync, Forced Slicing level )

ON = Sync genliği %60’ı sabit seviyede bulunan dikey slicing OFF = Otomatik dikey slicing seviyesi ON = Vertical slicing level fixed to 60% of sync amplitude OFF = Automatic vertical slicing level

OFF

060 PN8-STB If option is ON TV can open from stanby when PIN8 is activated

OFF = feature is not avaliable ON = feature is avaliable

OFF

061 PWL Peak white sınırlayıcı ( Peak white limiting )

0..15 8

062 BPS Bypass chroma temel-band ( Bypass chroma base-band )

ON = Bypass temel-band kroma gecikme çizgisi OFF = Temel-band kroma gecikme çizgisi aktif ON = Bypass baseband chroma delay line OFF = Baseband chroma delay line active

OFF

063 CLPL Soft kırpma seviyesi ( Soft clipping level )

0 = PWL‘in 0% üstünde 1 = PWL’in 5% üstünde 2 = PWL’in 10% üstünde 3 = İn-aktif 0 = 0% above PWL 1 = 5% above PWL 2 = 10% above PWL 3 = Off

0

064 CL Katot drive seviyesi ( Cathode drive level )

0..15 10

065 ST-LMI Option for sleep timer last minute indicator

ON = last minute indicator appears on TV OFF = last minute indicator does not appear on TV

OFF




066 DNMENU Dynamic Menu Mode ON = Dynamic Menu Enable OFF = Dynamic Menu Disable

OFF

067 UK-EU IDTV UK veya PAN-EU OFF = 0 UK (IDTV UK) ON = 1 PAN-EU (IDTV PAN-EU)

OFF

Table 8 Bit Kontrol Servis ayarları ( 8 Bit Control Service settings )




068 FAVI FAV ( FAV )

ON = Aktif OFF = İn-aktif ON = Active OFF = In-active

ON

069 BAVI BAV ( BAV )


OFF

070 BSVI SVHS ( SVHS )


OFF

071 SSTDBG BG ses standardı ( BG sound standard )


ON

072 SSTDI I ses standardı ( I sound standard )


ON

073 SSTDDK DK ses standardı ( DK sound standard )


ON

074 SSTDL L- L prime ses standardı ( L- L prime sound standard )

ON = Aktif OFF = İn-aktif ON = Active

ON




OFF = In-active

Table 9 Kaynak seçimi Servis seçenekleri ( Source Switching Service settings)




075 TXHPOS Teletext tek sayfa başlangıç noktası ayarları ( One page Teletext starting point setting )

0..20 10

076 TXTBRI Teletext parlaklık ayarı ( Teletext brightness setting )

0..63 32

077 TXTCON Teletext contrast ayarı ( Teletext contrast setting )

0..15 0

078 LSEL1 Menü dili seçimi ( Menu language setting )

0..255 255

079 LSEL2 Menü dili seçimi ( Menu language setting )

0..255 255

080 -------

Table 10 Teletext Servis seçenekleri ( Teletext Service settings )

S-No OSD Tanım



081 PWPRF Açılışta görüntü ve sesin gelmesine göre, fast startup ve perfect startup. ( According to video and sound, when TV opening, fast startup and perfect startup )

0..15 0 = Fast 15 = Perfect

10

082 PWRES STANDBY’dan açılır. ( Opens from STANDBY. )

ON = Son duruma gore açılır OFF = STANDBY’dan açılır ON = Opens depending on the last state OFF = Opens from STANDBY

ON

Table 11 Güç Servis seçenekleri ( Power Service settings )




083 MAXCOL Picture menüsündeki maksimum renk ayar sınırlayıcısı (Maximum color setting limiter at Picture menu )

0..63 50

084 MAXBRI Picture menüsündeki maksimum parlaklık ayar sınırlayıcısı (Maximum brightness setting limiter at Picture menu )

0..63 57

085 MINBRI Picture menüsndeki minimum parlaklık ayar sınırlaması (Minimum brightness setting limiter at Picture menu)

0..63 20

086 MAXCON Picture menüsündeki maksimum contrast ayar sınırlayıcısı (Maximum contrast setting limiter at Picture menu )

0..63 50

Table 12 Picture Servis seçenekleri ( Picture Service settings )




087 SAVEFS Fabrika Servis ayarlarını saklama ( Saving Factory settings )

OFF OFF

088 LOADFS Fabrika Servis ayarlarını yükleme ( Loading Factory setting )

OFF OFF

089 OAVL Ses menusunde AVL’i optional yapar (AVL is optional in sound menu) OAVL = 0 (AVL is off and AVL line is not avaliable in sound menu) OAVL = 1 (AVL line is avaliable in sound menu) OAVL = 2 (AVL is on and AVL line is not avaliable in sound menu) Other values of OAVL work like OAVL =1

0-63 32

090 HTLSRC Selection for hotel mode search HTLSRC = 0 (TV) HTLSRC = 1 (AV) HTLSRC = 2 (FAV) HTLSRC = 3 (SVHS) HTLSRC > 3 (HOTEL MODE NOT AVAILABLE)

0-63 32

091 HMAXVOL Maximum volume for hotel mode 0-63 32

092 HDEFVOL Volume level definition for hotel mode when tv is openning

0-63 32

093 RPO Preover Shoot Ratio PSYS_RATIO_PRE_OVERSHOOT_MIN =0 PSYS_RATIO_PRE_OVERSHOOT_MAX =3

0-3 32

094 PF Peaking Frequency PF1-PF0 = 0 (2.7 Mhz) 1 (3.1 Mhz) 2 (3.5 Mhz) 3 (spare)

0-3 2

095 APSSND Default value of sound standard in APS menu 0-> BG 1-> I 2-> DK 3-> L\L’

0-3 0

096 SRCO Control DVD,IDTV, AV2 (Only AK58) sources 0-> DVD, AV2 are OFF 1-> DVD is ON. AV2 is OFF 2-> AV2 is ON. DVD is OFF 3-> DVD, AV2 are ON

0-7 0

Table 13 Fabrika Servis ayarları ( Factory Service settings )

Geometri ayarları : Service menüsündeki 007-011 satırlar arasındaki 50Hz geometri ayarları yapıldıktan sonra, NTSC offsetlerin belirlenmesi için 016-018 satırlar arasındaki NTSC 60Hz ayarları yapılır. NTSC ayarlarını her tüp çalıması için bir kez yapılması yeterlidir. Çünkü NTSC ayarları yapılırken, NTSC offset değerleri hesaplanarak EEPROM da saklanır. 16:9 Zoom modu ayarlarıda NTSC ayarları gibi yapılır ve 16:9 offset değerleri hesaplanarak EEPROM’da saklanır. Daha sonra 50 Hz geometri ayarları değiştirildiğinde, 007-011 veya 016-018 satırlar arasında iken menü tusuna basılarak geometri ayarları kaydedildiğinde, otomatik olarak 16:9 modu, RGB horizontal shift ve NTSC geometri değerleri hesaplanır. RGB horizontal shift offset değerleri koda gömülü haldedir. NTSC ve 16:9 modu offset değeri EEPROM’da saklanmaktadır.

Geometry Adjustment: After adjusting 50Hz geometry items (between 007-011). NTSC 60 Hz geometry items (between 016-018) should be adjusted to determine NTSC 60Hz offset. NTSC offset is automatically calculated and stored in NVM. Later on, if we need to change 50Hz geometry settings, NTSC 60Hz geometry settings is automatically calculated by using NTSC offset. 16:9 mode geometry adjustment works like NTSC 60Hz geometry adjustment.

If press to menu button between 007-011 or 016-018 items. New geometry setting is stored and, 16:9 mode, RGB shift and NTSC geometry automatically calculated. RGB shift offset value is stored in software. Only NTSC offset and 16:9 mode offset values are stored in EEPROM. AGC ayarı : Tunere 60db yayın verildikten sonra AGCTO iteminin uzerine gelinip mavi tuşa basıldıgında AGC otomatik olarak ayarlanır. AGC adjustment: Connect to tuner 60db broadcast and, press to blue button on AGCTO item. AGC is automatically adjusted. Screen Ayarı: Servis menüsünde sarı tuşa basılarak, dikey tarama iptal edilir ve screen ayarının yapılabilmesi için ilgili registerlar güncellenir. Ekranda ince bir çizgi belirir. Daha sonar bu ince çizgi en ince hale gelene kadar screen potansiyometrisi ayarlanır. Tekrar sarı tuşa basıldığında eski ayarlar geri yüklenir. Screen Adjustment: When yellow button is pressed in service menu. Vertical scan is disabled and related registers are updated. Thin line will be appeared on the screen. Then the screen potentiometer is gently adjusted until the thin line will be lightly disappeared When press to yellow button again, old register values are reloaded and vertical scan is enabled. FOCUS Ayarı : TV de yayın verilir. . FOCUS potansiyometresi en uygun değerede ayarlanır. FOCUS Adjustment: TV is tuned to the signal. Then focus potantiometer (the upper pot on the rear side of the FBT transformer) is adjusted for optimum focusing drive.

2.4. TUNER SETTINGS

VHF1-VHF3 VHF3-UHF AK56 SERVICE MENU ITEMS Frq. (Mhz) Frq. (Mhz) B1-H B1-L B2-H B2-L BS1 BS2 BS3 CB

Philips UV1316S MK3 156,25 MHz 441,25 MHz 012 050 030 02 001 002 004 142 LG TAEW-G002D 140,25 Mhz 431.25 Mhz 011 050 029 098 001 002 008 142 Thomson CTT5020 114,25 MHz 401,25 MHz 009 146 027 130 003 006 133 142 Samsung TECC2949PG28B 170,25 MHz 465,25 MHz 013 018 031 130 001 002 004 142 Samsung TECC2949PG35B 170,25 MHz 449,25 MHz 013 018 030 130 001 002 008 142 Alps TEDE9X226A 142,25 MHz 425,25 MHz 011 082 029 002 001 002 008 142 Alps TEDE9-004A 149,25 MHz 424,25 MHz 011 194 028 242 001 002 008 142 Samsung TECC2949PG40B 142,25 MHz 425,25 MHz 011 082 029 002 001 002 008 142 Samsung TECC2949PS40B 142,25 MHz 425,25 MHz 011 082 029 002 001 002 008 142

Explanations B1H High byte of VHF1-VHF3 cross-over frequency B1L Low byte of VHF1-VHF3 cross-over frequency B2H High byte of VHF3-UHF cross-over frequency B2L Low byte of VHF3-UHF cross-over frequency BS1 Band switching byte for VHF1 BS2 Band switching byte for VHF3 BS3 Band switching byte for UHF CB Control byte

According to Reference Divider 62.5 Khz apply the following formula Value = ( Frequency (Mhz) * 1000 ) / ( 62.5 ) + 622 ; Binary_value ( 2 bytes ) = ToBinary( value ); x can be 1 or 2 Bx-H = MSByte( Binary_value ); ( most significant byte ) Bx-L = LSByte( Binary_value ); ( least significant byte )

Ak57 DVD Service Manual

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