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    HINDUSTAN INSTITUTE OF TECHNOLOGY AND SCEINCE

    DEPARTMENT OF AUTOMOBILE ENGINEERING

    AUTOMOTIVE ELECTRICAL AND ELECTRONICS LAB

    LABORATORY MANUAL

    (LaboratoryCode: AT!""#(Year$Se%: III $ V#

    Faculty In charge

    Mr& T& S'a%)*aat'a

    Assistant Professor/AUTO

    Lab In charge

    Mr& S&Nada+)%ar

    Lab Instructor /AUTO

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    HINDUSTAN INSTITUTE OF TECHNOLOGY AND SCEINCE

    DEPARTMENT OF AUTOMOBILE ENGINEERING

    AUTOMOTIVE ELECTRICAL AND ELECTRONICS LAB

    LABORATORY PLAN

    LaboratoryCode: AT!"" Year$Se%: III $ V

    Fa,)-ty Na%e: Mr& T& SHANMUGANATHAN

    S&NO

    Date o.

    E/0er1%et

    (Bat,' I 2

    II3III#

    Na%e o. t'e E/0er1%et4Re%ar+4

    PART 5I

    ELECTRONICS LAB

    1 Week 1 FULL WAVE RECTIFIER

    2 Week 2

    VERIFY LOIC ATE! "" #ALF A$$ER

    % OR& A'$&'A'$&'OR&E("OR&'OT)* Week * FULL A$$ER A'$ !R & $ FLIP"FLOP+ Week + !ILICO' CO'TROLLE$ RECTIFIER

    , Week ,E'ERATE T#E !-UARE WAVE FOR. I' ,,,

    TI.ER

    Week WRITE A' ALP TO PERFOR. A$$ITIO' A'$

    .ULTIPLICATIO' OF TWO 0 IT 'U.ER! U!I' Week WRITE A' ALP TO PERFOR. A/$ CO'VERTER Y

    I'TERFACI' 030, .ICROPROCE!!OR ORPART 6 II

    ELECTRICAL LAB

    0 Week 0 CO'$UCT VARIOU! TE!T! O' T#E ATTERY A'$TAULATE ATTERY CO'$ITIO'

    4 Week 4 FI'$ T#E FAULT I' T#E IVE' I'ITIO' !Y!TE.

    13 Week 13 TE!T T#E IVE' !TARTER .OTOR U!I'ELECTRICAL TE!T RI

    11 Week 11 TE!T T#E IVE' ALTER'ATOR

    12 Week 12 TE!T T#E IVE' $Y'A.O A'$ REULATOR&CUT OUT! RELAY

    1* Week 1*

    !TU$Y OF T#E ELECTRICAL !Y!TE.! !UC# A!#EA$ LI#T!& !I$E OR PAR5I' LI#T!&

    TRAFFICATOR LI#T!& ELECTRIC #OR' !Y!TE.&

    WI'$!CREE' WIPER !Y!TE.& !TARTER !Y!TE.

    Sta.. 1 ,'ar*e HOD (a)to#

    (T& SHANMUGANATHAN# (7&7AMALA7ANNAN#

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    PART 5I

    ELECTRONICS LAB

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    E8P NO: FULL 9AVE RECTIFIER

    DATE:

    AIM:

    To construct a fu66 7a8e rectifier an9 to :easure 9c 8o6ta;e un9er 6oa9 an9 to ca6cu6ate tAPPARATUS REUIRED:

    !>'o> 'a:e Ran;e -uantit?1> Transfor:er 2*3 V / "3"%") 12> $io9e I'+33 2*> Resistor 1 5@ 1+> Ca=acitor 133F 1,> CRO *3 .#B 1> rea9 oar9 1

    : FULL9AVE RECTIFIER 9ITHOUT FILTER

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    FULL9AVE RECTIFIER 9ITH FILTER

    FORMULA

    Ri==6e Factor D%I:/D2) / %2I:/G)H2"1W

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    MODEL GRAPH

    Tab)-at1o

    I'PUT OUTPUT WIT#OUT FILTER OUTPUT WIT# FILTER

    A.PLITU$E%V)

    TI.E%!)

    A.PLITU$E%V)

    TI.E%!)

    A.PLITU$E%V)

    TI.E%!)

    RESULT:

    T

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    E8P NO: " STUDIES OF BASIC DIGITAL ICS

    DATE:

    AIM:

    To 8erif? t $i;ita6 IC trainer kit 12> A'$ ;ate IC +30 1*> OR ;ate IC +*2 1+> 'OT ;ate IC +3+ 1

    ,> 'A'$ ;ate IC +33 1> 'OR ;ate IC +32 1> E("OR ;ate IC +0 10> Connectin; 7ires As reJuire9

    BASICS: T

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    F1* &T T

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    before t .ark eac< connection on ?our sc et one of ?our ;rou= :e:bers to c

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    -ua9 2 In=ut +33 #e +3+ In8erter

    F1* "&T

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    THEORY:

    a& AND *ate:

    An A'$ ;ate is t

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    PROCEDURE:

    1> Connections are ;i8en as =er t For a66 t

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    TRUTH TABLE:

    S&NoINPUT OUTPUT

    A B Y @ A & B

    & > > >"& > >

    !& > >

    =&

    OR GATE

    LOGIC DIAGRAM:

    PIN DIAGRAM OF IC

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    TRUTH TABLE:

    S&NoINPUT OUTPUT

    A B Y @ A B

    & > > >

    "& >

    !& >

    =&

    NOT GATE

    LOGIC DIAGRAM:

    PIN DIAGRAM OF IC =:

    CIRCUIT DIAGRAM:

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    TRUTH TABLE:

    S&NoINPUT OUTPUT

    A B Y @ (A& B#

    & > >

    "& >

    !& >

    =& >

    NOR GATE

    LOGIC DIAGRAM:

    PIN DIAGRAM OF IC ":

    CIRCUIT DIAGRAM:

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    TRUTH TABLE:

    S&NoINPUT OUTPUT

    A B Y @ (A B#

    & > >

    "& > >

    !& > >

    =& >

    E85OR GATE

    LOGIC DIAGRAM

    PIN DIAGRAM OF IC

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    TRUTH TABLE:

    S&NoINPUT OUTPUT

    A B Y @ A B

    & > > >

    "& >

    !& >

    =& >

    RESULT:

    T

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    To 9esi;n an9 8erif? t OR ;ate IC +*2 1+> 'OT ;ate IC +3+ 1,> E("OR ;ate IC +0 1> Connectin; 7ires As reJuire9

    THEORY:

    T

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    HALF ADDER

    TRUTH TABLE:

    S&No

    INPUT OUTPUT

    A B S C

    & > > > >

    "& > >

    !& > >

    =& >

    DESIGN:

    Fro: t > > >

    "& > > >

    !& > > >

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    =& > >

    & > > >

    & > >

    >

    ?&

    DESIGN:

    Fro: t

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    CIRCUIT DIAGRAM:

    PROCEDURE:

    1> Connections are ;i8en as =er t

    2> For a66 t

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    1> $i;ita6 IC trainer kit 12> 'OR ;ate IC +32 1*> 'OT ;ate IC +3+ 1+> A'$ ;ate % t 'A'$ ;ate IC +33 1

    > Connectin; 7ires As reJuire9

    THEORY:

    A F6i= F6o= is a seJuentia6 9e8ice t

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    RS FLIP FLOP

    LOGIC SYMBOL:

    CIRCUIT DIAGRAM:

    CHARACTERISTIC TABLE:

    CLOC7

    PULSE

    INPUT PRESENT

    STATE (#

    NE8T

    STATE(#

    STATUS

    S R

    > > > >

    " > >

    ! > > >

    = > > > >

    >

    < > 8

    ? 8

    D FLIP FLOP

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    LOGIC SYMBOL:

    CIRCUIT DIAGRAM:

    CHARACTERISTIC TABLE:

    CLOC7PULSE

    INPUTD

    PRESENTSTATE (#

    NE8TSTATE(#

    STATUS

    > > >

    " > >

    ! >

    =

    7 FLIP FLOP

    LOGIC SYMBOL:

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    CIRCUIT DIAGRAM:

    CHARACTERISTIC TABLE:

    CLOC7

    PULSE

    INPUT PRESENT

    STATE (#

    NE8T

    STATE(#

    STATUS

    7

    > > > >

    " > >

    ! > > >

    = > >

    > >

    >

    < >

    ? >

    T FLIP FLOP

    LOGIC SYMBOL:

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    CIRCUIT DIAGRAM:

    CHARACTERISTIC TABLE:

    CLOC7

    PULSE

    INPUT

    T

    PRESENT

    STATE (#

    NE8T

    STATE(#

    STATUS

    > > >

    " > >

    ! >

    = >

    PROCEDURE:

    1> Connections are ;i8en as =er t

    2> For a66 t

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    RESULT:

    T

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    1* Patc< C

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    TABULAR COLUMN:

    S&No&

    IG @&(A# IG @&(A#

    VA7 (V# IA (%A# VA7 (V# IA (%A#

    MODEL GRAPH: P1 ,o.1*)rat1o

    CIRCUIT DIAGRAM (SINGLE PHASE SINGLE PULSE CONVERTER#:

    I;

    1I;

    2 i;2i;

    1

    IA

    VA5

    5 A

    P+.

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    TABULAR COLUMN (SINGLE PHASE SINGLE PULSE CONVERTER#:

    S&No& No5Cod),t1*

    Per1od (%4#

    Cod),t1*

    Per1od (%4#

    F1r1* A*-e (J

    #

    O)t0)t

    Vo-ta*e (V#

    MODEL GRAPH (SINGLE PHASE SINGLE PULSE CONVERTER#:

    Vin

    VT

    * 2

    *2

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    RESULT:

    T

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    !i:i6ar6? t

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    DESIGN:

    i8en f + 5#B&T

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    1> Connections are ;i8en as =er t2> K ,V su==6? is ;i8en to t At =in * t

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    RESULT:

    T

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    ,> rea9 oar9 1> Resistors> Ca=acitors0> Connectin; 7ires an9 =robes As reJuire9

    THEORY:

    A :onostab6e :u6ti8ibrator often ca66e9 a one"s

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    DESIGN:

    i8en t= 3>1 :s 1>1 R1CT Connections are ;i8en as =er t2> K ,V su==6? is ;i8en to t A ne;ati8e tri;;er =u6se of ,V& 2 5#B is a==6ie9 to =in 2 of t At =in * t

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    S&No

    A%0-1t)de

    ( No& o. d1 y

    Vo-t4 0er d1 #

    T1%e 0er1od

    ( No& o. d1 /

    T1%e 0er d1 #

    to to..

    & Tr1**er 10)t

    "& O)t0)t Vo-ta*e 3 Vo

    !& Ca0a,1tor o-ta*e 3 V,

    MODEL GRAPH:

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    RESULT:

    T

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    After t T t

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    A,,)%)-ator

    Accu:u6ator is an 0"bit re;ister t Te>& t T

    Contro6 bus X it consist of 8arious sin;6e 6ines t

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    E8P NO: & ? BIT DATA ADDITION

    AIM:

    To a99 t7o 0 bit nu:bers store9 at consecuti8e :e:or? 6ocations>

    ALGORITHM:

    1> Initia6iBe :e:or? =ointer to 9ata 6ocation>2> et t*> et t !tore t

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    FLO9 CHART:

    !TART

    #LH +,33#

    AH .H

    AHAHK.H

    #LH#LHK1

    !TOP

    #LH#LHK1

    .H AH

    CH 33#

    .H CH

    #LH#LHK1

    Is t

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    'O

    YE!

    PROGRAM:

    ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

    +133 !TART .VI C& 33 C6ear C re;>+131+132 L(I #& +,33 Initia6iBe #L re;> to

    +,33+13*+13++13, .OV A& . Transfer first 9ata to

    accu:u6ator+13 I'( # Incre:ent #L re;> to

    =oint net :e:or?Location>+13 A$$ . A99 first nu:ber to

    acc> Content>+130 S'C L1 Su:= to 6ocation if

    resu6t 9oes not ?ie69carr?>

    +134+13A

    +13 I'R C Incre:ent C re;>

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    +13C L1 I'( # Incre:ent #L re;> to=oint net :e:or?

    Location>+13$ .OV .& A Transfer t to :e:or?>

    +13E I'( # Incre:ent #L re;> to=oint net :e:or?Location>

    +13F .OV .& C .o8e carr? to :e:or?+113 #LT !to= t

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    FLO9 CHART:

    !TART

    #LH +,33#

    AH .H

    Is t

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    'O

    YE!

    PROGRAM:

    ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

    +133 !TART .VI C& 33 C6ear C re;>+132+132 L(I #& +,33 Initia6iBe #L re;> to

    +,33+13*+13++13, .OV A& . Transfer first 9ata to

    accu:u6ator+13 I'( # Incre:ent #L re;> to

    =oint net :e:Location>+13 !U . !ubtract first nu:ber

    fro: acc> Content>+130 S'C L1 Su:= to 6ocation if

    resu6t 9oes not ?ie69borro7>

    +134+13A

    +13 I'R C Incre:ent C re;>

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    +13C C.A Co:=6e:ent tcontent

    +13$ A$I 31# A99 31# to content of acc>+13E

    +13F L1 I'( # Incre:ent #L re;> to

    =oint net :e:Location>+113 .OV .& A Transfer t to :e:or?>+111 I'( # Incre:ent #L re;> to

    =oint net :e:Location>

    +112 .OV .& C .o8e carr? to :e:+11* #LT !to= t

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    ,> A99 :u6ti=6ican9 to accu:u6ator> $ecre:ent :u6ti=6ier> Re=eat ste= , ti66 :u6ti=6ier co:es to Bero>0> T

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    RESULT:

    T

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    FLO9CHART:

    33

    . A".

    H H K1

    I! A[3

    AAK .

    "1

    #LH +,33

    A .

    #LH #LHK1

    !TART

    !TOP

    #LH#LHK1

    .H AH

    .H H

    #LH#LHK1

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    'O

    YE!

    PROGRAM:

    ADDRESS OPCODE LABEL MNEMO

    NICS

    OPERA

    ND

    COMMENTS

    +133 .VI &33 C6ear re; for Juotient+131+132 L(I #&+,33 Initia6iBe #L re;> to

    +,33#+13*+13++13, .OV A&. Transfer 9i8i9en9 to acc>+13 I'( # Incre:ent #L re;> to =oint

    net :e:> Location>+13 LOOP !U . !ubtract 9i8isor fro: 9i8i9en9+130 I'R Incre:ent re;+134 S'C LOOP

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    Su:= to LOOP if resu6t 9oesnot ?ie69 borro7

    +13A+13+13C A$$ . A99 9i8isor to acc>+13$ $CR $ecre:ent re;+13E I'( # Incre:ent #L re;> to =oint

    net :e:> Location>+13F .OV .&A Transfer t to :e:or?>

    +113 I'( # Incre:ent #L re;> to =ointnet :e:> Location>

    +111 .OV .& Transfer t to :e:or?>

    +112 #LT !to= t

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    in9uce9 at t T

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    PROGRAM:

    Addre44OPCODES

    Label Co::ents

    OR +133%i8) If EOC 1 continue e6se ;o to ste= %iii)%8) Rea9 t%8i) !tore it in a :e:or? 6ocation

    FLO9 CHART FOR ADC

    PROGRAM

    MEMORY

    ADDRESS

    OPCODES MNEMONICS COMMENTS

    .OV AL&13OUT C0&AL.OV AL&10OUT C0&AL#LT

    C

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    i> Enter tii> Connect t Var? t

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    To 7rite a =ro;ra: to

    i> ;enerate sJuare 7a8efor: in 9ac2 out=ut

    ii> enerate 3Vin t< $AC 1 out=ut>

    APPARATUS REUIRED

    S&o ReK)1red Co%0oet4 40e,1.1,at1o ty

    1> .ICROPROCE!!OR .ICRO 0/00 5IT 1

    2> POWER C#OR$ K,V !UPLLY 1

    *> 5EY OAR$ 1

    + $IITAL TO A'ALOCO'VERTER

    V. 33* 1

    PROBLEM STATEMENT

    T%8) Re=eat t

    HARD9ARE ADDRESS

    FLO9CHART:

    MEASUREMENT OF ANALOG VOLTAGE SUARE 9AVE FORM

    !TART !TART

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    PROGRAM TO GENERATE > V IN THE DAC OUTPUT

    MEMORY

    ADDRESS

    OPCODES MNEMONICS COMMENTS

    .OV AL&F#

    OUT C3&AL#LT

    F%

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    PROGRAM TO GENERATE SUARE 9AVE IN DAC" OUTPUT

    MEMORY

    ADDRESS

    OPCODES MNEMONICS COMMENTS

    !TART.OV AL&33OUT C0&ALCALL $ELAY

    .OV AL&FFOUT C0&ALCALL $ELAYS.P !TART

    $ELAY.OV$(&A3FFLOP$EC $(S' LOP

    RET

    Lo7 9ata in $AC 2

    $e6a?

    #i;< 9ata in $AC 2 out =ut

    Process re=eat

    $e6a? routine

    OBSERVATION

    PROCEDURE:

    i> Enter tii> Connect t

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    iii> Vie7 t

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    APPARATUS REUIRED

    S&o ReK)1red Co%0oet4 40e,1.1,at1o ty

    1> .ICROPROCE!!OR .ICRO 0/00 5IT 1

    2> POWER C#OR$ K,V !UPLLY 1

    *> 5EY OAR$ 1

    + !TEPPER .OTOR 1 5; 1

    PROBLEM STATEMENT

    Write a co9e for ac

    THEORY

    !te==er :otor contro6 is a 8er? =o=u6ar a==6ication of :icro=rocessor in contro6 area> T

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    PROGRAM

    MEMORY

    ADDRESS

    OPCODES MNEMONICS COMMENTS

    ET T#E FIR!T $ATA FRO. T#E ACCU.ULATOR

    .OVE $ATA I'TO T#E ACCU.ULATOR

    $RIVE T#E .OTORCIRCUITARY

    $ECRE.E'T COU'TER

    ET T#E $ATA FRO. LOO5 UPTALE

    I! 3Z

    $ELAY

    'O

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    !TART.OV AL&34OUT C3&ALCALL $ELAY.OV AL&3,OUT C3&AL

    CALL $ELAY.OV AL&3OUT C3&ALCALL $ELAY.OV AL&3AOUT C3&ALCALL $ELAYS.P !TART

    $ELAY.OV$(&A3FF

    LOP$EC $(S' LOPRET

    Out t

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    Write an ALP to rea9 t

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    Me%ory

    addre44

    O0

    ,ode

    %e%o1,4 ,o%%et4

    .OV AL&FFOUT C3&AL#LT

    Ma/ data to DAC

    0ort

    PROCEDURE

    1> Enter t Loa9 :ai:u: 8a6ue FF to Accu:u6ator*> Eecute t Varr? t

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    CALL $ELAY.OV AL& *3#OUT 3CE#& AL.OV AL& 3FF#OUT 3C0#& AL

    OUT 3C0#& AL.OV AL& 33#OUT 3$3#& ALCALL $ELAY.OV AL& 33#OUT 3$0#& ALI' AL& 3C0#.OV !I& 1,33 Is 9efecti8e an9 s

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    BATTERY MAINTENANCE TIPS

    T303

    T

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    1> T

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    Load te4t

    !6>'o Vo6ta;e %8)

    con9ition

    ;oo9 7eak ba9

    E8 NO: DIAGNOSIS OF IGNITION SYSTEM FAULTSDATE:

    AIM:

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    To 9ia;nose t .u6ti:eter

    2> Fee6er ;au;e*> atter?+> La:=,> !cre7 $ri8er> !=ark =6u; tester an9 i;nition coi6 tester>

    PROCEDURE

    If t

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    > To c

    ,> Usin; t

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    91t' Va,))%

    En;ine RP. $7e66 an;6e Ti:in; an;6e

    S0ar+ 0-)* ad ,ota,t brea+er 0o1t te4t

    Co6or of s=ark

    !=ark =6u; ;a=

    Contact breaker =oint ;a=

    E8 NO: >& TESTING OF STARTER MOTOR AND ALTERNATOR

    DATE:

    AIM:

    To test t

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    APPARATUS REUIRED

    1> Test enc Vo6ta;e Tester

    *> A6ternator+> $i;ita6 Tac atter?> !tarter .otor

    DESCRIPTION

    ALTERNATOR

    T

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    > To con9uct t2> Current 9ra7 test>

    PROCEDURE

    NO LOAD TEST

    1> !tarter :otor is fir:6? :ounte9 on t

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    2> $isab6e t Turn i;nition ke? to start an9 rea9 t C

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    Cab6e 1

    Cab6e 2

    atter? K 8e ter:ina6atter? X 8e ter:ina6

    I;nition s7itc Re;u6ator2> Re;u6ator Tester

    *> A> C !u==6?

    DESCRITION

    A 8o6ta;e re;u6ator is a 9e8ice t

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