AE 1 EQ by Faiz Sir

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AE-1/AE/EDC Prof. FAIZ RANGARI Exam Questions [EQ] -8976530729 1| Page Module 1: Diodes and its Applications June 2015 1. Compare Clipper and Clamper Circuits. 05 Dec 2014 1. Write down current equation of Diode and explain significance of each parameters. 04 2. Draw a required diode clamper circuit to generate the output Vo to from the input V1 as shown in the figure, If i. Vϒ= 0V ii. Vϒ=0.7V where Vϒ is cutin voltage of diode. 10 3. Write short note on construction and operation of photodiode. 05 June 2014 1. Explain effect of temperature on characteristics of PN junction diode. 04 2. Write short note on series and shunt clippers. 07 3. Write short on construction and operation of varactor diode. 07 Dec 2013 1. Draw switching characteristics of a diode and explain reverse recovery time. 04 2. 04 Faiz Rangari - 8976530729

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Page 1: AE 1 EQ by Faiz Sir

AE-1/AE/EDC Prof. FAIZ RANGARI Exam Questions [EQ]-8976530729

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Module 1: Diodes and its ApplicationsJune2015 1. Compare Clipper and Clamper Circuits. 05Dec 2014 1. Write down current equation of Diode and explain significance ofeach parameters. 042. Draw a required diode clamper circuit to generate the output Voto from the input V1 as shown in the figure, Ifi. Vϒ= 0Vii. Vϒ=0.7V where Vϒ is cutin voltage of diode. 10

3. Write short note on construction and operation of photodiode. 05June2014 1. Explain effect of temperature on characteristics of PN junctiondiode. 042. Write short note on series and shunt clippers. 073. Write short on construction and operation of varactor diode. 07Dec 2013 1. Draw switching characteristics of a diode and explain reverserecovery time. 042.

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Obtain output for the clipper shown in the figure. If a sine waveof 15sinwt is applied as an input. Assume practical diode withsuitable cutin voltage.3. Write short note on small signal model of diode. 054. Write short note on Construction and operation of schottkeydiode. 05Module 2: Field Effect Transistors

June2015 1. Compare Depletion and Enhancement type MOSFET. 052. Explain the basic operation and characteristics of n-channelenhancement type MOSFET. 103. Write short note on Energy Band diagram of MOS capacitor. 05Dec2014 1. Explain the working of n-channel EMOSFET with the help ofoutput characteristics, showing clearly effect of channel lengthmodulation. Give equation of drain current in linear andsaturation region along with conditions. 10

2. Write short note on MOS capacitor. 05June2014 1. Draw and explain energy band diagram of MOS capacitor inaccumulation, depletion and inversion region. 102. Write short note in MOSFET operation. 07Dec2013 1. Draw energy band diagram of MOS capacitor in accumulation,depletion and inversion region for p-substrate. 042. Write short note on regions of operation of FET. 05

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June2013 1. Explain EMOSFET. 052. Explain with the help of neat diagram the structure of a N-Channel FET, and its volt-ampere characteristics. In what way itis different from BJT. 10Dec2012 1. Explain graphical determination of FET parameters. 052. Explain transfer characteristics of JFET. 05

Module 3: DC Analysis of Transistor Circuits

June 2015 1. Transistor is current controlled device while FET is voltagecontrolled device. Justify. 052. Define Stability factor. Derive the equation for Stability factor.State which biasing technique is more suitable. Justify youranswer. 103. For a NPN transistor in CE mode voltage divider configurationdetermine Vc and Vb. Given Vcc= +20V, VEE= -20V, R1= 8.2KΩ,R2=2.2 KΩ, Rc= 2.7 KΩ, RE= 1.8 KΩ, C1=C2= 10F and β= 120. 104. Write short note on Biasing of JFET for Zero Temperature Drift. 055. Write short note on DC load line and significance of Q point. 056. Determine IDQ, VGSQ, VD and VS for the network shown below.

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Dec 2014 1. The PNP transistor shown on figure has β= 50. Find the value ofRc to obtain Vc= +5V. What happen when transistor is replacedwith another transistor having β= 100.04

2. Why Common Collector amplifier is used as buffer? Why Buffersare required. 043. For the circuit shown on figure. Find IDS and VDS if VRS= 1.5V.04

4. Design JFET circuit with voltage divider biasing as shown infigure with JFET parameters IDSS= 12mA, VP= -3.5V and λ= 0. LetR1+R2= 100K, IDSQ= 5mA and VDSQ= 5V.10

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5. For the circuit shown in figure, assume β=100.i. Find thevenin’s equivalent voltage Vth and resistanceRth for base circuit.ii. Determine ICQ and VCEQ10

6. What are different biasing techniques used to bias D-MOSFETand E-MOSFET. Explain with the help of appropriate circuitdiagrams. 10June 2014 1. Find RB and Rc for the circuit shown to obtain VCE= 5V and Ic=2mA 042. In n-channel MOSFET VDS= 5V, VGS= 5V, VBS= 0, W=10m,L=5m, k’n= 100mA/V2 and VTO= 1V. Calculate its drain currentfor channel length modulation factor λ of 0 and 0.25V-1. 04

3. Differentiate between BJT and MOSFET. 044. Find ICQ and VCEQ for the circuit shown in figure if β=100.

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5. The JFET shown in the figure has parameters IDSS= 8mA and Vp=-4V. Determine VG, IDSQ, VDSQ and VGSQ.10

Dec 2013 1.

Draw the DC load line for the above circuit.04

2. Obtain IDQ , VDSQ, VGSQ graphically.08

3. Derive the expression for Threshold voltage foe Enhancementtype N-channel MOSFET. 104.

Determine IB, Ic, VCE, and VBE and also SICO for the biasing circuit10

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shown in figure.5. Explain graphical method to obtain parameters of CEconfiguration. 106. Calculate IDQ , VDSQ, VGSQ05

June2013 1.

For the circuit shown in the figure the JFET parameters are IDSS=5mA, Vp= -4VDetermine the following with ID= 2mA and VDS= 6Vi. RDii. Rsiii. VDiv. Vsv. VRD

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2. A CE BJT amplifier is shown in the figure with VCE= 12V, Ic=2mA, Stability factor 5.1, Vcc= 24V, VBE= 0.7V, β= 50 and Rc=4.7KΩ.Determine the value of resistors RE, R1 and R2 (Hint: R2= 0.1βRE)

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For the network of figure with RD= 2KΩ, RG= 10MΩ andVDD=12V.Determine the followingi. IDQii. VDSQ

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Dec 2012 1. Explain BJT as a switch. 052. Discuss using the concept of load line superimposed on thetransistor characteristics. How a simple CE circuit can amplify atime varying signal. 103. The following parameters are obtained from certain JFETdatasheet: VGSoff= -8V and IDSS= 5mA. Determine the values of ID,for each value of VGS ranging from 0 to -8 Vin 1V steps. Plot thetransfer characteristics curve for the same data. 104. Explain output characteristics of CE BJT voltage amplifier. 05

Module 4: Small Signal Analysis of BJT Amplifiers

June2015 1. Derive the equations for Av, Ai, Ri and Ro for a NPN transistor inCE mode voltage divider bias configuration with RE unbypassed. 102. For the network given below determine Zi, Zo and Av.

103. Determine Zi, Zo and Av for the circuit shown below.

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4. Write short note on Small signal equivalent circuit of CCamplifier. 05Dec 2014 1. Draw circuit diagram of CE amplifier with voltage divider biaswith bypassed emitter resistance and derive expression forvoltage gain, current gain, input resistance and output resistanceusing Hybrid-π model which includes early effect. 10

2. Write short note on Hybrid-π model of BJT. 053. Write short note on AC and DC load line. 05June2014 1. Draw and explain small signal hybrid-Pi model of BJT includingearly effect. 04

2. The parameters of the transistors in the circuit shown in thefigure are β= 100 and VA= 100V.i. Determine the DC voltage at base and emitter terminalsii. Find Rc such that VCEQ= 3.5V andiii. Assuming Cc and CE as short circuit, determine smallsignal voltage gain Av=Vo/Vs.

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3. For the common base amplifier shown in the figure, derive theexpression for voltage gain, current gain, input resistance andoutput resistance using hybrid-π model.10

Dec 2013 1. Compare CB, CC and CE configuration. 042. Determine Ri, Ro, Av and gm for the amplifier circuit shown infigure.10

3. Determine Hybrid-π parameters.05

4. Write short note on Hybrid-π model of BJT. 05

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June2013 1. Design a single stage RC coupled CE audio frequency amplifieremploying BC147B BJT to satisfy the following conditions., SICO 10, Load resistor RL= 10KΩ and outputvoltage Vo= 3V. 15

2. For the designed amplifier in above question determine,expected voltage gain, input impedance, output impedance andcurrent supplied by source voltage VCC. 05Dec 2012 1. Design for supply voltage Vcc, collector resistor Rc,emitterresistor RE, voltage divider biasing resistor R1 and R2 of a singlestage RC coupled CE audio amplifier with following conditions., SICO 10, Load resistor RL= 5KΩ and outputvoltage Vo= 3V. 10

2. For the circuit shown below, determine the following withand β= 100i. ICQ and IEQii. Input and output impedanceiii. Voltage gainiv. Current gainv. List advantages of circuit shown 10

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Module 5: Small Signal Analysis of FET Amplifiers

Dec 2014 1. Draw small signal model of JFET and Explain significance of eachparameters. 042. In n-channel EMOSFETi. Substrate Doping NA=1016cm-3ii. Polysilicon Gate doping ND=1020cm-3iii. Gate oxide thickness tox= 0.5miv. Oxide positive charge interface density= 4x1010cm-2v. Charge of electron= 1.6x10-19 colvi. Permittivity of free space= 8.85x10-14 F/cmvii. Dielectric constant of Si= 11.9viii. Dielectric constant of SiO2= 3.9Find zero bias threshold voltage(VT0)10

June2014 1. For the common gate circuit shown in figure, the NMOStransistors parameters are VTN= 1V, kn= 3mA/V2 and λ= 0.i. Determine IDSQ and VDSQii. Calculate gm and roiii. Find the small- signal gain Av= Vo/Vi. Assume Cc1 and Cc2acts as short circuit for small signal analysis. 10

2. Derive expression for voltage gain of NMOS source followercircuit. 08

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Dec 2013 1.

Obtain gm, ro and Av for the amplifier circuit shown in figure. Inwhich region the device is operating? Justify.

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VTN= 1V, Kn= 0.5mA/V2, λ=0.01V-1Determine VGSQ and VDSQAlso calculate voltage gain, input and output resistance

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June 2013 1. Design single stage RC coupled CS audio frequency amplifieremploying JFET BFW-11 to satisfy the following requirementsIDQ= 0.5IDSS, RL= 120KΩ, VDD=20V and output peakvoltage Vo=4.5V. 102. For the above designed circuit with source resistor RSunbypassed, determine voltage gain, input impedance, outputimpedance and output voltage for input voltage of 20VPP. 10

Dec 2012 1. Design single stage RC coupled CS audio frequency amplifieremploying JFET BFW-11 to satisfy the following requirementsIDQ= 3mA, RL= 120KΩ, VDD=20V and output peakvoltage Vo=4.5V. 102. For the above designed circuit with source resistor RSunbypassed, determine voltage gain, input impedance, outputimpedance and output voltage for input voltage of 20VPP. 103. Determine the small signal voltage gain of a MOSFET circuitwith VGSQ= 2.12V, VDD= 5V, Rd= 2.5KΩ, VTN= 1V, Kn= 0.8mA/V2and λ= 0.02V-1. Assume transistor is biased in the saturationregion.

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Module 6: Oscillators

June2015 1. Explain barkhausen criteria for sustained oscillations. 052. Draw a neat circuit diagram of Wien bridge oscillator and derivean expression for its output frequency. 103. Write short note on crystal oscillator. 05Dec2014 1. Compare Collpit’s and Clapp’s Oscillator. 042. Explain the working of Wien Bridge Oscillator. Derive theexpression for frequency of oscillation and the value of gainrequired for sustained oscillation. 10

3. Write short note on Twin-T oscillator. 05June2014 1. Why LC oscillators are preferred for high frequencyapplications? 042. Draw and explain working of transistorized Wien bridgeoscillator. 103. Write short note on Twin-T oscillator. 07Dec2013 1. State and Explain barkhausen criteria for oscillations. 042. Derive the expression for frequency of oscillation for atransistorized (BJT) RC phase shift oscillator. 083. Write short note on crystal oscillator. 05