Advanced Microprocessor Presentation 4

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    ADVANCED MICROPROCESSORS

    Session IV

    Prof. S. Jagannathan,

    HOD Department of Electronics andCommunication Engineering,

    R.V. College of Engineering, Bangalore

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    Contents

    Control signals indicating actions in 8086

    Real mode memory addressing

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    The control signals indicated below govern all

    the actions of the pertinent blocks.

    The queue status signals indicate what is the

    present status of the queue.

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    Queue Status

    Subsequent byte from the queue11

    Empty queue01

    First byte of the opcode from the

    queue

    10

    No operation00

    IndicationQS0QS1

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    The memory in 8086 is organized into odd and evenblocks of bytes of data. The memory manufacturers

    never make the memory registers of size 16 bits or

    32 bits etc. Normally, byte size registers are presentin memory. For example, 256 X 8 type of memories

    are available indicating 256 bytes can be stored in

    such a memory chip. These memory blocks can be

    divided into odd group as well as even group of

    memory.

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    BHE

    In order to access even group of memory i.e. theaddresses will end in 0, 2, 4, 6, 8, etc. (the LSB is

    A0=0), all that one has to do is to output the

    address. On the other hand in order to access odd

    group of memory i.e. the addresses will end in 1, 3,

    5,7,9 (the LSB is A0

    1) we have to send bus highenable ( ) signal for chip select.

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    Bus High Enable / Status

    none11

    Lower byte from or to even address01

    Upper byte from or to odd address10

    Whole word00

    IndicationsA0

    BHE

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    Now there are 8 status signals in 8086 as

    compared to only 2 in 8085. The signals and

    their functions are as given below.

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    Status Details

    Passive111

    Write memory011Read memory101

    Code access001

    1

    1

    0

    0

    Halt10

    Write I/O port00

    Read I/O port10

    Interrupt Acknowledge00

    Indication2S 1

    S 0S

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    Data11

    Code or none01

    Stack10

    Alternate data00IndicationsS3S4

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    5S ----- Value of Interrupt Enable flag

    ----- Always low (logical) indicating 8086 is

    on the bus. If it is tristated another bus

    master has taken control of the system bus.

    6S

    ----- Used by 8087 numeric coprocessor to

    determine whether the CPU is a 8086 or

    8088

    7S

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    Real mode memory addressing

    The segment registers have contents of 16-bits.Hence, 216 = 64Kb of memory can be addressed by

    segment registers. Normally, the segment base

    register contains three zeroes, so that each segmentcan start from say E0000 to EFFFF. The segments

    namely code segment, data segment, stack segment

    and extra segment for a particular program can becontiguous, separate or in case of small programs

    overlapping even.

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    For example, code segment is supposed to have64Kb and in case of small programs data segmentmay be within the code segment. To give you anexample of the segment base and offset, we canconsider the telephone numbers. For example,23322651 is a telephone number out of which, 2 isan universal code, 332 is the area code, and 2651 isthe offset in that area. In other words, the areatelephone numbers can occupy 23320000 to23329999.

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    One way four 64-Kbyte segment might bepositioned within the 1-Mbyte address space of an 8086

    PHYSICAL

    ADDRESS MEMORYFFFFFH HIGHEST ADDRESS

    70000H

    7FFFFH

    EXTRA SEGMENT BASE ES=7000H

    TOP OF EXTRA SEGMENT

    64K

    5FFFFH

    STACK SEGMENT BASE SS=5000H

    TOP OF STACK SEGMENT

    64K

    50000H

    TOP OF CODE SEGMENT

    CODE SEGMENT BASE CS=348AH64K

    4489FH

    348A0H

    TOP OF DATA SEGMENT

    BOTTOM OF DATA SEGMENT

    64K

    2FFFFH

    20000H

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    Addition of IP to CS to produce thephysical address of the code byte

    PHYSICAL

    ADDRESS

    MEMORY

    4489FH TOP OF CODE SEGMENT

    348A0H

    38AB4H CODE BYTE

    START OF CODE SEGMENTCS=348AH

    IP=4214H

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    Segmentation

    The 8086 microprocessor has 20 bit address pins. These

    are capable of addressing 220 = 1Mega Byte memory.

    To generate this 20 bit physical address from 2 sixteen bit

    registers, the following procedure is adopted.

    The 20 bit address is generated from two 16-bit registers.

    The first 16-bit register is called the segment base register.

    These are code segment registers to hold programs, data

    segment register to keep data, stack segment register for

    stack operations and extra segment register to keep strings

    of data.

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    The contents of the segment registers are shiftedleft four times with zeroes (0s) filling on the right

    hand side. This is similar to multiplying four hex

    numbers by the base 16. This multiplication

    process takes place in the adder and thus a 20 bit

    number is generated. This is called the base address.

    To this a 16-bit offset is added to generate the 20-

    bit physical address.

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    Segmentation helps in the following way. The

    program is stored in code segment area. The data

    is stored in data segment area. In many cases theprogram is optimized and kept unaltered for the

    specific application. Normally the data is variable.

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    So in order to test the program with a different

    set of data, one need not change the program but

    only have to alter the data. Same is the case withstack and extra segments also, which are only

    different type of data storage facilities.

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    Generally, the program does not know the exact

    physical address of an instruction. The

    assembler, a software which converts theAssembly Language Program (MOV, ADD etc.)

    into machine code (3EH, 4CH etc) takes care of

    address generation and location.

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    Today we saw the Control signals indicating

    actions in 8086, Real mode memory addressing