ADS Electro-Thermal Update - Keysight · •Thermal Floor Planner •Wireless Verification Test...
Transcript of ADS Electro-Thermal Update - Keysight · •Thermal Floor Planner •Wireless Verification Test...
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Welcome
Joe Civello
ADS Product Manager
Agilent EEsof EDA
© Agilent Technologies, 2014
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When Separated, Agilent’s EM Business will be named
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ADS 2014 New Technologies, New Capabilities &
Impressive Productivity Improvements
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RF/MW Industry Trends
• Increasing Integration & Design Size/Complexity
- Movement from single technology to multi-
technology design
- GaAs, GaN, SiGe/Si, RF CMOS, mm-Wave
CMOS & laminate
• Economic Trends
- Smaller CAD staff
- Tighter Budgets
- Design Flow Efficiency Improvement Initiatives
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Critical RF/Microwave Design Problems
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• Leads to performance degradation/system integration issues
• Issues are increasing as designs are more compact
• Problem size increases simulation time and capacity needs
• Packaging effects must be taken into account
• Manual design flow integration conversion & translation issues
• Design management issues due to geographically dispersed
design teams
• Process variation has adverse impact on manufacturing yield
• Optimizing electrical performance
• Thermally-related instabilities
• Lack of access
Coupling between multi-technology devices
Design flow integration & efficiency issues
Electro-thermal issues (performance and reliability)
Multiple ICs
Laminate-based packaging
Mounted on board
Multiple technologies
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ADS 2011 & ADS 2012 Solving Today’s Multi-Technology Design Challenges
Electro-Thermal
MMIC PA
Simulation
Multiple IC’s on
different fabrication
technologies
Complete front-to-
back GaAs/Silicon
MMIC design
Design & EM
simulation of
entire laminate
Integrated full
3D FEM to
model package,
solder bumps,
bond wires
3D EM
Components
(w/EMPro
Integration)
Design, layout and
verify IC, laminate,
and PCB in a single
environment. RF Power Amplifier Module
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Single & Multi-Technology Design Challenges Better models
Physical Verification
Challenges
Difficulty simulating
Silicon RFIC Virtuoso
designs w/other
ICs/laminate
Setting up large,
complex EM sims;
manual, time-
consuming & prone
to errors
Compact designs…
better, interconnect
design & editing
Challenges w/ PCB Links
Verification Latest
Wireless Standards
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ADS 2014 New Capabilities & Technologies
• Automatic EM/Circuit Co-simulation
• Thermal Floor Planner
• Wireless Verification Test Benches (LTE-A, LTE, 802.11ac, RADAR)
• DynaFET model
• Improved Layout Interconnect Design & Editing
• Physical LVS w/ Device Recognition & Module-Level LVS
• Silicon RFIC Schematic Interoperability with Virtuoso
• ADS Board Link – Next Generation PCB Integration
• Controlled Impedance Line Designer
• More …
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Automatic EM/Circuit Co-Simulation
• Automates the removal of SMD and IC active devices; placement of ports;
and reconnecting the design.
• 10x+ faster; 20x+ fewer mouse clicks
• Works directly from layout
• Layout Look-alike no longer necessary
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New Thermal Floorplanner
Layout-driven thermal solver
• Enables initial thermal analysis early in the design process: temperature & visualization
• Simple & Fast
• No schematic design or circuit simulation required – based on layout-only thermal simulation
• User inputs device layout, location and estimated power dissipation
• Results provide insight into heat coupling and dissipation of various device layout configurations
Requires
• Standard thermal technology files
• W2349 Electro-thermal license
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ADS Wireless Verification Test Benches
• Provide latest Wireless Standards for
RF Verification
- W2388 LTE
- W2390 LTE-A
- W2385 802.11ac
- W2382 RADAR
• Simplified, easier to use User Interface
- Preconfigured measurements
- Preconfigured data display results
• Flexibility to create custom VTBs or
customize a current VTB product with
SystemVue
• Includes Digital Modulation sources
- QPSK
- PSK
- QAM
- FSK and many more
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Agilent DynaFET Model • Advanced III-V FET (GaN, GaAs) nonlinear simulation model based on
neural network technology (NVNA-based characterization)
• Accurately captures self-heating & trapping effects (knee walkout)
• Single, global model, providing accurate and reliable simulation results
across the entire design space without the need for tuning.
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ADS
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Rectangular Via Array Ground Plane Smoothing Before After
Thermal Relief
Mirco Via Array
Stacked Vias
ADS 2014 Smart Layout Interconnect
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Before
Smoothing
After Smoothing Ground Plane Smoothing
Smoothing options enables to smooth acute angles and
remove notches. Smooth acute angles enables to smooth
the edges created while creating a plane.
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Without Thermal relief
features
With Thermal relief
Thermal Relief
Thermal Relief facilitates solder adhesion for manufacturing processes.
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Smart Layout Interconnect Status
Shipping in ADS 2014
• Power & Ground Planes
- Smoothing
• Thermal Relief
• New Interconnect Vias
- OpenAccess
- Pin-less
- Rectangular or circular
- Custom vias
Beta in ADS 2014.01
• New Interconnect Traces
• Next beta release in May
• Looking for one or two customers
to work closely with on flows
- laminate/module, MMIC & RFIC
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W2320 ADS Advanced Layout Element
Physical LVS w/Device
Recognition
• Industry-standard methodology for
IC verification.
Module-level LVS
• Finds module-level, multi-
technology wiring, pin swap errors
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Device Recognition
• LVS based on physical
properties of the layout
• Industry Standard Approach
• Requires a rules file
• Step through the net mappings
to view the physical nets.
• LVS automatically removes
transmission lines from the
schematic for PDKs configured
with the MMIC Toolbar.
Physical nets are based on conductive
metal (including p-cell artwork).
ADS Example:
MW_Ckts/MMIC_LNA_wrk
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Module LVS Components with Pin Nets
• Finds module-level, multi-technology
wiring & pin swap errors
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OpenAccess & SI2 Silicon Integration Initiative 100 member companies
• Objective: Achieve industry adoption of collaborative
technology to produce better design tools, that get to
market faster, while facilitating tool interoperability.
• Today, more than 40 tools are built on, or interface to
the OpenAccess Database, including the Cadence IC
design tools.
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Conventional vs. Interoperable Design Flow/Data
Conventional Multi-application
Design Flow
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Multi-application Interoperable
Design Flow
Separate Databases,
Requires Translation
Design Data is
application independent
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W2291 Silicon RFIC Interoperability w/ Virtuoso
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LNA
PA
LNA schematic
LNA schematic
Layout
Full front-end design in ADS:
- Schematic entry
- Simulation
- Optimization, statistical analysis,
DOE, …
Open schematic in Virtuoso
Drive connectivity-driven
layout creation and LVS
Flow #1: Front-end design in ADS & layout in Virtuoso
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Flow #2: Open Virtuoso schematics with ADS & simulate for RF performance
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LNA
PA
LNA schematic
LNA schematic
Full RF Simulation in ADS
- Simulation
- Tuning
- Optimization, statistical analysis,
DOE, …
Open schematic in ADS
Legacy Virtuoso schematic:
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Interoperable RF Module / SiP Co-Design Flow
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GDSII, Gerber, DXF,
ODB++, IGES, …
Common 2D formats
IC Platforms Enterprise Board & Package Platforms
3D EM Components
Large-scale RFIC
Small-scale RFIC & MMIC
Connectors, ....
IPD, LDMOS, ….
Direct Links and 2D
Formats (ODB++,
Gerber, DXF, ABL)
Op
en
Ac
ce
ss
a
nd
Dir
ec
t L
ink
s
Op
en
Ac
ce
ss
• System & Circuit Simulation
• Integrated EM
• Modeling
Sub-micron RF/MS SoC 3D Formats (ACIS,
IGES, STEP,…)
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ADS Board Link Next Generation PCB Integration Solution
• Accuracy
- High-fidelity design transfer
- Preserves intelligence in original objects
• Performance
- Improved import/export speed & capacity
- Lower Library Maintenance Cost
- Automation infrastructure for design-kit/parts-library generation and maintenance
• Flow Partner timing
- Zuken (early 2014)
- Intercept (mid 2014)
- Mentor (2014/15)
- Cadence (TBD)
Translators
ODB++
Gerber
DXF
EGS
IFF
Enterprise PCB
Tools
Industry-Std
Formats
Schematics
Layout
Parts Library
IFF
ADFI
XML
ABL File
ABL File
Reader/Writer
ABL File
Reader/Writer
Load to/from
platform-
specific data
structures
Agilent Platforms (ADS, EMPro, ..)
OA
Database
Current ADS PCB Links
New ADS Board Link
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W2307 Controlled Impedance Line Designer
• Design the stack up and line geometry of the controlled impedance lines
• Determines the parameters that you can feed into the Constraint Manager of the auto-router in your enterprise PCB tool
• Use it to create a pre-layout channel in an end-to-end ADS Channel Simulator schematic to optimize metrics that matter: Eye Diagram parameters, not just Bode plots
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ADS 2014 Instrument Links Connection Manager Upgrade
• New Command Expert Mode
- Win XP Server not required for newer/more recent network analyzers
families:
• N5232A PNA
• N5242A PNA
• E8364 PNA
• E8364C PNA
• E5071B/C ENA
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ADS 2014 Solutions for Today’s Design Challenges
DynaFET model
Physical LVS w/Device
Recognition
Silicon RFIC
Interoperability
w/Virtuoso
Automatic EM/Ckt
Co-Simulation
New Vias, Planes & Smart
Layout Interconnect
ADS Board Link Next Generation PCB Integration
Verification Test
Benches: LTE-A,
LTE & 802.11ac
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ADS 30-Second Demos Watch & Win $100 Visa Gift Card
Page 36
www.agilent.com/find/eesof-ads-30-second-demos
or
Google “30 second demos”
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You are invited to our next webcast
Register for our live and recorded webcasts here:
www.agilent.com/find/eesof-innovations-in-eda
www.agilent.com/find/eesof-webcasts-recorded
Liam Devlin
CEO of Plextek RF Integration
Thank you Please complete the short survey following the end of this webcast.
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ADS 2014 New Capabilities & Products
• Automatic EM/Circuit Co-simulation (support)
• Thermal Floor Planner (support)
• Wireless Verification Test Benches (LTE-A, LTE, 802.11ac, RADAR) (support & new product)
• DynaFET model (support)
• Improved Layout Interconnect Design & Editing (support)
• Physical LVS w/ Device Recognition & Module-Level LVS (new product)
• Silicon RFIC Schematic Interoperability with Virtuoso (new product)
• ADS Board Link – Next Generation PCB Integration (support)
• Controlled Impedance Line Designer (new product)
• More …
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New ADS 2014 Products ADS Layout • W2320 ADS Advanced Layout (Physical LVS w/Device Recognition & Module LVS)
Verification Test Benches • W2385 Wireless Networking Verification (802.11ac) Test Bench
• W2390 LTE-A Verification Test Bench
• W2388 LTE 3GPP Verification Test Bench
• W2382 RADAR Verification Test Bench
• W2361 ADS Ptolemy (includes VTB Engine)
• W2233 ADS Verification Bundle (Core, HB, CE, VTB Engine)
• W2381 VTB Engine
High-Speed Digital Design • W2307 Controlled Impedance Line Designer
Silicon RFIC Interoperability w/Virtuoso • W2219 ADS Silicon RFIC Interoperability
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ADS & GoldenGate Verification Test Bench Products Standards-based VTBs
• Wireless Verification Test Benches
- W2388 LTE
- W2390 LTE-A
- W2385 IEEE 802.11ac
- W2382 RADAR
• Runs W2361 Ptolemy/VTB Engine
- The VTB Engine contains customized
SystemVue DF engine for use only with
IP Verification Test Benches
- SVU generated custom VTBs require
VTB Engine
VTB Engine
• Current W2361 Ptolemy customers get
VTB Engine as part of upgrades & support
• Also available for separately W2381
• Includes Digital Modulation sources
- QPSK
- PSK
- QAM
- FSK
- and more
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