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ADC TEST

Mixed Signal VLSI

Xunyu Zhu

Dr. Chris Hutchens

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ADC TEST

Test methods1. Static test - SIN Histogram

i.e. Gain and Offset2. Dynamic test –

i.e. ENOB using 16K FFTSIN fit.

Outline

Does this make sense??

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ADC TEST

Static Tests• Number of digitized bits• Gain • Offset • Differential Nonlinearity (DNL)• Integral Nonlinearity (INL)• Monotonicity

Test Specification

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ADC TEST

• Dynamic Tests• Effective number of bits (ENOB)• Signal-to-noise ration (SNR)• Total Harmonic distortion (THD)• Total spurious distortion (TSD)• Spurious-free dynamic range (SFDR)

Test Specification

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ADC TEST

Objective:• Converter accuracy • Transfer function of the converter• Monotonicity of the converter• Quantify the gain, offset, DNL and INL of the converter

Disadvantage:• Nonlinearites which coupled to the input signal bandwidth cannot be revealed• For high bit converters, measurement is lengthy

Static Test

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ADC TESTTest Setup

Clock

AnalogDigital

DigitalDigital Control

Ramp???? test setup

• Each voltage step less or equal to 1/8 LSB• At lest 10 samples sampled at each voltage level

Logic Analyzer -Word length > NWord depth > > 20π*2N

Pattern generator -Period jitter (peak to peak)less than

122

1 N

Bf

fB is the input signal frequencyN is the ADC resolution

Source generator-Resolution N +3 bits

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ADC TESTStatic Test

ADC static test result

G is the GainVos is the offsetT1 is the ideal value corresponding to T[1]T[k] is the input valueQ is the ideal width of a code binε[k] is the residual error

Transfer function described as below

Using conventional linear least-squares estimation techniques, get G and Vos as below

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ADC TEST

Differential nonlinearity

Static Test

Too Many fonts

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ADC TESTStatic Test

Illustration of DNL and INL

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ADC TESTStatic Test

Integral nonlinearity

Q is the ideal code bin width, expressed in input units,VFS is the full-scale range of the ADC in input units.

The maximum INL is the maximum value of |INL[k]| for all k.

Where INL(k) is the integral nonlinearity at output code k, ε[k] is the difference between ideal output bin T’[k] and T[k] computed from G and Vos,

that is,

osVkTGTkQkTkTk ][)1(][]['][ 1

Too many different fonts

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ADC TEST

• Objective- Measure– Harmonic and spurious distortion information

– Input bandwidth

– Signal-to-noise ratio

– Effective number of bits (ENOB)

– Spurious-free dynamic range (SFDR)

Dynamic Test

Think about the consistency with slide 4

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ADC TEST

• Disadvantage– Cannot test for monotonicity of the ADC– Input signal must be sampled using an integer

number of cycles– Histogram test measure the noise of the ADC

• Test methods– Histogram test– FFT test

Dynamic Test

What is the recommended method for measuring the noise of an ADC?

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ADC TEST

Test setup for histogram and FFT test

Dynamic Test

Clock

AnalogDigital

Digital

Logic Analyzer -Word length > NWord depth > 2π*2N ???

Pattern generator -Period jitter (peak to peak)less than

122

1 N

Bf

fB is the input signal frequencyN is the ADC resolution

Source generator-Resolution N +3 bits

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ADC TEST

• Record length selection

There must be an exact integer number of cycles in a record, and the number of cycles in a record must be relatively prime to the number of samples in the record.

si fM

Jf

fi is the input signal frequencyfs is the sampling signal frequencyJ is the number of cycles per recordM is a record length

Histogram Test

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ADC TEST

The procedure to find the near-optimum input signal frequency

a) Find an integer, r, such that the desired frequency is approximately fs/r.

b) Let J equal the number of full cycles that can be recorded at the frequency in step a)

J=int(M/r)

c) Let fi equal

1i

rJ

Jff s

Histogram Test cont’

a) b) etc are NOT consistent with the rest of the ppt slides

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ADC TESTHistogram Test cont’

Illustration of histogram test results

Review SIN reconstruction after this slide

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ADC TEST

• Total harmonic distortion

The THD is also often expressed as a dB ratio with respect to rms amplitude of the fundamental component of the output,

FFT Test

bandwidthfullinfrequencyalfundermenttheof

mirrorofmagnitudeaveragedtheisffX

frequencyalfundermenttheofmagnitudeaveragedtheisfX

ffXfXA

A

THDTHD

isavm

iavm

isavmiavmrms

rmsdB

)(

)(

))(())((2

1

)(log20

22

10

Too Many Fonts

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ADC TESTFFT Test

• Total spurious distortion

Each of the spurious frequencies in fsp is the frequency of a persistent spectral output component that is neither the fundamental nor a harmonic

distortion component.

samplesofnumbertheisM

distortionspurioustheisf

fXM

TSD

sp

nnspavm )(

1][

Too Many Fonts

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ADC TESTFFT Test

• Spurious-free dynamic range (SFDR)

The ratio of the amplitude of the ADC output averaged spectral component at the input frequency, fi, to the amplitude of the largest harmonic or spurious spectral component observed over the full Nyquist band:

)})()({max

)((log20)(

,

10havgsavg

ff

iavg

fXorfX

fXdBSFDR

hs

WhereXavg is the averaged spectrum of the ADC output,fi is the input signal frequency,fs and fh are the frequencies of the set of harmonic and

spurious spectral components

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ADC TESTFFT Test

Spectrum of a sine wave and its harmonics

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ADC TESTFFT Test

Spectrum of a real ADC FFT test result

Fundamentalfrequency Harmonics

Spurious frequency

SFDR

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ADC TEST

• SINAD is the ration of the signal to the total noise• Time domain calculation

noiserms

signalrmsSINAD

givenisSINADratiodistortionandnoisetosignalThe

waveefitbesttheofsetdatatheisy

setdatasampletheisy

where

yyM

noiserms

n

n

M

nnn

)(

sin

)(1

'

2/1

1

2'

Signal-to-noise and distortion ratio (SINAD)

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ADC TEST

• Frequency domain calculation

2/11

0

2

22

)(1

))(())((1

M

mmavm

isavmiavm

fEM

noiserms

ffXfXM

signalrms

• Effective number of bits (ENOB)

))2/(

(log)5.1(log2

1)(log 222 V

ASINADENOB

WhereA is the amplitude of the sine wave fitted to the outputV is the full-scale range of the ADC under test

Signal-to-noise and distortion ratio (SINAD) cont’

Summary Must follow