Acer Aspire 7738G DDR3
description
Transcript of Acer Aspire 7738G DDR3
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBBLOCK DIAGRAM
A2
1 55Saturday, December 20, 2008
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBBLOCK DIAGRAM
A2
1 55Saturday, December 20, 2008
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBBLOCK DIAGRAM
A2
1 55Saturday, December 20, 2008
UMA
Mobile CPU
CantigaHOST BUS 667/800/[email protected]
DDR3800/1066 MHzDDR3
ICH9M
X4 DMI400MHz C-Link0
ODD SATA
SATA
HDD SATA
SATA Mini USBBlue Tooth Camera
USB4 Port
USB KBCWPCE773LA0DGWinbond
INT.KB
TouchPad
BIOS(2MB) DEBUGCONN.
LPC
LPC BUS
Mini 1 CardWire LAN
PCIe
BCM5764MKMLGLANGiga LAN
New Card PWR SWTPS2231
MS/MS Pro/xD/MMC/SD
VGA Borad
CLK GEN.ICS9LPRS365BKLFT
SMSC
CodecALC888
MIC In
MDC Card
G1454ROP AMP
AZALIA
MODEM
INT.SPKR
Line Out(SPDIF)RJ11
AGTL+ CPU I/FDDR Memory I/F
INTEGRATED GRAHPICSLVDS, CRT I/F
6 PCIe portsPCI/PCI BRIDGE
ACPI 2.04 SATA
12 USB 2.0/1.1 ports
PCIex16
800/1066 MHz
CardBusUSB
ETHERNET (10/100/1000MbE)High Definition Audio
LPC I/FSerial Peripheral I/F
Matrix Storage Technology(DO)Active Managemnet Technology(DO)
Penryn3
4, 5
6,7,8,9,10,11
16,17
16,17
12,13,14,15
38
24
22 26
34
27
28
18
36 36
37
30
31
32
32
32
39
41 39
4040
21
JM70 -MV Block DiagramProject code: 91.4AN01.001PCB P/N : 48.4AN01.0SAREVISION : SB 08246
TOPGNDSS
GNDBOTTOM
PCB STACKUP
DCBATOUT
SYSTEM DC/DC
1.5V_S3
INPUTS
SYSTEM DC/DCISL62392
5V_S5(6A)
46
OUTPUTS
RT9026DDR_VREF_S3(1.2A)
49
3D3V_S5(7A)
1D5V_S3(10A)
46
DCBATOUT 1D05V_S0(10A)INPUTS OUTPUTSTPS51124
G9198-153D3V_S5 1D5V_S5
(300mA)
14
50
51
VCC_CORE0~1.3V 38A
OUTPUTS
CPU DC/DC
INPUTSDCBATOUT
CHARGEROUTPUTSINPUTS
CHG_PWRDCBATOUT 18V 6.0A
ISL88731A
ADP3208C
AU6433
Int MIC32
1.5W
(MXM 3.0 Connector)HDMI
20CRT
19LCD
TXFM RJ4529 29
SPI
EMC2102
3D3V_AUX_S55V_AUX_S5
LINE IN32
ESATA
SATA25
INT.SUBWOOFER32
G1442RD
SUBWOOFER AMP
32
Mini 2 CardTV TUNER 37
2nd HDD
SATA
23
Level shift PS8101
Finger Printer 41
MEDIAKEY
42
0~1.3V 6.5A
VCC_GFXCORE
48
DCBATOUT
INPUTS
GFX DC/DC
OUTPUTS
ISL6263
19
35 35
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBReference
A3
2 55Saturday, December 20, 2008
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBReference
A3
2 55Saturday, December 20, 2008
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
JM70-MV SBReference
A3
2 55Saturday, December 20, 2008
UMA
1 = TLS cipher suite with confidentiality (default)
0 = Transport Layer Security (TLS) cipher suite with no confidentiality
Cantiga chipset and ICH9M I/O controllerHub strapping configuration
page 218
Intel Management engine Crypto strap
CFG6
Reserved This signal should not be pulled high.
GPIO49
SPI_MOSI
GPIO33/HDA_DOCK_EN#
SATALED#
SPKR
TP3
CFG9
00 = Reserve
(Default)CFG16
0 = LFP Disabled (Default)Local Flat Panel(LFP) Present
CFG19
CFG20
SDVO_CTRLDATA
11 = Disabled (default)
1 = Dynamic ODT Enabled0 = Dynamic ODT Disabled
1= LFP Card Present; PCIE disabledL_DDC_DATA
FSB Dynamic ODT
DMI Lane Reversal
NOTE:
PCIE config2 bit2,Rising Edge of PWROK.
GNT2#/GPIO53
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Top-Block Swap Override.Rising Edge of PWROK.
GNT0#:SPI_CS1#/GPIO58
0 = Reverse Lanes,15->0,14->1 ect..
Boot BIOS Destination Selection 0:1.Rising Edge of PWROK.
ESI compatible mode is for server platforms only.This signal should not be pulled low for desttopand mobile.
HDA_SDOUT
HDA_SYNC
GNT3#/GPIO55
Signal
Sampled low:Top-Block Swap mode(inverts A16 forall cycles targeting FWH BIOS space).Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.
This signal has a weak internal pull-up.
XOR Chain Entrance/PCIE Port Config1 bit1,Rising Edge of PWROK
1= Normal operation(Default):Lane Numbered in order
Allows entrance to XOR Chain testing when TP3pulled low.When TP3 not pulled low at rising edgeof PWROK,sets bit1 of RPC.PC(Config Registers:offset 224h). This signal has weak internal pull-down
PCIE config1 bit0,Rising Edge of PWROK.
GPIO20
Usage/When Sampled
ESI Strap (Server Only)Rising Edge of PWROK
Comment
CFG[13:12]
0 = Only Digital Display Port or PCIE is operational (Default)1 =Digital display Port and PCIe are operting simulataneously via the PEG port0 =No SDVO Card Present (Default)1 = SDVO Card Present
DMI Termination Voltage,Rising Edge of PWROK.
The signal is required to be low for desktopapplications and required to be high formobile applications.
Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)
CFG[2:0]
CFG[4:3]CFG8CFG[15:14]CFG[18:17]
CFG5
Pin Name
011 = FSB667FSB Frequency Select
0 = DMI x2
others = ReservedReserved
(Default)1 = DMI x4
Strap Description
DMI x2 SelectiTPM Host Interface
Configuration
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal has a weak internal pull-down.
GNT1#/GPIO51
Integrated TPM Enable,Rising Edge of CLPWROK
Sample low: the Integrated TPM will be disabled.Sample high: the MCH TPM enable strap is sampledlow and the TPM Disable bit is clear, theIntegrated TPM will be enable.
Flash Descriptor Security Override StrapRising Edge of PWROK
PCI Express Lane Reversal. Rising Edgeof PWROK.No Reboot.Rising Edge of PWROK.
XOR Chain Entrance.Rising Edge of PWROK.
This signal should not be pull low unless using XOR Chain testing.
If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timersystem reboot feature). The status is readable via the NO REBOOT bit.
ICH9M Functional Strap Definitions
Controllable via Boot BIOS Destination bit(Config Registers:Offset 3410h:bit 11:10).GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
page 92
Sampled low:the Flash Descriptor Security will beoverridden. If high,the security measures will be in effect.This should only be enabled in manufacturingenvironments using an external pull-up resister.
SDVO Present
Montevina Platform Design guide 22339 0.5
010 = FSB800000 = FSB1067
ICH9 EDS 642879 Rev.1.5
CFG7
ICH9 EDS 642879 Rev.1.5
ICH9M Integrated Pull-upand Pull-down Resistors
SIGNAL Resistor Type/Value
HDA_BIT_CLK
HDA_RST#HDA_SDIN[3:0]HDA_SDOUTHDA_SYNC
GNT[3:0]#/GPIO[55,53,51]GPIO[20]
LDA[3:0]#/FHW[3:0]#
LDRQ[0]
PME#PWRBTN#SATALED#
LAN_RXD[2:0]
LDRQ[1]/GPIO23
TP[3]
SPKR
GLAN_DOCK#
SPI_CS1#/GPIO58/CLGPIO6
USB[11:0][P,N]
CL_RST0#
SPI_MOSISPI_MISO
TACH_[3:0]
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 15K
The pull-up or pull-down active when configured for nativeGLAN_DOCK# functionality and determined by LAN controller
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20KPULL-UP 20KPULL-UP 20KPULL-UP 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20KPULL-UP 20K
PULL-DOWN 20KPULL-DOWN 20KPULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
GPIO[49]
HDA_DOCK_EN#/GPIO33
CL_DATA[1:0]CL_CLK[1:0]
DPRSLPVR/GPIO16ENERGY_DETECT
PULL-DOWN 20KPULL-UP 20K
PULL-UP 20KPULL-UP 20KPULL-UP 20K
0= The iTPM Host Interface is enabled(Note2)1=The iTPM Host Interface is disalbed(default)
PCIE Graphics Lane
CFG10 PCIE Loopback enable0 = Enable (Note 3)1= Disabled (default)
XOR/ALL
1 = Reverse LanesDMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)DMI x2 mode[MCH -> ICH]:(3->0,2->1)
0 = Normal operation(Default): Lane Numbered in Order
Digital Display Port(SDVO/DP/iHDMI)Concurrent with PCIe
1. All strap signals are sampled with respect to the leading edge ofthe (G)MCH Power OK (PWROK) signal.2. iTPM can be disabled by a 'Soft-Strap' option in theFlash-decriptor section of the Firmware. This 'Soft-Strap' isactivated only after enabling iTPM via CFG6.Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
10 = XOR mode Enabled01 = ALLZ mode Enabled (Note 3)
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AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3D3V_48MPWR_S0 3D3V_CLKPLL_S0
PCLKCLK4PCLKCLK5
PCLKCLK4
PCLKCLK2
PCLKCLK5
3D3V_48MPWR_S0
CPU_SEL2_R
GEN_XTAL_OUT_R
GEN_XTAL_IN
PCLKCLK5
3D3V_CLKPLL_S0
PCLKCLK4
GEN_XTAL_OUT
CLK48
3D3V_CLKGEN_S0
PCLKCLK3
DREFCLK_1DREFCLK_1#
PCLKCLK2
3D3V_CLKGEN_S0
CPU_SEL2_R
CPU_SEL2_R
PCLKCLK5PCLKCLK4PCLKCLK2CLK48
DREFSSCLK_1#DREFSSCLK_1
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S01D05V_S0
CLK_PCIE_SATA 12CLK_PCIE_SATA# 12
PCLK_ICH13
CPU_SEL14,7
PCLK_KBC39
CLK_CPU_BCLK 4CLK_CPU_BCLK# 4
SMBD_ICH15,16,17SMBC_ICH15,16,17
CLK_PWRGD13
CLK_MCH_BCLK 6CLK_MCH_BCLK# 6
PM_STPCPU#13PM_STPPCI#13
CLK48_ICH13CPU_SEL04,7
CLK_PCIE_NEW 36CLK_PCIE_NEW# 36
CLK_PCIE_MINI1 37CLK_PCIE_MINI1# 37
CLK_PCIE_PEG 18CLK_PCIE_PEG# 18
CLK_MCH_3GPLL 7CLK_MCH_3GPLL# 7
CLK_PCIE_LAN 28CLK_PCIE_LAN# 28
CLK_PCIE_MINI2 37CLK_PCIE_MINI2# 37
CLK_PCIE_ICH 13CLK_PCIE_ICH# 13
PCLK_FWH40
DREFCLK 7DREFCLK# 7
CLK48_Cardreader35
CPU_SEL24,7
CLK_ICH1413
DREFSSCLK# 7DREFSSCLK 7
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 55Saturday, December 20, 2008JM70-MV SB
UMA
SEL1FSB
SEL0FSA
133M100M
166M800M
0 101 X
667M200M
0 1
CPUSEL2FSC FSB
0 10
101
1067M266M0 0 0
533M
CL=20pF0.2pF
Byte 6, bit 60 = SRC7 enabled (default)1= CR#_F controls SRC8
Byte 6, bit 40 = SRC11 enabled (default)1= CR#_H controls SRC10
Byte 6, bit 50 = SRC11# enabled (default)1= CR#_G controls SRC9
SRCC7/CR#_ESRCT7/CR#_F
PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pairByte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair
PCI1/CR#_B0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#PCI4/27M_SEL
ICS9LPRS365YGLFT setting table
0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN
PCI3
PCI0/CR#_A
EMI capacitor
Byte 6, bit 70 = SRC7# enabled (default)1= CR#_F controls SRC6
PIN NAME DESCRIPTION
Byte 5, bit 30 = SRC3 enabled (default)1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pairByte 5, bit 20 = CR#_C controls SRC0 pair (default),1= CR#_C controls SRC2 pair
Byte 5, bit 10 = SRC3 enabled (default)1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pairByte 5, bit 00 = CR#_D controls SRC1 pair (default)1= CR#_D controls SRC4 pair
SRCC3/CR#_D
SRCC11/CR#_GSRCT11/CR#_HSRCT3/CR#_C
2008.12.08 SB
R393Do Not Stuff
DYR393
Do Not Stuff
DY12
RN52SRN0J-6-GP
UMARN52SRN0J-6-GP
UMA
12 3
4
R378 22R2J-2-GPR378 22R2J-2-GP12
C239
SC
D1U
16V2ZY
-2GP
C239
SC
D1U
16V2ZY
-2GP
1
2
C582
SC
D1U
16V2ZY
-2GP
C582
SC
D1U
16V2ZY
-2GP
1
2
C554
SC
D1U
16V2ZY
-2GP
C554
SC
D1U
16V2ZY
-2GP
1
2
R158 Do Not StuffDYR158 Do Not StuffDY 12
C560
SC
D1U
16V2ZY
-2GP
C560
SC
D1U
16V2ZY
-2GP
1
2
R3830R0603-PAD
R3830R0603-PAD
12
R374 2K2R2J-2-GPR374 2K2R2J-2-GP12
R399 22R2J-2-GPR399 22R2J-2-GP12
EC59Do N
ot Stuff
DYEC59D
o Not S
tuff
DY12
EC61SC
10P50V
2JN-4G
P
EC61SC
10P50V
2JN-4G
P
1
2
EC57Do N
ot Stuff
DYEC57D
o Not S
tuff
DY12
C226
SC
D1U
16V2ZY
-2GP
C226
SC
D1U
16V2ZY
-2GP
1
2
C580
SC
D1U
16V2ZY
-2GP
C580
SC
D1U
16V2ZY
-2GP
1
2
C250
SC
D1U
16V2ZY
-2GP
C250
SC
D1U
16V2ZY
-2GP
1
2
TP150AFTE14P-GP
TP150AFTE14P-GP
1
C238
SC27P50V2JN-2-GP
C238
SC27P50V2JN-2-GP
1 2
R3840R0603-PAD
R3840R0603-PAD
12
R381 22R2J-2-GPR381 22R2J-2-GP12
RN57
SRN10KJ-6-GP
RN57
SRN10KJ-6-GP
12345
678
C566
SC
D1U
16V2ZY
-2GP
C566
SC
D1U
16V2ZY
-2GP
1
2
C555SC
1U16V
3ZY-G
P
C555SC
1U16V
3ZY-G
P
1
2
C557
SC
D1U
16V2ZY
-2GP
C557
SC
D1U
16V2ZY
-2GP
1
2
RN56
SRN33J-7-GP
RN56
SRN33J-7-GP
1234 5
678
U54
ICS9LPRS365BKLFT-GP-U2nd = 71.08513.003
71.09365.A03
U54
ICS9LPRS365BKLFT-GP-U2nd = 71.08513.003
71.09365.A03
G
N
D
R
E
F
1
X22X13
V
D
D
R
E
F
4
REF0/FSLC/TEST_SEL5
SDATA6SCLK7
PCI0/CR#_A8
V
D
D
P
C
I
9
PCI1/CR#_B10PCI2/TME11PCI312PCI4/27_SELECT13PCI_F5/ITP_EN14
G
N
D
P
C
I
1
5
V
D
D
4
8
1
6
USB_48MHZ/FSLA17
G
N
D
4
8
1
8
V
D
D
9
6
_
I
O
1
9
SRCT0/DOTT_96 20SRCC0/DOTC_96 21
G
N
D
2
2
V
D
D
P
L
L
3
2
3
27MHZ_NONSS/SRCT1/SE1 2427MHZ_SS/SRCC1/SE2 25
G
N
D
2
6
V
D
D
P
L
L
3
_
I
O
2
7
SRCT2/SATAT 28SRCC2/SATAC 29
G
N
D
S
R
C
3
0
SRCT3/CR#_C 31SRCC3/CR#_D 32
V
D
D
S
R
C
_
I
O
3
3
SRCT4 34SRCC4 35
G
N
D
S
R
C
3
6
SRCT9 37SRCC9 38
SRCC11/CR#_G 39SRCT11/CR#_H 40
SRCT10 41SRCC10 42
V
D
D
S
R
C
_
I
O
4
3
CPU_STOP#44PCI_STOP#45
V
D
D
S
R
C
4
6
SRCC6 47SRCT6 48
G
N
D
S
R
C
4
9
SRCC7/CR#_E 50SRCT7/CR#_F 51
V
D
D
S
R
C
_
I
O
5
2
CPUC2_ITP/SRCC8 53CPUT2_ITP/SRCT8 54
NC#5555
V
D
D
C
P
U
_
I
O
5
6
CPUC1_F 57CPUT1_F 58
G
N
D
C
P
U
5
9
CPUC0 60CPUT0 61V
D
D
C
P
U
6
2
CK_PWRGD/PD#63
FSLB/TEST_MODE64
G
N
D
6
5
R1570R0402-PAD
R1570R0402-PAD1 2
C199
SC
D1U
16V2ZY
-2GP
C199
SC
D1U
16V2ZY
-2GP
1
2
C581
SC
D1U
16V2ZY
-2GP
C581
SC
D1U
16V2ZY
-2GP
1
2
C260
SC33P50V2JN-3GP
C260
SC33P50V2JN-3GP
1 2
C222
SC
D1U
16V2ZY
-2GP
C222
SC
D1U
16V2ZY
-2GP
1
2
R403Do Not Stuff DY
R403Do Not Stuff DY 12
C576
SC
4D7U
10V5ZY
-3GP
C576
SC
4D7U
10V5ZY
-3GP
1
2
R4020R0603-PAD
R4020R0603-PAD
12
EC56Do N
ot Stuff
DYEC56D
o Not S
tuff
DY12
C556Do N
ot Stuff
DY
C556Do N
ot Stuff
DY
1
2
X2
X-14D31818M-44GP
82.30005.9512nd = 82.30005.891
X2
X-14D31818M-44GP
82.30005.9512nd = 82.30005.891
1
2
C569SC
4D7U
6D3V
3KX
-GP
C569SC
4D7U
6D3V
3KX
-GP
1
2
RN53SRN0J-6-GP
UMA
RN53SRN0J-6-GP
UMA
123
4
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_A#18
H_A#20H_A#21H_A#22
H_A#17
H_A#19
H_A#23H_A#24H_A#25H_A#26H_A#27H_A#28H_A#29H_A#30H_A#31
H_A#3H_A#4H_A#5H_A#6H_A#7H_A#8H_A#9H_A#10H_A#11H_A#12H_A#13H_A#14H_A#15H_A#16
H_REQ#0H_REQ#1H_REQ#2H_REQ#3H_REQ#4
H_A#[35..3]
H_RS#1H_RS#0
H_RS#2
H_IERR#
XDP_TCKXDP_TDI
XDP_TMSXDP_TRST#XDP_DBRESET#
PM_THRMTRIP-A#_CPU
XDP_BPM#5
H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39
H_D#41H_D#40
H_D#42H_D#43
H_D#[63..0]
H_D#44H_D#45H_D#46H_D#47
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9
H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15
H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31
H_D#48H_D#49
H_D#51H_D#50
H_D#52H_D#53H_D#54H_D#55
H_D#57H_D#56
H_D#58H_D#59H_D#60H_D#61
H_D#63H_D#62
COMP0COMP1COMP2COMP3
TEST1
TEST2
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DINV#[3..0]
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_DBRESET#
XDP_TCK
H_THERMDC
H_THERMDA
CPU_GTLREF0
CPU_PROCHOT#_2
TEST4
TEST1TEST2
TEST4
H_A#32H_A#33H_A#34H_A#35
XDP_BPM#5
H_STPCLK#_R
H_DPSLP#H_DPWR#
H_DPRSTP#
H_PWRGDH_CPUSLP#H_INIT#H_CPURST#
H_CPURST#
-BPM1_1-BPM1_0
-BPM1_2
H_THA_Q
RSVD_CPU_C3
TDI_1TDO_2
RSVD_CPU_D2
H_THC_Q
TDI_TDO_M
TDO_2
TDI_1
-BPM1_2
-BPM1_1
-BPM1_0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0
1D05V_S0
H_ADS# 6H_BNR# 6
H_DRDY# 6H_DBSY# 6
H_BREQ#0 6
H_HIT# 6H_HITM# 6
H_LOCK# 6
H_DSTBN#2 6H_DSTBP#2 6H_DINV#2 6
H_D#[63..0] 6
H_DSTBN#3 6H_DSTBP#3 6H_DINV#3 6
H_ADSTB#16
H_A#[35..3]6
H_ADSTB#06H_REQ#[4..0]6
H_DSTBN#06H_DSTBP#06H_DINV#06
H_DSTBN#16H_DSTBP#16H_DINV#16
H_BPRI# 6
H_DEFER# 6
H_INIT# 12
H_CPURST# 6,54H_RS#[2..0] 6
H_TRDY# 6
H_THERMDA 38
CLK_CPU_BCLK 3CLK_CPU_BCLK# 3
H_DPRSTP# 7,12,51H_DPSLP# 12H_DPWR# 6
H_PWRGD 12,44H_CPUSLP# 6
H_FERR#12
H_THERMDC 38
PM_THRMTRIP-A# 7,12,44
H_INTR12H_NMI12H_SMI#12
H_IGNNE#12
H_A20M#12
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
CPU_SEL23,7
CPU_SEL03,7CPU_SEL13,7
H_STPCLK#12
H_PSI# 51
CPU_PROCHOT#_R 51
H_GTUREF_25
H_THA_Q38H_THC_Q38
H_THA_Q38
H_THC_Q38
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 55Saturday, December 20, 2008JM70-MV SB
UMA
H_IERR# with a GND0.1" away
Place testpoint on
Layout Note:Comp0, 2 connect with Zo=27.4 ohm, make
Comp1, 3 connect with Zo=55 ohm, maketrace length shorter than 0.5" .
trace length shorter than 0.5" .
Layout Note:"CPU_GTLREF0"0.5" max length.
should connect toPM_THRMTRIP#without T-ingICH9 and MCH
All place within 2" to CPU
Net "TEST4" as short as possible,make sure "TEST4" routing isreference to GND and away othernoisy signals
PH @ page48
Place these TP on button-side, easy to measure.
Close to CPU
XDP FOR QUAD CORE CPU
Close to CPU
TP90AFTE14P-GP TP90AFTE14P-GP 1
C181
D
o
N
o
t
S
t
u
f
f
DY
C181
D
o
N
o
t
S
t
u
f
f
DY
1
2
TP93 AFTE14P-GPTP93 AFTE14P-GP1
TP86 AFTE14P-GPTP86 AFTE14P-GP1
R811KR2F-3-GPR811KR2F-3-GP
1
2
C514Do Not StuffDY
C514Do Not StuffDY
1
2
R74 54D9R2F-L1-GPR74 54D9R2F-L1-GP1 2
R100Do Not StuffDY
R100Do Not StuffDY1 2
TP85 AFTE14P-GPTP85 AFTE14P-GP1
R1150R2J-2-GP
R1150R2J-2-GP
1 2
R103
Do Not StuffDYR103
Do Not StuffDY1 2
R11168R2-GPR11168R2-GP
1
2
R78 54D9R2F-L1-GPR78 54D9R2F-L1-GP1 2
TP52 AFTE14P-GPTP52 AFTE14P-GP1TP53 AFTE14P-GPTP53 AFTE14P-GP1
1 OF 4
R
E
S
E
R
V
E
D
HCLK
THERMAL
ADDR GROUP 1
X
D
P
/
I
T
P
S
I
G
N
A
L
S
C
O
N
T
R
O
L
ADDR GROUP 0ICH
CPU1A
BGA479-SKT6-GPU662.10079.0012nd = 62.10053.401
1 OF 4
R
E
S
E
R
V
E
D
HCLK
THERMAL
ADDR GROUP 1
X
D
P
/
I
T
P
S
I
G
N
A
L
S
C
O
N
T
R
O
L
ADDR GROUP 0ICH
CPU1A
BGA479-SKT6-GPU662.10079.0012nd = 62.10053.401
A3#J4A4#L5A5#L4A6#K5A7#M3A8#N2A9#J1A10#N3A11#P5A12#P2A13#L2A14#P4A15#P1A16#R1
A20M#A6
ADS# H1
ADSTB0#M1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L1
A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5
A30#U2
A24#R4A25#T5A26#T3
A32#W3
A28#W5A29#Y4
A27#W2
A31#V4
A33#AA4A34#AB2A35#AA3
FERR#A5IGNNE#C4
RSVD#M4M4RSVD#N5N5RSVD#T2T2RSVD#V3V3RSVD#B2B2RSVD#C3C3
BNR# E2BPRI# G5
DEFER# H5
DBSY# E1DRDY# F21
BR0# F1
IERR# D20INIT# B3
LOCK# H4
RS0# F3RS1# F4RS2# G3
TRDY# G2
HIT# G6HITM# E4
BPM0# AD4BPM1# AD3BPM2# AD1BPM3# AC4PRDY# AC2PREQ# AC1
TCK AC5TDI AA6
TDO AB3TMS AB5
TRST# AB6DBR# C20
PROCHOT# D21THRMDA A24
THERMTRIP# C7
BCLK0 A22BCLK1 A21
RSVD#D2D2
RSVD#F6F6RSVD#D3D3RSVD#D22D22
STPCLK#D5LINT0C6LINT1B4SMI#A3
A23#U1
ADSTB1#V1
RESET# C1
KEY_NCB1
THRMDC B25
R305 27D4R2F-L1-GP
QC = 64.24R95.6DL
R305 27D4R2F-L1-GP
QC = 64.24R95.6DL1 2
R73 54D9R2F-L1-GPR73 54D9R2F-L1-GP1 2
R116 Do Not StuffDYR116 Do Not StuffDY1 2
TP94AFTE14P-GP TP94AFTE14P-GP 1 R288 54D9R2F-L1-GP
QC = 64.49R95.6DL
R288 54D9R2F-L1-GP
QC = 64.49R95.6DL1 2
R94
Do Not StuffDYR94
Do Not StuffDY1 2
C467
D
o
N
o
t
S
t
u
f
f
DYC467
D
o
N
o
t
S
t
u
f
f
DY
R80 27D4R2F-L1-GP
QC = 64.24R95.6DL
R80 27D4R2F-L1-GP
QC = 64.24R95.6DL1 2
R71 54D9R2F-L1-GPR71 54D9R2F-L1-GP1 2
TP55 AFTE14P-GPTP55 AFTE14P-GP1
TP108 AFTE14P-GPTP108 AFTE14P-GP1
R107
Do Not StuffDYR107
Do Not StuffDY1 2
TP56 AFTE14P-GPTP56 AFTE14P-GP1
C428
Do Not StuffDY
C428
Do Not StuffDY 12
R82 54D9R2F-L1-GP
QC = 64.49R95.6DL
R82 54D9R2F-L1-GP
QC = 64.49R95.6DL1 2
R86
Do Not StuffDYR86
Do Not StuffDY1 2
C128
D
o
N
o
t
S
t
u
f
f DYC128
D
o
N
o
t
S
t
u
f
f DY12
2 OF 4
DATA GRP0DATA GRP1
D
A
T
A
G
R
P
2
D
A
T
A
G
R
P
3
MISC
CPU1B
BGA479-SKT6-GPU6
2 OF 4
DATA GRP0DATA GRP1
D
A
T
A
G
R
P
2
D
A
T
A
G
R
P
3
MISC
CPU1B
BGA479-SKT6-GPU6
D16#N22D17#K25D18#P26D19#R23D20#L23D21#M24D22#L22D23#M23D24#P25D25#P23D26#P22D27#T24D28#R24D29#L25D30#T25D31#N25
DINV0#H25
DINV1#N24
DSTBN0#J26
DSTBN1#L26
DSTBP0#H26
DSTBP1#M26
D0#E22D1#F24D2#E26D3#G22D4#F23D5#G25D6#E25D7#E23D8#K24D9#G24D10#J24D11#J23D12#H22D13#F26D14#K22D15#H23
D53# AC26
D60# AC22
D63# AC23
GTLREFAD26
TEST2D25
BSEL0B22BSEL1B23BSEL2C21
DINV2# U22
D32# Y22D33# AB24D34# V24D35# V26D36# V23
D38# U25D39# U23D40# Y25D41# W22D42# Y23D43# W24D44# W25D45# AA23D46# AA24D47# AB25
DSTBP2# AA26DSTBN2# Y26
D48# AE24D49# AD24
D52# AB21
D54# AD20D55# AE22D56# AF23D57# AC25D58# AE21D59# AD21
D61# AD23
DINV3# AC20
DSTBN3# AE25
D51# AB22D50# AA21
D62# AF22
COMP0 R26COMP1 U26
DPRSTP# E5DPSLP# B5DPWR# D24
PWRGOOD D6SLP# D7PSI# AE6
TEST1C23
TEST6A26
TEST3C24
TEST5AF1TEST4AF26
D37# T22
DSTBP3# AF24
COMP2 AA1COMP3 Y1
TP96 AFTE14P-GPTP96 AFTE14P-GP1
TP99 AFTE14P-GPTP99 AFTE14P-GP1
R70 54D9R2F-L1-GPR70 54D9R2F-L1-GP1 2
TP54 AFTE14P-GPTP54 AFTE14P-GP1
TP95 AFTE14P-GPTP95 AFTE14P-GP1
R112Do Not Stuff
DY
R112Do Not Stuff
DY
1 2
R106 Do Not StuffDY
R106 Do Not StuffDY
1 2
R11056R2J-4-GP
QC = 64.49R95.6DL
R11056R2J-4-GP
QC = 64.49R95.6DL
1
2
TP89 AFTE14P-GPTP89 AFTE14P-GP1TP98 AFTE14P-GPTP98 AFTE14P-GP1
R792KR2F-3-GP
QC = 64.17415.6DL
R792KR2F-3-GP
QC = 64.17415.6DL
1
2
R105Do Not StuffDY
R105Do Not StuffDY1 2
R1190R2J-2-GP
R1190R2J-2-GP
1 2
R362
Do Not Stuff
DY
QC = 64.10005.6DL
R362
Do Not Stuff
DY
QC = 64.10005.6DL1 2
R113 Do Not StuffDY
R113 Do Not StuffDY1 2
R114 Do Not StuffDY
R114 Do Not StuffDY1 2
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_VID0H_VID1H_VID2H_VID3H_VID4H_VID5H_VID6
VCC_SENSE_1
VSS_SENSE_1
AA7
AA7
HFPLL_2
TEST55
ACLKPH_2
DCLKPH_2
GTLREF_Control
VCC_CORE
VCC_CORE
1D5V_S0
1D05V_S0
1D5V_VCCA_S0
1D05V_S0
VCC_CORE
VCC_CORE
VCC_CORE
1D05V_S0_CPU
VCC_CORE
1D05V_S0
1D05V_S0
3D3V_S5
VCC_SENSE 51
VSS_SENSE 51
H_VID[6..0] 51
H_GTUREF_2 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 55Saturday, December 20, 2008JM70-MV SB
Layout Note:
should be of equal length.VCCSENSE and VSSSENSE lines
Layout Note:Provide a test point (withno stub) to connect a differential probe between VCCSENSE andVSSSENSE at the locationwhere the two 54.9ohmresistors terminate the55 ohm transmission line.
layout note: "1D5V_VCCA_S0"as short as possible
CPU TYPE TABLE
FLOATING PINQUAD CORE
DAUL CORE
GTLREF_CONTROL
GND PIN
0.63*VTT
0V
CPU H_GTLREF
waiting QUAD CORE symbol
C175
SC
10U6D
3V5M
X-3G
P
C175
SC
10U6D
3V5M
X-3G
P
1
2
TP50 AFTE14P-GPTP50 AFTE14P-GP1
C132SC
D1U
10V2K
X-4G
P
C132SC
D1U
10V2K
X-4G
P
1
2
C120
SC
10U6D
3V5M
X-3G
P
C120
SC
10U6D
3V5M
X-3G
P
1
2
C173SC
D1U
10V2K
X-4G
P
C173SC
D1U
10V2K
X-4G
P
1
2
R104Do Not Stuff
DYQC = 64.17415.6DL
R104Do Not Stuff
DYQC = 64.17415.6DL
1
2
C119
SC
10U6D
3V5M
X-3G
P
C119
SC
10U6D
3V5M
X-3G
P
1
2
R108
0R2J-2-G
P
R108
0R2J-2-G
P
1
2
C158Do N
ot Stuff
DY
C158Do N
ot Stuff
DY
1
2
C168
SC
10U6D
3V5M
X-3G
P
C168
SC
10U6D
3V5M
X-3G
P
1
2
C159SC
D1U
10V2K
X-4G
P
C159SC
D1U
10V2K
X-4G
P
1
2
G8
GAP-CLOSE-PWR
G8
GAP-CLOSE-PWR
1 2
L12
FCM1608KF-1-GP
2nd = 68.00248.061L12
FCM1608KF-1-GP
2nd = 68.00248.0611 2
4 OF 4CPU1D
BGA479-SKT6-GPU6
4 OF 4CPU1D
BGA479-SKT6-GPU6
VSSAF2
VSSA4VSSA8VSSA11VSSA14VSSA16VSSA19VSSA23
VSSB6VSSB8VSSB11VSSB13VSSB16VSSB19VSSB21VSSB24VSSC5VSSC8VSSC11VSSC14VSSC16VSSC19VSSC2VSSC22VSSC25VSSD1VSSD4VSSD8VSSD11VSSD13VSSD16VSSD19VSSD23VSSD26VSSE3VSSE6VSSE8VSSE11VSSE14VSSE16VSSE19VSSE21VSSE24VSSF5VSSF8VSSF11VSSF13VSSF16VSSF19VSSF2VSSF22VSSF25VSSG4VSSG1VSSG23VSSG26VSSH3VSSH6VSSH21VSSH24VSSJ2VSSJ5VSSJ22VSSJ25VSSK1VSSK4VSSK23VSSK26VSSL3VSSL6VSSL21VSSL24VSSM2VSSM5VSSM22VSSM25VSSN1VSSN4VSSN23VSSN26VSSP3
VSS P6VSS P21VSS P24VSS R2VSS R5VSS R22VSS R25VSS T1VSS T4VSS T23VSS T26VSS U3VSS U6VSS U21VSS U24VSS V2VSS V5VSS V22VSS V25VSS W1VSS W4VSS W23VSS W26VSS Y3VSS Y6VSS Y21VSS Y24VSS AA2VSS AA5VSS AA8VSS AA11VSS AA14VSS AA16VSS AA19VSS AA22VSS AA25VSS AB1VSS AB4VSS AB8VSS AB11VSS AB13VSS AB16VSS AB19VSS AB23VSS AB26VSS AC3VSS AC6VSS AC8VSS AC11VSS AC14VSS AC16VSS AC19VSS AC21VSS AC24VSS AD2VSS AD5VSS AD8VSS AD11VSS AD13VSS AD16VSS AD19VSS AD22VSS AD25VSS AE1VSS AE4VSS AE8VSS AE11VSS AE14VSS AE16VSS AE19VSS AE23VSS AE26VSS A2VSS AF6VSS AF8VSS AF11VSS AF13VSS AF16VSS AF19VSS AF21VSS A25VSS AF25
C146SC
4D7U
6D3V
3KX
-GP
C146SC
4D7U
6D3V
3KX
-GP
1
2
C176
SC
10U6D
3V5M
X-3G
P
C176
SC
10U6D
3V5M
X-3G
P
1
2
R67
1
0
0
R
2
F
-
L
1
-
G
P
-
U
R67
1
0
0
R
2
F
-
L
1
-
G
P
-
U
1
2
C121
SC
10U6D
3V5M
X-3G
P
C121
SC
10U6D
3V5M
X-3G
P
1
2
C138
SC
10U6D
3V5M
X-3G
P
C138
SC
10U6D
3V5M
X-3G
P
1
2
C139Do N
ot Stuff
DY
C139Do N
ot Stuff
DY
1
2
R760R2J-2-GP
QC = DY
R760R2J-2-GP
QC = DY
12
C183
SC
10U6D
3V5M
X-3G
P
C183
SC
10U6D
3V5M
X-3G
P
1
2
C131
SC
10U6D
3V5M
X-3G
P
C131
SC
10U6D
3V5M
X-3G
P
1
2
C143Do N
ot Stuff
DY
C143Do N
ot Stuff
DY
1
2
C129
SC
10U6D
3V5M
X-3G
P
C129
SC
10U6D
3V5M
X-3G
P
1
2
R75
0R2J-2-G
P
R75
0R2J-2-G
P
1
2
C185
SC
10U6D
3V5M
X-3G
P
C185
SC
10U6D
3V5M
X-3G
P
1
2
TP48AFTE14P-GP TP48AFTE14P-GP 1
R102Do Not StuffDY
QC = 63.10434.1DL
R102Do Not StuffDY
QC = 63.10434.1DL
1
2
C130SC
D1U
10V2K
X-4G
P
C130SC
D1U
10V2K
X-4G
P
1
2
C182
SC
10U6D
3V5M
X-3G
P
C182
SC
10U6D
3V5M
X-3G
P
1
2
R72
0R2J-2-G
P
R72
0R2J-2-G
P
1
2
C171SC
D1U
10V2K
X-4G
P
C171SC
D1U
10V2K
X-4G
P
1
2
C123
SC
10U6D
3V5M
X-3G
P
C123
SC
10U6D
3V5M
X-3G
P
1
2
C502
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C502
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
R910R2J-2-GP
QC = DY
R910R2J-2-GP
QC = DY
1
2
TP51 AFTE14P-GPTP51 AFTE14P-GP1
C122
SC
10U6D
3V5M
X-3G
P
C122
SC
10U6D
3V5M
X-3G
P
1
2
R95
Do Not Stuff
DY
QC = 63.10334.1DL
R95
Do Not Stuff
DY
QC = 63.10334.1DL
1 2
Q8Do Not Stuff
DY
QC = 84.00138.F31
Q8Do Not Stuff
DY
QC = 84.00138.F31
G
D
S
C154SC
D1U
10V2K
X-4G
P
C154SC
D1U
10V2K
X-4G
P
1
2
R68
1
0
0
R
2
F
-
L
1
-
G
P
-
U
R68
1
0
0
R
2
F
-
L
1
-
G
P
-
U
1
2
TP103 AFTE14P-GPTP103 AFTE14P-GP1
R92Do Not StuffDY
QC = 63.R0034.1DL
R92Do Not StuffDY
QC = 63.R0034.1DL12
C140SC
D1U
10V2K
X-4G
P
C140SC
D1U
10V2K
X-4G
P
1
2
3 OF 4CPU1C
BGA479-SKT6-GPU6
3 OF 4CPU1C
BGA479-SKT6-GPU6
VCCA7VCCA9
VCCAC10
VCCA10VCCA12VCCA13VCCA15VCCA17VCCA18VCCA20VCCB7VCCB9VCCB10VCCB12VCCB14VCCB15VCCB17VCCB18VCCB20VCCC9VCCC10VCCC12VCCC13VCCC15VCCC17VCCC18VCCD9VCCD10VCCD12VCCD14VCCD15VCCD17VCCD18VCCE7VCCE9VCCE10VCCE12VCCE13VCCE15
VCCAA7VCCAA9VCCAA10VCCAA12VCCAA13VCCAA15VCCAA17VCCAA18VCCAA20VCCAB9
VCCAB12VCCAB14VCCAB15VCCAB17VCCAB18
VCCE17VCCE18VCCE20VCCF7VCCF9VCCF10VCCF12VCCF14VCCF15VCCF17VCCF18VCCF20
VCC AB20VCC AB7VCC AC7VCC AC9VCC AC12VCC AC13VCC AC15VCC AC17VCC AC18VCC AD7VCC AD9VCC AD10VCC AD12VCC AD14VCC AD15VCC AD17VCC AD18VCC AE9VCC AE10VCC AE12VCC AE13VCC AE15VCC AE17VCC AE18VCC AE20VCC AF9VCC AF10VCC AF12VCC AF14VCC AF15VCC AF17VCC AF18VCC AF20
VCCP G21
VCCP J6
VCCP J21
VCCP K6
VCCP K21
VCCP M6
VCCP M21
VCCP N6VCCP N21
VCCP R6VCCP R21
VCCP T6VCCP T21
VCCP V6
VCCP V21VCCP W21
VCCA B26VCCA C26
VID0 AD6
VID6 AE2
VID4 AE3
VID2 AE5
VID5 AF3
VID3 AF4
VID1 AF5
VSSSENSE AE7
VCCSENSE AF7
VCCAB10
TP107 AFTE14P-GPTP107 AFTE14P-GP1
R630R2J-2-GPQC = 64.12115.6DLR630R2J-2-GPQC = 64.12115.6DL
1 2
C510
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C510
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
R96Do Not StuffDY
QC = 63.10334.1DL
R96Do Not StuffDY
QC = 63.10334.1DL12
C133SC
D1U
10V2K
X-4G
P
C133SC
D1U
10V2K
X-4G
P
1
2
Q7
Do Not Stuff
QC = 84.T3904.C11
DY
Q7
Do Not Stuff
QC = 84.T3904.C11
DY
C
B
E
C184
SC
10U6D
3V5M
X-3G
P
C184
SC
10U6D
3V5M
X-3G
P
1
2
TP47 AFTE14P-GPTP47 AFTE14P-GP1
R99Do Not Stuff DY
QC = 64.10015.6DL
R99Do Not Stuff DY
QC = 64.10015.6DL
1
2
R640R2J-2-GP
QC = 64.12115.6DLR640R2J-2-GP
QC = 64.12115.6DL1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[63..0]H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39H_D#40H_D#41H_D#42H_D#43H_D#44H_D#45H_D#46H_D#47H_D#48H_D#49H_D#50H_D#51H_D#52H_D#53H_D#54H_D#55H_D#56H_D#57H_D#58H_D#59H_D#60H_D#61H_D#62H_D#63
H_A#35
H_A#29H_A#30H_A#31
H_A#26H_A#27H_A#28
H_A#23H_A#24H_A#25
H_A#20H_A#21H_A#22
H_A#17H_A#18H_A#19
H_A#14H_A#15H_A#16
H_A#11H_A#12H_A#13
H_A#8H_A#9H_A#10
H_A#5H_A#6H_A#7
H_A#3H_A#4
H_A#[35..3]
H_A#33H_A#34
H_A#32
H_RS#1H_RS#2
H_RS#0
H_REQ#1
H_REQ#3H_REQ#2
H_REQ#0
H_REQ#4
H_DSTBN#[3..0]
H_DSTBN#3H_DSTBN#2H_DSTBN#1H_DSTBN#0
H_DSTBP#[3..0]
H_DSTBP#2
H_DSTBP#0
H_DSTBP#3
H_DSTBP#1
H_DINV#0H_DINV#1H_DINV#2H_DINV#3
H_DINV#[3..0]
H_RCOMP
H_SWING
H_AVREF
H_SWINGH_RCOMP
1D05V_S0
1D05V_S0
H_D#[63..0]4
H_CPURST#4,54H_CPUSLP#4
H_A#[35..3] 4
H_BNR# 4
H_BREQ#0 4
H_ADS# 4H_ADSTB#0 4H_ADSTB#1 4
H_DBSY# 4
H_DRDY# 4H_HIT# 4H_HITM# 4
CLK_MCH_BCLK 3CLK_MCH_BCLK# 3
H_LOCK# 4
H_BPRI# 4
H_DEFER# 4
H_DPWR# 4
H_TRDY# 4
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 55Saturday, December 20, 2008JM70-MV SB
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 55Saturday, December 20, 2008JM70-MV SB
UMA
Place them near to the chip ( < 0.5")
H_RCOMP routing Trace width andSpacing use 10 / 20 mil
H_SWING routing Trace width andSpacing use 10 / 20 mil
H_SWING Resistors andCapacitors close MCH500 mil ( MAX )
H
O
S
T
1 OF 10NB1A
CANTIGA-GM-GP-U-NF71.CNTIG.00U
H
O
S
T
1 OF 10NB1A
CANTIGA-GM-GP-U-NF71.CNTIG.00U
H_A#_10 P16H_A#_11 R16H_A#_12 N17H_A#_13 M13H_A#_14 E17H_A#_15 P17H_A#_16 F17H_A#_17 G20H_A#_18 B19H_A#_19 J16H_A#_20 E20H_A#_21 H16H_A#_22 J20H_A#_23 L17H_A#_24 A17H_A#_25 B17H_A#_26 L16H_A#_27 C21H_A#_28 J17H_A#_29 H20
H_A#_3 A14
H_A#_30 B18H_A#_31 K17
H_A#_4 C15H_A#_5 F16H_A#_6 H13H_A#_7 C18H_A#_8 M16H_A#_9 J13
H_ADS# H12H_ADSTB#_0 B16H_ADSTB#_1 G17
H_BNR# A9H_BPRI# F11
H_BREQ# G12
HPLL_CLK# AH6
H_CPURST#C12
HPLL_CLK AH7
H_D#_0F2
H_REQ#_2 F13H_REQ#_3 B13
H_D#_1G8
H_D#_10M9
H_D#_20L6
H_D#_30N10
H_D#_40AA8
H_D#_50AA2
H_D#_60AE11
H_D#_8D4H_D#_9H3
H_DBSY# B10
H_D#_11M11H_D#_12J1H_D#_13J2H_D#_14N12H_D#_15J6H_D#_16P2H_D#_17L2H_D#_18R2H_D#_19N9
H_D#_2F8
H_D#_21M5H_D#_22J3H_D#_23N2H_D#_24R1H_D#_25N5H_D#_26N6H_D#_27P13H_D#_28N8H_D#_29L7
H_D#_3E6
H_D#_31M3H_D#_32Y3H_D#_33AD14H_D#_34Y6H_D#_35Y10H_D#_36Y12H_D#_37Y14H_D#_38Y7H_D#_39W2
H_D#_4G2
H_D#_41Y9H_D#_42AA13H_D#_43AA9H_D#_44AA11H_D#_45AD11H_D#_46AD10H_D#_47AD13H_D#_48AE12H_D#_49AE9
H_D#_5H6
H_D#_51AD8H_D#_52AA3H_D#_53AD3H_D#_54AD7H_D#_55AE14H_D#_56AF3H_D#_57AC1H_D#_58AE3H_D#_59AC3
H_D#_6H2
H_D#_61AE8H_D#_62AG2H_D#_63AD6
H_D#_7F6
H_DEFER# E9
H_DINV#_0 J8H_DINV#_1 L3H_DINV#_2 Y13H_DINV#_3 Y1
H_DPWR# J11H_DRDY# F9
H_DSTBN#_0 L10H_DSTBN#_1 M7H_DSTBN#_2 AA5H_DSTBN#_3 AE6
H_DSTBP#_0 L9H_DSTBP#_1 M8H_DSTBP#_2 AA6H_DSTBP#_3 AE5
H_AVREFA11H_DVREFB11
H_TRDY# C9
H_HIT# H9H_HITM# E12H_LOCK# H11
H_REQ#_0 B15H_REQ#_1 K13
H_REQ#_4 B14
H_A#_32 B20H_A#_33 F21H_A#_34 K21H_A#_35 L20
H_SWINGC5
H_CPUSLP#E11
H_RCOMPE3
H_RS#_0 B6H_RS#_1 F12H_RS#_2 C8
R1212KR2F-3-GPR1212KR2F-3-GP
1
2
R1231KR2F-3-GPR1231KR2F-3-GP
1
2
C189
SC
D1U
16V2ZY
-2GP
C189
SC
D1U
16V2ZY
-2GP
1
2
R132 24D9R2F-L-GP
QC = 64.16R95.6DLR132 24D9R2F-L-GP
QC = 64.16R95.6DL
1 2
C
1
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
R125100R2F-L1-GP-U
QC = 64.75R05.6DL
R125100R2F-L1-GP-U
QC = 64.75R05.6DL1
2
R126221R2F-2-GPR126221R2F-2-GP
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG9
CFG20
PM_EXTTS#1PM_EXTTS#0
RSTIN#NB_THERMTRIP#
M_RCOMPPM_RCOMPN
SM_RCOMP_VOHSM_RCOMP_VOL
MCH_CLVREF
M_RCOMPP
M_RCOMPN
CFG9
CFG20
PEG_RXN5
PEG_RXN12PEG_RXN11PEG_RXN10PEG_RXN9PEG_RXN8
PEG_RXN15PEG_RXN14PEG_RXN13
PEG_RXN2
PEG_RXN7
PEG_RXN4
PEG_RXN1
PEG_RXN6
PEG_RXN3
PEG_RXN0
PEG_CMP
PEG_RXP5
PEG_RXP13
PEG_RXP2
PEG_RXP10
PEG_RXP7
PEG_RXP15
PEG_RXP4
PEG_RXP12
PEG_RXP1
PEG_RXP9
PEG_RXP6
PEG_RXP14
PEG_RXP3
PEG_RXP11
PEG_RXP0
PEG_RXP8
PEG_TXP10
PEG_TXP7
PEG_TXP15
PEG_TXP12
PEG_TXP1
PEG_TXP9
PEG_TXP6
PEG_TXP14
PEG_TXP3
PEG_TXP11
PEG_TXP0
PEG_TXP8
PEG_TXP5
PEG_TXP13
PEG_TXP2
PEG_TXN14
PEG_TXN3
PEG_TXN11
PEG_TXN8
PEG_TXN5
PEG_TXN13
PEG_TXN2
PEG_TXN10
PEG_TXN7
PEG_TXN15
PEG_TXN4
PEG_TXN12
PEG_TXN1
PEG_TXN9
PEG_TXN6
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_REXT
MCH_TSATN#
PEG_TXN0
PEG_TXP4
PM_DPRSLPVR_MCH
PM_DPRSLPVR_MCH
TV_DACA
TV_DACC
GMCH_BLUE
GMCH_GREEN
GMCH_RED
LIBGGMCH_LCDVDD_ON
CLK_DDC_EDIDLCTLB_DATA
LCTLA_CLK
DAT_DDC_EDID
GMCH_DDCDATAGMCH_DDCCLK
CRT_IREF
TV_DACB
CRT_IREF
TV_DACATV_DACBTV_DACC
GMCH_BL_ONGMCH_LCDVDD_ON
LIBG
PEG_TXN3
PEG_TXN1PEG_TXN2
PEG_TXN0
PEG_TXP1
PEG_TXP3
PEG_TXP0
PEG_TXP2
PEG_RXP3
GMCH_HSYNCGMCH_VSYNC
DREFSSCLK#
DREFCLKDREFCLK#
DREFSSCLK
GFX_VID1GFX_VID2GFX_VID3
GFX_VID0
GFX_VID4
GFXVR_EN
HDA_RST#HDA_SDO
HDA_BCLKHDA_RST#HDA_SDIHDA_SDOHDA_SYNC
HDA_BCLKHDA_SYNC
MCH_TSATN#
PM_EXTTS#0PM_EXTTS#1
GFXVR_EN
LCTLB_DATALCTLA_CLK
GMCH_GREENGMCH_RED
GMCH_BLUE
CFG16
CFG16
1D05V_S0
3D3V_S0
1D05V_S0
1D5V_S3
1D5V_S3
DDR_VREF_S3_1
1D05V_S0
3D3V_S0
CPU_SEL13,4CPU_SEL23,4
CPU_SEL03,4
H_DPRSTP#4,12,51PM_SYNC#13
PLT_RST1#13,18,28,36,37,39,40
PM_DPRSLPVR13,51
PM_THRMTRIP-A#4,12,44
M_CLK_DDR#2 17M_CLK_DDR#3 17
M_CLK_DDR0 16M_CLK_DDR1 16
M_CKE0 16M_CKE1 16M_CKE2 17M_CKE3 17
M_CLK_DDR2 17M_CLK_DDR3 17
M_CS1# 16M_CS2# 17M_CS3# 17
M_CS0# 16
M_CLK_DDR#0 16M_CLK_DDR#1 16
M_ODT0 16M_ODT1 16M_ODT2 17M_ODT3 17
CLK_MCH_3GPLL 3CLK_MCH_3GPLL# 3
DMI_RXN0 13
DMI_TXN0 13DMI_TXN1 13
DMI_TXP1 13
DMI_TXN2 13DMI_TXN3 13
DMI_TXP0 13
DMI_TXP2 13DMI_TXP3 13
DMI_RXN1 13DMI_RXN2 13DMI_RXN3 13
DMI_RXP0 13
DMI_RXP2 13DMI_RXP3 13
DMI_RXP1 13
CL_RST#0 13
CL_CLK0 13CL_DATA0 13
PWROK 13,38
PEG_RXN[15..0] 18
PEG_TXP[15..0] 18
PEG_RXP[15..0] 18
PWROK13,38
PEG_TXN[15..0] 18
SM_PWROK 44
DDR3_DRAMRST# 16,17
PM_EXTTS#016,17
GMCH_TXBOUT0+19GMCH_TXBOUT1+19GMCH_TXBOUT2+19
GMCH_TXBOUT0-19GMCH_TXBOUT1-19GMCH_TXBOUT2-19
GMCH_TXBCLK-19GMCH_TXBCLK+19
L_BKLTCTL19
GMCH_LCDVDD_ON19
CLK_DDC_EDID19DAT_DDC_EDID19
GMCH_BL_ON39
GMCH_TXAOUT0+19GMCH_TXAOUT1+19GMCH_TXAOUT2+19
GMCH_TXAOUT0-19GMCH_TXAOUT1-19GMCH_TXAOUT2-19
GMCH_TXACLK-19GMCH_TXACLK+19
GMCH_DDCCLK20GMCH_DDCDATA20
GMCH_HSYNC20
GMCH_VSYNC20
GMCH_GREEN20
GMCH_BLUE20
GMCH_RED20
HDMI_DETECT# 21
HDMI_CLK+ 21
HDMI_DATA2+ 21HDMI_DATA1+ 21HDMI_DATA0+ 21
HDMI_CLK- 21
HDMI_DATA2- 21HDMI_DATA1- 21HDMI_DATA0- 21
DREFCLK# 3DREFCLK 3
DREFSSCLK# 3DREFSSCLK 3
GFX_VID[4..0] 48
GMCH_HDMI_CLK 21GMCH_HDMI_DATA 21
MCH_ICH_SYNC# 13
ACZ_SDIN3 12
ACZ_RST#_R 12ACZ_SDATAOUT_R 12ACZ_BIT_CLK 12ACZ_SYNC_R 12
GFXVR_EN 48
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 55Saturday, December 20, 2008JM70-MV SB
FOR Cantiga:500 ohm Teenah: 392 ohm
Close to GMCH as 500 mils.
layout take note
0.75VDDR2 : connect to GND
FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohmCRT_IREF routing Tracewidth use 20 mil
FOR Discrete change RN to 0 ohm(66.R0036.A8L)
FOR Discrete,change to 0 ohm(66.R0036.A8L)
for HDMI port C
2008.11.27 SB
2008.12.08 SB
C109 SCD1U10V2KX-5GPUMA C109 SCD1U10V2KX-5GPUMA 1 2
R770R2J-2-GP UMA
R770R2J-2-GP UMA
1 2
R1272K37R2F-GP
UMAR1272K37R2F-GP
UMA1 2
RN24
SRN10KJ-5-GP
UMARN24
SRN10KJ-5-GP
UMA123
4
PM
M
I
S
C
NC
D
D
R
C
L
K
/
C
O
N
T
R
O
L
/
C
O
M
P
E
N
S
A
T
I
O
N
C
L
K
D
M
I
CFGRSVD
G
R
A
P
H
I
C
S
V
I
D
M
E
H
D
A
2 OF 10NB1B
CANTIGA-GM-GP-U-NF71.CNTIG.00U
PM
M
I
S
C
NC
D
D
R
C
L
K
/
C
O
N
T
R
O
L
/
C
O
M
P
E
N
S
A
T
I
O
N
C
L
K
D
M
I
CFGRSVD
G
R
A
P
H
I
C
S
V
I
D
M
E
H
D
A
2 OF 10NB1B
CANTIGA-GM-GP-U-NF71.CNTIG.00U
SA_CK_0 AP24SA_CK_1 AT21SB_CK_0 AV24
SA_CK#_0 AR24SA_CK#_1 AR21SB_CK#_0 AU24
SA_CKE_0 BC28SA_CKE_1 AY28SB_CKE_0 AY36SB_CKE_1 BB36
SA_CS#_0 BA17SA_CS#_1 AY16SB_CS#_0 AV16SB_CS#_1 AR13
SM_DRAMRST# BC36
SA_ODT_0 BD17SA_ODT_1 AY17SB_ODT_0 BF15SB_ODT_1 AY13
SM_RCOMP BG22SM_RCOMP# BH21
CFG_18P29CFG_19R28
CFG_2P25
CFG_0T25CFG_1R25
CFG_20T28
CFG_3P20CFG_4P24CFG_5C25CFG_6N24CFG_7M24CFG_8E21CFG_9C23CFG_10C24CFG_11N21CFG_12P21CFG_13T21CFG_14R20CFG_15M20CFG_16L21CFG_17H21
PM_SYNC#R29
PM_EXT_TS#_0N33PM_EXT_TS#_1P32PWROKAT40RSTIN#AT11
DPLL_REF_CLK B38DPLL_REF_CLK# A38
DPLL_REF_SSCLK E41DPLL_REF_SSCLK# F41
DMI_RXN_0 AE41DMI_RXN_1 AE37DMI_RXN_2 AE47DMI_RXN_3 AH39
DMI_RXP_0 AE40DMI_RXP_1 AE38DMI_RXP_2 AE48DMI_RXP_3 AH40
DMI_TXN_0 AE35DMI_TXN_1 AE43DMI_TXN_2 AE46DMI_TXN_3 AH42
DMI_TXP_0 AD35DMI_TXP_1 AE44DMI_TXP_2 AF46DMI_TXP_3 AH43
RESERVED#AL34AL34
RESERVED#AN35AN35RESERVED#AK34AK34
RESERVED#AM35AM35
RESERVED#BG23BG23RESERVED#BF23BF23RESERVED#BH18BH18RESERVED#BF18BF18
PM_DPRSTP#B7
SB_CK_1 AU20
SB_CK#_1 AV20
RESERVED#AY21AY21
RESERVED#AH9AH9RESERVED#AH10AH10RESERVED#AH12AH12RESERVED#AH13AH13
RESERVED#M36M36RESERVED#N36N36RESERVED#R33R33RESERVED#T33T33
GFX_VID_0 B33GFX_VID_1 B32GFX_VID_2 G33GFX_VID_3 F33
GFX_VR_EN C34
SM_RCOMP_VOH BF28SM_RCOMP_VOL BH28
THERMTRIP#T20DPRSLPVRR32
RESERVED#K12K12
CL_CLK AH37CL_DATA AH36
CL_PWROK AN36CL_RST# AJ35CL_VREF AH34
NC#A47A47
NC#BG48BG48NC#BF48BF48NC#BD48BD48NC#BC48BC48NC#BH47BH47NC#BG47BG47NC#BE47BE47NC#BH46BH46NC#BF46BF46NC#BG45BG45NC#BH44BH44NC#BH43BH43NC#BH6BH6NC#BH5BH5NC#BG4BG4
SDVO_CTRLCLK G36SDVO_CTRLDATA E36
CLKREQ# K36
RESERVED#T24T24
ICH_SYNC# H36
TSATN# B12
PEG_CLK# E43PEG_CLK F43
NC#BH3BH3
GFX_VID_4 E33
RESERVED#B31B31
DDPC_CTRLCLK N28
NC#BF3BF3NC#BH2BH2NC#BG2BG2NC#BE2BE2NC#BG1BG1NC#BF1BF1NC#BD1BD1NC#BC1BC1NC#F1F1
SM_VREF AV42SM_PWROK AR36
SM_REXT BF17
RESERVED#M1M1
HDA_BCLK B28HDA_RST# B30
HDA_SDI B29HDA_SDO C29
HDA_SYNC A28
DDPC_CTRLDATA M28
RESERVED#B2B2
R260 Do Not StuffDYR260 Do Not StuffDY1 2
C111 SCD1U10V2KX-5GPUMA C111 SCD1U10V2KX-5GPUMA 1 2
R170 499R2F-2-GPR170 499R2F-2-GP1 2
R160100R2J-2-GP R160100R2J-2-GP12
C108 SCD1U10V2KX-5GPUMA C108 SCD1U10V2KX-5GPUMA 1 2
C243
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C243
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C113 SCD1U10V2KX-5GPUMA C113 SCD1U10V2KX-5GPUMA 1 2
C114 SCD1U10V2KX-5GPUMA C114 SCD1U10V2KX-5GPUMA 1 2
C110 SCD1U10V2KX-5GPUMA C110 SCD1U10V2KX-5GPUMA 1 2
LVDS
P
C
I
-
E
X
P
R
E
S
S
G
R
A
P
H
I
C
S
TVVGA
3 OF 10NB1C
CANTIGA-GM-GP-U-NF71.CNTIG.00U
LVDS
P
C
I
-
E
X
P
R
E
S
S
G
R
A
P
H
I
C
S
TVVGA
3 OF 10NB1C
CANTIGA-GM-GP-U-NF71.CNTIG.00U
PEG_COMPI T37PEG_COMPO T36
PEG_RX#_0 H44PEG_RX#_1 J46PEG_RX#_2 L44PEG_RX#_3 L40PEG_RX#_4 N41PEG_RX#_5 P48PEG_RX#_6 N44PEG_RX#_7 T43PEG_RX#_8 U43PEG_RX#_9 Y43
PEG_RX#_10 Y48PEG_RX#_11 Y36PEG_RX#_12 AA43PEG_RX#_13 AD37PEG_RX#_14 AC47PEG_RX#_15 AD39
PEG_RX_0 H43PEG_RX_1 J44PEG_RX_2 L43PEG_RX_3 L41PEG_RX_4 N40PEG_RX_5 P47PEG_RX_6 N43PEG_RX_7 T42PEG_RX_8 U42PEG_RX_9 Y42
PEG_RX_10 W47PEG_RX_11 Y37PEG_RX_12 AA42PEG_RX_13 AD36PEG_RX_14 AC48PEG_RX_15 AD40
PEG_TX#_0 J41
PEG_TX#_10 Y40
PEG_TX#_3 M40PEG_TX#_4 M42PEG_TX#_5 R48PEG_TX#_6 N38PEG_TX#_7 T40PEG_TX#_8 U37PEG_TX#_9 U40
PEG_TX#_1 M46
PEG_TX#_11 AA46PEG_TX#_12 AA37PEG_TX#_13 AA40PEG_TX#_14 AD43PEG_TX#_15 AC46
PEG_TX#_2 M47
PEG_TX_0 J42PEG_TX_1 L46PEG_TX_2 M48PEG_TX_3 M39PEG_TX_4 M43PEG_TX_5 R47PEG_TX_6 N37PEG_TX_7 T39PEG_TX_8 U36PEG_TX_9 U39
PEG_TX_10 Y39PEG_TX_11 Y46PEG_TX_12 AA36PEG_TX_13 AA39PEG_TX_14 AD42PEG_TX_15 AD46
L_CTRL_CLKM32
L_CTRL_DATAM33L_DDC_CLKK33L_DDC_DATAJ33
L_VDD_ENM29LVDS_IBGC44LVDS_VBGB43LVDS_VREFHE37LVDS_VREFLE38LVDSA_CLK#C41LVDSA_CLKC40
LVDSA_DATA#_0H47LVDSA_DATA#_1E46LVDSA_DATA#_2G40
LVDSA_DATA_1D45LVDSA_DATA_2F40
LVDSB_CLK#B37LVDSB_CLKA37
LVDSB_DATA#_0A41LVDSB_DATA#_1H38LVDSB_DATA#_2G37
LVDSB_DATA_1G38LVDSB_DATA_2F37
L_BKLT_ENG32
TVA_DACF25TVB_DACH25TVC_DACK25
TV_RTNH24
CRT_BLUEE28
CRT_DDC_CLKH32CRT_DDC_DATAJ32
CRT_GREENG28
CRT_HSYNCJ29CRT_TVO_IREFE29
CRT_REDJ28
CRT_IRTNG29
CRT_VSYNCL29
LVDSA_DATA_0H48
LVDSB_DATA_0B42
L_BKLT_CTRLL32
TV_DCONSEL_0C31TV_DCONSEL_1E32
LVDSA_DATA#_3A40
LVDSA_DATA_3B40
LVDSB_DATA#_3J37
LVDSB_DATA_3K37
RN21
Do Not Stuff
DYRN21
Do Not Stuff
DY
12 3
4
R1521KR2F-3-GPR1521KR2F-3-GP
1
2
C290
SC2D2U6D3V3MX-1-GP
C290
SC2D2U6D3V3MX-1-GP
1
2
R129 Do Not StuffDYR129 Do Not StuffDY1 2
R130 Do Not StuffDYR130 Do Not StuffDY1 2
C277
SCD01U16V2KX-3GP
C277
SCD01U16V2KX-3GP
1
2
C257Do Not Stuff
DY
C257Do Not Stuff
DY
1
2
C274SC
D1U
10V2K
X-4G
P
C274SC
D1U
10V2K
X-4G
P
1
2
R18280D6R2F-L-GP
R18280D6R2F-L-GP
1
2
R1390R2J-2-GP
R1390R2J-2-GP
1 2
R128 1K02R2F-1-GPUMA
R128 1K02R2F-1-GPUMA1 2
RN27
SRN75J-1-GP UMA
RN27
SRN75J-1-GP UMA12345
678
R12256R2J-4-GPR12256R2J-4-GP
1
2
RN23
SRN10KJ-5-GP
RN23
SRN10KJ-5-GP
123
4
R18180D6R2F-L-GPR18180D6R2F-L-GP
1
2
R124Do Not StuffDYR124Do Not StuffDY
1
2
C112 SCD1U10V2KX-5GPUMA C112 SCD1U10V2KX-5GPUMA 1 2
R156499R2F-2-GPR156499R2F-2-GP
1
2
RN25
Do Not Stuff
DYRN25
Do Not Stuff
DY
12 3
4
RN22
SRN150J-1-GPUMA
RN22
SRN150J-1-GPUMA
1234 5
678
RN20
Do Not StuffDIS
RN20
Do Not StuffDIS
1234 5
678
R167 1KR2F-3-GPR167 1KR2F-3-GP12
RN26
SRN100KJ-6-GP
UMARN26
SRN100KJ-6-GP
UMA
12 3
4
C282
SC2D2U6D3V3MX-1-GP
C282
SC2D2U6D3V3MX-1-GP
1
2
R1781KR2F-3-GPR1781KR2F-3-GP
1
2
R1743K01R2F-3-GPR1743K01R2F-3-GP
1
2
R142 49D9R2F-GPR142 49D9R2F-GP12
R120 33R2J-2-GPUMA
R120 33R2J-2-GPUMA
1 2
C289
SCD01U16V2KX-3GP
C289
SCD01U16V2KX-3GP
1
2
C107 SCD1U10V2KX-5GPUMA C107 SCD1U10V2KX-5GPUMA 1 2
RN19
SRN33J-7-GPUMA
RN19
SRN33J-7-GPUMA
1234 5
678
R141
0R2J-2-GP
R141
0R2J-2-GP
1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40M_A_DQ39
M_A_DQ37
M_A_DQ35M_A_DQ34
M_A_DQ59
M_A_DQ54M_A_DQ53
M_A_DQ63
M_A_DQ60M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3
M_A_DQ7
M_A_DQ5M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9M_A_DQ8
M_A_DQ11
M_A_DQ15M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22M_A_DQ23M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DQS#3
M_A_DQS#0
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_DM[7..0]M_A_DM0M_A_DM1M_A_DM2M_A_DM3M_A_DM4M_A_DM5M_A_DM6M_A_DM7
M_A_DQS[7..0]
M_A_DQS5
M_A_DQS7
M_A_DQS2M_A_DQS3M_A_DQS4
M_A_DQS0M_A_DQS1
M_A_DQS6
M_A_A14
M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11
M_B_DQ15
M_B_DQ13M_B_DQ12
M_B_DQ14
M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19
M_B_DQ23
M_B_DQ21M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32M_B_DQ33M_B_DQ34M_B_DQ35
M_B_DQ39
M_B_DQ37M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48M_B_DQ49M_B_DQ50M_B_DQ51
M_B_DQ55
M_B_DQ53M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_B_DQS#[7..0]M_B_DQS#0M_B_DQS#1M_B_DQS#2M_B_DQS#3M_B_DQS#4M_B_DQS#5M_B_DQS#6M_B_DQS#7
M_B_DQS[7..0]M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A[14..0]M_B_A0M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5M_B_A6M_B_A7
M_B_DM[7..0]M_B_DM0M_B_DM1M_B_DM2M_B_DM3M_B_DM4M_B_DM5M_B_DM6M_B_DM7
M_B_A14
M_A_DQ[63..0]16M_A_BS#0 16M_A_BS#1 16M_A_BS#2 16
M_A_CAS# 16
M_A_DQS#[7..0] 16
M_A_DQS[7..0] 16
M_A_A[14..0] 16
M_A_DM[7..0] 16
M_A_RAS# 16
M_A_WE# 16
M_B_DQ[63..0]17M_B_BS#0 17M_B_BS#1 17M_B_BS#2 17
M_B_CAS# 17M_B_RAS# 17
M_B_WE# 17
M_B_DQS#[7..0] 17
M_B_DQS[7..0] 17
M_B_A[14..0] 17
M_B_DM[7..0] 17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 55Saturday, December 20, 2008JM70-MV SB
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
B
5 OF 10NB1E
CANTIGA-GM-GP-U-NF71.CNTIG.00U
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
B
5 OF 10NB1E
CANTIGA-GM-GP-U-NF71.CNTIG.00U
SB_DQ_0AK47SB_DQ_1AH46
SB_DQ_10BA48SB_DQ_11AY48SB_DQ_12AT47SB_DQ_13AR47SB_DQ_14BA47SB_DQ_15BC47SB_DQ_16BC46SB_DQ_17BC44SB_DQ_18BG43SB_DQ_19BF43
SB_DQ_2AP47
SB_DQ_20BE45SB_DQ_21BC41SB_DQ_22BF40SB_DQ_23BF41SB_DQ_24BG38SB_DQ_25BF38SB_DQ_26BH35SB_DQ_27BG35SB_DQ_28BH40SB_DQ_29BG39
SB_DQ_3AP46
SB_DQ_30BG34SB_DQ_31BH34SB_DQ_32BH14SB_DQ_33BG12SB_DQ_34BH11SB_DQ_35BG8SB_DQ_36BH12SB_DQ_37BF11SB_DQ_38BF8SB_DQ_39BG7
SB_DQ_4AJ46
SB_DQ_40BC5SB_DQ_41BC6SB_DQ_42AY3SB_DQ_43AY1SB_DQ_44BF6SB_DQ_45BF5SB_DQ_46BA1SB_DQ_47BD3SB_DQ_48AV2SB_DQ_49AU3
SB_DQ_5AJ48
SB_DQ_50AR3SB_DQ_51AN2SB_DQ_52AY2SB_DQ_53AV1SB_DQ_54AP3SB_DQ_55AR1SB_DQ_56AL1SB_DQ_57AL2SB_DQ_58AJ1SB_DQ_59AH1
SB_DQ_6AM48
SB_DQ_60AM2SB_DQ_61AM3SB_DQ_62AH3SB_DQ_63AJ3
SB_DQ_7AP48SB_DQ_8AU47SB_DQ_9AU46
SB_BS_0 BC16SB_BS_1 BB17SB_BS_2 BB33
SB_CAS# BG16
SB_DM_0 AM47SB_DM_1 AY47SB_DM_2 BD40SB_DM_3 BF35SB_DM_4 BG11SB_DM_5 BA3SB_DM_6 AP1SB_DM_7 AK2
SB_DQS_0 AL47SB_DQS_1 AV48SB_DQS_2 BG41SB_DQS_3 BG37SB_DQS_4 BH9SB_DQS_5 BB2SB_DQS_6 AU1SB_DQS_7 AN6
SB_DQS#_0 AL46SB_DQS#_1 AV47SB_DQS#_2 BH41SB_DQS#_3 BH37SB_DQS#_4 BG9SB_DQS#_5 BC2SB_DQS#_6 AT2SB_DQS#_7 AN5
SB_MA_0 AV17SB_MA_1 BA25
SB_MA_10 BB16SB_MA_11 AW33SB_MA_12 AY33SB_MA_13 BH15
SB_MA_2 BC25SB_MA_3 AU25SB_MA_4 AW25SB_MA_5 BB28SB_MA_6 AU28SB_MA_7 AW28SB_MA_8 AT33SB_MA_9 BD33
SB_MA_14 AU33
SB_RAS# AU17
SB_WE# BF14
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
4 OF 10NB1D
CANTIGA-GM-GP-U-NF71.CNTIG.00U
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
4 OF 10NB1D
CANTIGA-GM-GP-U-NF71.CNTIG.00U
SA_DQ_0AJ38SA_DQ_1AJ41
SA_DQ_10AU40SA_DQ_11AT38SA_DQ_12AN41SA_DQ_13AN39SA_DQ_14AU44SA_DQ_15AU42SA_DQ_16AV39SA_DQ_17AY44SA_DQ_18BA40SA_DQ_19BD43
SA_DQ_2AN38
SA_DQ_20AV41SA_DQ_21AY43SA_DQ_22BB41SA_DQ_23BC40SA_DQ_24AY37SA_DQ_25BD38SA_DQ_26AV37SA_DQ_27AT36SA_DQ_28AY38SA_DQ_29BB38
SA_DQ_3AM38
SA_DQ_30AV36SA_DQ_31AW36SA_DQ_32BD13SA_DQ_33AU11SA_DQ_34BC11SA_DQ_35BA12SA_DQ_36AU13SA_DQ_37AV13SA_DQ_38BD12SA_DQ_39BC12
SA_DQ_4AJ36
SA_DQ_40BB9SA_DQ_41BA9SA_DQ_42AU10SA_DQ_43AV9SA_DQ_44BA11SA_DQ_45BD9SA_DQ_46AY8SA_DQ_47BA6SA_DQ_48AV5SA_DQ_49AV7
SA_DQ_5AJ40
SA_DQ_50AT9SA_DQ_51AN8SA_DQ_52AU5SA_DQ_53AU6SA_DQ_54AT5SA_DQ_55AN10SA_DQ_56AM11SA_DQ_57AM5SA_DQ_58AJ9SA_DQ_59AJ8
SA_DQ_6AM44
SA_DQ_60AN12SA_DQ_61AM13SA_DQ_62AJ11SA_DQ_63AJ12
SA_DQ_7AM42SA_DQ_8AN43SA_DQ_9AN44
SA_BS_0 BD21SA_BS_1 BG18SA_BS_2 AT25
SA_CAS# BD20
SA_DM_0 AM37SA_DM_1 AT41SA_DM_2 AY41SA_DM_3 AU39SA_DM_4 BB12SA_DM_5 AY6SA_DM_6 AT7
SA_DQS_0 AJ44SA_DQS_1 AT44SA_DQS_2 BA43SA_DQS_3 BC37SA_DQS_4 AW12SA_DQS_5 BC8SA_DQS_6 AU8SA_DQS_7 AM7
SA_DM_7 AJ5
SA_DQS#_0 AJ43SA_DQS#_1 AT43SA_DQS#_2 BA44SA_DQS#_3 BD37SA_DQS#_4 AY12SA_DQS#_5 BD8SA_DQS#_6 AU9SA_DQS#_7 AM8
SA_MA_0 BA21SA_MA_1 BC24
SA_MA_10 BC21SA_MA_11 BG26SA_MA_12 BH26SA_MA_13 BH17
SA_MA_2 BG24SA_MA_3 BH24SA_MA_4 BG25SA_MA_5 BA24SA_MA_6 BD24SA_MA_7 BG27SA_MA_8 BF25SA_MA_9 AW24
SA_RAS# BB20
SA_WE# AY20
SA_MA_14 AY25
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM_LF6_GMCHSM_LF7_GMCH
SM_LF1_GMCHSM_LF2_GMCHSM_LF3_GMCHSM_LF4_GMCHSM_LF5_GMCH
VCC_GMCH_35
1D5V_S3
1D05V_S0
1D05V_S0
1D5V_S3
VCC_GFXCORE
VCC_GFXCORE
VCC_GFXCORE
VCC_GFXCOREVCC_GFXCORE 1D05V_S01D05V_S0
VCC_AXG_SENSE48VSS_AXG_SENSE48
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 55Saturday, December 20, 2008JM70-MV SB
FOR VCC SM
Place on the Edge
FOR VCC CORE
Coupling CAP 370 mils from the Edge
Coupling CAP
place near Cantiga
Place on the Edge Coupling CAP
U60(ISL6263ACRZ-T-GP) place near Cantiga
2008.12.14 SB
C281
SC
D1U
10V2K
X-4G
P
C281
SC
D1U
10V2K
X-4G
P
1
2
C214
SC
D1U
10V2K
X-4G
P
C214
SC
D1U
10V2K
X-4G
P
1
2
C276
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C276
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
2
R5120R2J-2-GP
UMAR512
0R2J-2-GP
UMA
12R518
0R2J-2-GP
UMAR518
0R2J-2-GP
UMA
12
C240
Do N
ot StuffDY
C240
Do N
ot StuffDY
1
2
C234
SC
10U6D
3V5M
X-3G
P
C234
SC
10U6D
3V5M
X-3G
P
1
2
C
2
7
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
7
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
R5070R2J-2-GP
UMAR507
0R2J-2-GP
UMA
12
G9
GAP-CLOSE-PWR
G9
GAP-CLOSE-PWR
1 2
R5130R2J-2-GP
UMAR513
0R2J-2-GP
UMA
12
C252
UMA
SC
1U10V
3ZY-6G
P
C252
UMA
SC
1U10V
3ZY-6G
P
1
2
C262
SC
10U6D
3V5M
X-3G
P
C262
SC
10U6D
3V5M
X-3G
P
1
2
C
2
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C215Do N
ot Stuff
DY
C215Do N
ot Stuff
DY
1
2
R5080R2J-2-GP
UMAR508
0R2J-2-GP
UMA
12R514
0R2J-2-GP
UMAR514
0R2J-2-GP
UMA
12
C220
SC
10U6D
3V5M
X-3G
P
UMA
C220
SC
10U6D
3V5M
X-3G
P
UMA
1
2
C271
Do N
ot Stuff
DY
C271
Do N
ot Stuff
DY
1
2
C
2
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
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P
1
2
C237
SC
D22U
10V2K
X-1G
P
C237
SC
D22U
10V2K
X-1G
P
1
2
R5090R2J-2-GP
UMAR509
0R2J-2-GP
UMA
12R515
0R2J-2-GP
UMAR515
0R2J-2-GP
UMA
12
P
O
W
E
R
V
C
C
S
M
V
C
C
G
F
X
V
C
C
G
F
X
N
C
T
F
V
C
C
S
M
L
F
7 OF 10NB1G
CANTIGA-GM-GP-U-NF71.CNTIG.00U
P
O
W
E
R
V
C
C
S
M
V
C
C
G
F
X
V
C
C
G
F
X
N
C
T
F
V
C
C
S
M
L
F
7 OF 10NB1G
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VCC_SMAY32
VCC_SMBF31
VCC_SMAW29
VCC_SMBD32VCC_SMBC32VCC_SMBB32VCC_SMBA32
VCC_SMAW32VCC_SMAV32VCC_SMAU32VCC_SMAT32VCC_SMAR32VCC_SMAP32VCC_SMAN32VCC_SMBH31VCC_SMBG31
VCC_SMAN33
VCC_SMBG30VCC_SMBH29VCC_SMBG29VCC_SMBF29VCC_SMBD29VCC_SMBC29VCC_SMBB29VCC_SMBA29VCC_SMAY29
VCC_SMBH32
VCC_SMAV29VCC_SMAU29VCC_SMAT29VCC_SMAR29
VCC_AXG_NCTF V23VCC_AXG_NCTF AM21VCC_AXG_NCTF AL21VCC_AXG_NCTF AK21VCC_AXG_NCTF W21VCC_AXG_NCTF V21VCC_AXG_NCTF U21VCC_AXG_NCTF AM20VCC_AXG_NCTF AK20VCC_AXG_NCTF W20
VCC_AXG_NCTF V28
VCC_AXG_NCTF U20VCC_AXG_NCTF AM19VCC_AXG_NCTF AL19VCC_AXG_NCTF AK19VCC_AXG_NCTF AJ19VCC_AXG_NCTF AH19VCC_AXG_NCTF AG19VCC_AXG_NCTF AF19VCC_AXG_NCTF AE19VCC_AXG_NCTF AB19
VCC_AXG_NCTF W26
VCC_AXG_NCTF AA19VCC_AXG_NCTF Y19VCC_AXG_NCTF W19VCC_AXG_NCTF V19VCC_AXG_NCTF U19VCC_AXG_NCTF AM17VCC_AXG_NCTF AK17VCC_AXG_NCTF AH17VCC_AXG_NCTF AG17VCC_AXG_NCTF AF17
VCC_AXG_NCTF V26
VCC_AXG_NCTF AE17VCC_AXG_NCTF AC17VCC_AXG_NCTF AB17VCC_AXG_NCTF Y17VCC_AXG_NCTF W17VCC_AXG_NCTF V17VCC_AXG_NCTF AM16VCC_AXG_NCTF AL16VCC_AXG_NCTF AK16VCC_AXG_NCTF AJ16
VCC_AXG_NCTF W25
VCC_AXG_NCTF AH16VCC_AXG_NCTF AG16VCC_AXG_NCTF AF16VCC_AXG_NCTF AE16VCC_AXG_NCTF AC16VCC_AXG_NCTF AB16VCC_AXG_NCTF AA16
VCC_AXG_NCTF V25VCC_AXG_NCTF W24VCC_AXG_NCTF V24VCC_AXG_NCTF W23
VCC_SMAP29
VCC_SMBG32VCC_SMBF32
VCC_AXG_NCTF W28VCC_SMAP33
VCC_AXGY26VCC_AXGAE25VCC_AXGAB25VCC_AXGAA25VCC_AXGAE24VCC_AXGAC24VCC_AXGAA24VCC_AXGY24VCC_AXGAE23VCC_AXGAC23VCC_AXGAB23VCC_AXGAA23VCC_AXGAJ21VCC_AXGAG21VCC_AXGAE21VCC_AXGAC21VCC_AXGAA21VCC_AXGY21VCC_AXGAH20VCC_AXGAF20VCC_AXGAE20VCC_AXGAC20VCC_AXGAB20VCC_AXGAA20VCC_AXGT17
VCC_AXGAM15VCC_AXGAL15
VCC_AXGAJ15VCC_AXGAH15
VCC_AXGAF15VCC_AXGAB15
VCC_SM_LF AV44VCC_SM_LF BA37VCC_SM_LF AM40VCC_SM_LF AV21VCC_SM_LF AY5VCC_SM_LF AM10VCC_SM_LF BB13
VCC_AXGT16
VCC_AXGAG15
VCC_AXGAA15VCC_AXGY15VCC_AXGV15VCC_AXGU15VCC_AXGAN14VCC_AXGAM14VCC_AXGU14VCC_AXGT14
VCC_AXG_SENSEAJ14VSS_AXG_SENSEAH14
VCC_AXG_NCTF Y16VCC_AXG_NCTF W16VCC_AXG_NCTF V16VCC_AXG_NCTF U16
VCC_SM/NCBA36VCC_SM/NCBB24VCC_SM/NCBD16VCC_SM/NCBB21VCC_SM/NCAW16VCC_SM/NCAW13VCC_SM/NCAT13
VCC_AXGAE15
C268
SC
D1U
10V2K
X-4G
P
C268
SC
D1U
10V2K
X-4G
P
1
2
C225
SC
10U6D
3V5M
X-3G
P
C225
SC
10U6D
3V5M
X-3G
P
1
2
C283
Do N
ot Stuff
DY
C283
Do N
ot Stuff
DY1
2
C232Do N
ot Stuff
DY
C232Do N
ot Stuff
DY
1
2
C
2
8
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
8
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
P
O
W
E
R
V
C
C
N
C
T
F
V
C
C
C
O
R
E
6 OF 10NB1F
CANTIGA-GM-GP-U-NF71.CNTIG.00U
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O
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R
V
C
C
N
C
T
F
V
C
C
C
O
R
E
6 OF 10NB1F
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VCC_NCTF AM32
VCC_NCTF AC30
VCC_NCTF AJ29
VCC_NCTF AK25
VCC_NCTF AA32VCC_NCTF Y32VCC_NCTF W32VCC_NCTF U32VCC_NCTF AM30VCC_NCTF AL30VCC_NCTF AK30
VCC_NCTF AG30VCC_NCTF AF30VCC_NCTF AE30
VCC_NCTF AL32
VCC_NCTF W30VCC_NCTF V30
VCC_NCTF AK32
VCC_NCTF AH29VCC_NCTF AG29VCC_NCTF AE29
VCC_NCTF AL28VCC_NCTF AK28VCC_NCTF AL26VCC_NCTF AK26
VCC_NCTF AJ32
VCC_NCTF AK24
VCC_NCTF AH32VCC_NCTF AG32VCC_NCTF AE32VCC_NCTF AC32
VCC_NCTF AC29VCC_NCTF AA29VCC_NCTF Y29VCC_NCTF W29VCC_NCTF V29
VCC_NCTF U30VCC_NCTF AL29VCC_NCTF AK29
VCC_NCTF AH30
VCC_NCTF AB30VCC_NCTF AA30VCC_NCTF Y30
VCCAG34VCCAC34VCCAB34VCCAA34VCCY34VCCV34VCCU34VCCAM33VCCAK33VCCAJ33VCCAG33VCCAF33
VCCAE33VCCAC33VCCAA33VCCY33VCCW33VCCV33VCCU33VCCAH28VCCAF28VCCAC28VCCAA28VCCAJ26VCCAG26VCCAE26VCCAC26VCCAH25VCCAG25VCCAF25VCCAG24VCCAJ23VCCAH23VCCAF23
VCCT32
VCC_NCTF AK23
R5100R2J-2-GP
UMAR510
0R2J-2-GP
UMA
12R516
0R2J-2-GP
UMAR516
0R2J-2-GP
UMA
12
C255SC
D1U
10V2K
X-4G
P
UMA
C255SC
D1U
10V2K
X-4G
P
UMA
1
2
C194
SC
D1U
10V2K
X-4G
P
C194
SC
D1U
10V2K
X-4G
P
1
2
R146Do Not StuffDIS
R146Do Not StuffDIS
1
2
C275
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C275
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
2
C221
SC
10U6D
3V5M
X-3G
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UMA
C221
SC
10U6D
3V5M
X-3G
P
UMA
1
2
C241SC
10U6D
3V5M
X-3G
P
UMA
C241SC
10U6D
3V5M
X-3G
P
UMA
1
2
R5110R2J-2-GP
UMAR511
0R2J-2-GP
UMA
12R517
0R2J-2-GP
UMAR517
0R2J-2-GP
UMA
12
C230
SC
D1U
10V2K
X-4G
P
C230
SC
D1U
10V2K
X-4G
P
1
2
C235
SC
10U6D
3V5M
X-3G
P
C235
SC
10U6D
3V5M
X-3G
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1
2
C
2
4
5
SC
D47U
16V3ZY
-3GP
C
2
4
5
SC
D47U
16V3ZY
-3GP
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1D05V_HV_S0
1D05V_RUN_PEGPLL
1D5VRUN_QDAC
1D05V_RUN_PEGPLL
M_VCCA_MPLL
M_VCCA_HPLL
1D05V_RUN_PEGPLL
VTTLF1VTTLF2VTTLF3
M_VCCA_DAC_BG
3D3V_CRTDAC_S0
M_VCCA_HPLL
M_VCCA_MPLL
M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_DPLLA
M_VCCA_DPLLB
3D3V_S0_DAC_1
1D5VRUN_QDAC1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0
1D5V_S3
1D05V_S0
1D05V_S0
3D3V_S0
1D5V_S0
1D5V_S0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0_DAC
3D3V_S0_DAC
1D8V_S3
1D05V_S0
5V_S03D3V_S0_DAC
1D8V_S3
3D3V_S0_DAC
1D5V_S0
1D8V_S3
3D3V_S51D8V_S3
1D5V_S0
1D8V_S3
PM_SLP_S4#13,36,39,44,47,49
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 55Saturday, December 20, 2008JM70-MV SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 55Saturday, December 20, 2008JM70-MV SB
200mA
852mA
456mA157.2mA50mA
106mA
1782mA
180ohm 100MHz
220ohm 100MHz
50mA
120ohm 100MHz
480mA
24mA
24mA139.2mA
322mA
73mA
5mA
13.2mA
65mA
65mA
Imax = 300 mA
60.3mA
58.7mA
119mA
C
1
9
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
9
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
R3640R0402-PAD
R3640R0402-PAD1 2
C586
SC
D1U
10V2K
X-4G
P
C586
SC
D1U
10V2K
X-4G
P
1
2
C213
SC
10U6D
3V5M
X-3G
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C213
SC
10U6D
3V5M
X-3G
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1
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C548SC
10U6D
3V5M
X-3G
PUMA
C548SC
10U6D
3V5M
X-3G
PUMA
1
2
C247
SC
D1U
10V2K
X-4G
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C247
SC
D1U
10V2K
X-4G
P
1
2
C568SCD1U10V2KX-4GPC568SCD1U10V2KX-4GP
1
2
C203SC
10U6D
3V5M
X-3G
P
UMAC203S
C10U
6D3V
5MX
-3GP
UMA
1
2
C223
SC
D1U
10V2K
X-4G
PC
223S
CD
1U10V
2KX
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1
2
C
2
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6
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4
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6
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3
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D1U
10V2K
X-4G
PC
224S
CD
1U10V
2KX
-4GP
1
2
U51
RT9198-18PBR-GP
2nd = 74.09091.G3F74.09198.C7F
UMA
U51
RT9198-18PBR-GP
2nd = 74.09091.G3F74.09198.C7F
UMA
VIN1GND2EN/EN#3 NC#4 4
VOUT 5
2
1
C
1
9
0
S
C
D
4
7
U
6
D
3
V
2
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9
0
S
C
D
4
7
U
6
D
3
V
2
K
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R3660R0402-PAD
R3660R0402-PAD1 2
BC3
SC
1U16V
3ZY-G
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UMABC3
SC
1U16V
3ZY-G
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UMA
1
2
C583
SC
4D7U
6D3V
3KX
-GP
C583
SC
4D7U
6D3V
3KX
-GP
1
2
D20
BAT54-5-GP
83.BAT54.D812nd = 83.00054.Z81
D20
BAT54-5-GP
83.BAT54.D812nd = 83.00054.Z811
2
3
C286
S
C
D
1
U
1
0
V
2
K
X
-
4
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PC286
S
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1
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C191SC
D1U
10V2K
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UMA
C191SC
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UMA
1
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POWER
C
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G
A
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8 OF 10NB1H
CANTIGA-GM-GP-U-NF71.CNTIG.00U
POWER
C
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G
A
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8 OF 10NB1H
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VTT V3VTT U3VTT V2VTT U2
VCCA_PEG_BGAD48
VCCA_PEG_PLLAA48
VCCA_CRT_DACB27VCCA_CRT_DACA26
VCCA_DPLLAF47
VCCA_DPLLBL48
VCCA_HPLLAD1
VCCA_LVDSJ48
VCCA_MPLLAE1
VCCA_TV_DACB24VCCA_TV_DACA24
VCCD_PEG_PLLAA47
VTT U6VTT T6VTT U5VTT T5
VTT T8VTT U7VTT T7
VCCD_HPLLAF1
VTT U13VTT T13
VTT T12VTT U11VTT T11VTT U10VTT T10VTT U9VTT T9VTT U8
VTT U12
VCCA_SM_CKAP28VCCA_SM_CKAN28
VCCA_DAC_BGA25
VCCD_TVDACM25
VTTLF A8VTTLF L1VTTLF AB2
VCC_DMI AH48VCC_DMI AF48
VCC_SM_CK BF21VCC_SM_CK BH20VCC_SM_CK BG20VCC_SM_CK BF20
VCCD_LVDSM38
VCCD_QDACL28
VCC_AXF B22VCC_AXF B21VCC_AXF A21
VCCA_SMAR20VCCA_SMAP20VCCA_SMAN20VCCA_SMAR17VCCA_SMAP17
VCCA_SMAT16VCCA_SMAR16VCCA_SMAP16
VCC_TX_LVDS K47
VSSA_LVDSJ47
VCC_HV C35VCC_HV B35
VCC_PEG V48
VCCD_LVDSL37
VCC_PEG U48VCC_PEG V47VCC_PEG U47VCC_PEG U46
VCCA_SMAN17
VCCA_SM_CKAP25VCCA_SM_CKAN25VCCA_SM_CKAN24VCCA_SM_CK_NCTFAM28VCCA_SM_CK_NCTFAM26VCCA_SM_CK_NCTFAM25VCCA_SM_CK_NCTFAL25VCCA_SM_CK_NCTFAM24VCCA_SM_CK_NCTFAL24VCCA_SM_CK_NCTFAM23
VTT T2VTT V1VTT U1
VCC_HV A35
VCC_DMI AH47VCC_DMI AG47
VSSA_DAC_BGB25
VCCA_SM_CK_NCTFAL23
VCC_HDAA32
C
2
1
6
S
C
D
1
U
1
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V
2
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X
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4
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P
C
2
1
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
L4
PBY160808T-181Y-GP
2nd = 68.00214.101
68.00206.041
L4
PBY160808T-181Y-GP
2nd = 68.00214.101
68.00206.0411 2
C570SCD1U10V2KX-4GPC570SCD1U10V2KX-4GP
1
2
C
2
6
3
S
C
4
D
7
U
6
D
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C579
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C579
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1
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C567
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4D7U
6D3V
3KX
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C567
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4D7U
6D3V
3KX
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1
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C522
SC
D01U
16V2K
X-3G
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UMA
C522
SC
D01U
16V2K
X-3G
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UMA
1
2
R36310R2J-2-GP
R36310R2J-2-GP
12
2
1
C
2
0
1
S
C
D
4
7
U
6
D
3
V
2
K
X
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1
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4
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G
P
C261 SC
4D7U
6D3V
3KX
-GP
C261 SC
4D7U
6D3V
3KX
-GP
1
2
C202SC
D1U
10V2K
X-4G
P
C202SC
D1U
10V2K
X-4G
P
1
2
C242
SC
2D2U
6D3V
3MX
-1-GP
C242
SC
2D2U
6D3V
3MX
-1-GP
1
2
U52
RT9198-33PBR-GP74.09198.G7FUMA
U52
RT9198-33PBR-GP74.09198.G7FUMA
VIN1GND2EN/EN#3 NC#4 4
VOUT 5
C
2
1
7
S
C
2
D
2
U
6
D
3
V
3
M
X
-
1
-
G
P
C
2
1
7
S
C
2
D
2
U
6
D
3
V
3
M
X
-
1
-
G
P
1
2
R382
Do Not StuffDIS
R382
Do Not StuffDIS1 2
C227 SC
D1U
10V2K
X-4G
P
C227 SC
D1U
10V2K
X-4G
P
1
2
C207
SC
1U10V
3KX
-3GP
UMA
C207
SC
1U10V
3KX
-3GP
UMA
1
2
C544Do N
ot Stuff
DY C544Do N
ot Stuff
DY 12
C550SC
D1U
10V2K
X-4G
PUMA
C550SC
D1U
10V2K
X-4G
PUMA
1
2
C540
SC
D1U
10V2K
X-4G
P
UMA
C540
SC
D1U
10V2K
X-4G
P
UMA
1
2
C246
SC
10U6D
3V5M
X-3G
P
C246
SC
10U6D
3V5M
X-3G
P
1
2
R3700