Aca Lesson Plan for Unit 2
2
PTR TEACHING PROCEDURE FOMRAT DOC.No. Tch/ R/01 REV.No. 00 LESSON PLAN FOR ADVANCED COMPUTER ARCHITECTURE DATE PAGE No. 1 of 5 Faculty Name: T.PANDIARAJAN & E.VANITHA Dept: CSE Date: SEMESTER (pl tick): I YEAR / III SEM / IV / V / VI / VII / VIII PL. TICK ANY ONE : THEORY DURATION: Dec 2011- Apr2012 S.N O SYLLABUS (UNIT 2) DATE Remarks (Signat ure) Plan Actual 1 Introduction &VLIW & EPIC 21/1/12 21/1/12 2 Advanced compiler support 24/1/12 27/1/12 3 Hardware support for exposing parallelism 25/1/12 28/1/12 4 Hardware support for exposing parallelism 26/1/12 1/2/12 5 Compiler speculation 27/1/12 4/2/12 6 Hardware versus software speculation mechanism 31/1/12 9/2/12 7 Hardware versus software speculation mechanism 1/2/12 9/2/12 8 Trace scheduling &Limits on ILP 2/2/12 16/2/12 9 Limits on ILP. 3/2/12 16/2/12
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Transcript of Aca Lesson Plan for Unit 2
PTRTEACHING PROCEDURE FOMRAT
DOC.No. Tch/R/01REV.No. 00
LESSON PLAN FORADVANCED COMPUTER ARCHITECTURE
DATEPAGE No. 1 of 5
Faculty Name: T.PANDIARAJAN & E.VANITHADept: CSE
Date: SEMESTER (pl tick): I YEAR / III SEM / IV / V / VI / VII / VIIIPL. TICK ANY ONE : THEORY DURATION: Dec 2011-Apr2012
S.NO SYLLABUS(UNIT 2)
DATE Remarks (Signature)
Plan Actual
1 Introduction &VLIW & EPIC 21/1/12 21/1/12
2 Advanced compiler support 24/1/12 27/1/12
3 Hardware support for exposing parallelism 25/1/12 28/1/12
4 Hardware support for exposing parallelism 26/1/12 1/2/12
5 Compiler speculation 27/1/12 4/2/12
6 Hardware versus software speculation mechanism 31/1/12 9/2/12
7 Hardware versus software speculation mechanism 1/2/12 9/2/12
8 Trace scheduling &Limits on ILP 2/2/12 16/2/12
9 Limits on ILP. 3/2/12 16/2/12
COMMENTS DURING SURPRISE WITNESS OF DELVERY PROCESS BY PRINCIPAL / HOD / SENIOR FACULTY ( with date [s] of visit)
Reviewed By: Approved By:
H.O.D Signature PRINCIPAL Signature
