Abstract RTOS Modelling for Multi-Processor SoC using SystemC

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courseware Abstract RTOS Modelling for Multi-Processor SoC using SystemC Prof. Jan Madsen Informatics and Mathematical Modelling Technical University of Denmark Richard Petersens Plads, Building 321 DK2800 Lyngby, Denmark

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Abstract RTOS Modelling for Multi-Processor SoC using SystemC. Prof. Jan Madsen Informatics and Mathematical Modelling Technical University of Denmark Richard Petersens Plads, Building 321 DK2800 Lyngby, Denmark. 3. 2. 1. 4. 1. 2. 3. 4. os. mapping. a. b. c. c. a. b. - PowerPoint PPT Presentation

Transcript of Abstract RTOS Modelling for Multi-Processor SoC using SystemC

Page 1: Abstract RTOS Modelling for Multi-Processor SoC using SystemC

courseware

Abstract RTOS Modelling for Multi-Processor SoC using

SystemCProf. Jan Madsen

Informatics and Mathematical ModellingTechnical University of Denmark

Richard Petersens Plads, Building 321DK2800 Lyngby, Denmark

Page 2: Abstract RTOS Modelling for Multi-Processor SoC using SystemC

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Motivation

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34

2

a b c

1 2 os

3

4

mappinga b c

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Principles of mapping

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3

Partitioning/clusteringBreak processes toincrease parallelism

Cluster processes toreduce communication

Allocation

a b

MappingSchedulingCommunication

1

3 2

a

b 1 2 & 3

deadline

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Motivation

rtosa

rtosb

rtosc

rtosd

network

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Uni-processor ...

rtosa

rtosb

rtosc

rtosd

network

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Uni-processor ...

rtosa

Framework to experiment with different RTOS strategiesFocus on analysis of timing and resource sharing

Abstract software model, i.e. no behavior/functionality

Easy to create tasks and implement RTOS models

Based on SystemC

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System model

rtosa

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System model

rtos

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System model

rtos

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System model

Task messages: ready finished

RTOS commands: run preemept Resume

rtos

task

schedulerlinks

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System model - SystemC

pa = new task("task_a",1,50,3,12,0,ready);

registerTask(pa); pb = new

task("task_b",2,40,2,10,0,ready); registerTask(pb);

pc = new task("task_c",3,30,1,10,0,ready);

registerTask(pc);rtos

identifierperiod

priority

offsetWCET

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Link model

Aim: Adding tasks without having to create seperate communication links

Uses the SystemC master-slave library

If two tasks send a message at the same time – they are executed in sequence, but in undefined order

Global ”clock” is used to keep track of time

rtos

clock

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Task model

r1

r1 = time at which task becomes released (or active)

e1

e1 = worst case execution time (WCET)

d1 = deadline, task should complete before this!

d1s1

s1 = time at which task starts its execution

T1

T1 = period, minimum time between task releases

1

o1 = offset (or phase) for first released

o1

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Task model

idle

running preempt

readyCp>0 !run

!resumerun

Cp==0 ready

preempt

resume

Cr==0finish

& Cr>0!preempt

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SC_MODULE(perTask){ sc_outmaster<message_type> out_message; sc_inslave<message_type> in_command; sc_in_clk clock;

sc_event newStateEvent; void next_state(); void update_state(); void get_comm_from_scheduler(); SC_HAS_PROCESS(perTask); perTask(sc_module_name name_, int id_, ...) : sc_module(name_),id(id_), ...) { SC_METHOD(next_state); sensitive << newStateEvent; SC_METHOD(update_state); sensitive << clock; SC_SLAVE(get_comm_from_scheduler,in_command); } private: t_state state, new_state;

Task model - SystemC

new_state

state

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Scheduling model

Aim: Simple way to describe the scheduling algorithm

Scheduler should only handle one message at a time

Rate-monotonic scheduling preemptive WCET d=T Fixed priority

rtosscheduler

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void RM_scheduler::doSchedule() { ti = in_message; if (ti.comm==ready) { Q.push(ti); } else { tk.id = 0; } tj = Q.top(); if (tj.id != 0) { if (tk.id != 0) { if (tk < tj) { out_command = *(preemptTask(&tk, &Q)); tk = tj; out_command = *(runTask(&tj, &Q)); } else { } } else { tk = tj; out_command = *(runTask(&tj, &Q)); } } else { }}

Scheduling model - SystemC

ti: message received from from task i

tj: message from task j with highest priority from ready list

tk: message of the currently running task

Rate monotonic scheduling

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An example

p3

p2

p1

50

40

30

0 20 30 40 50 6010

1

3

2

1

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priorityeiTi

1030

1040

1250

2

3

1

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An example

p3

p2

p1

50

40

30

0 20 30 40 50 6010

1

3

2

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Extending the task model

Varying execution times [emin:emax]

r1 emin d1s1 T1

1

emax

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Extending the task model

Varying execution times [emin:emax] Context switching Data dependencies

r1 d1s1 T1

1

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Data dependencies

synchronizer

scheduler

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Resource sharing

synchronizer

scheduler

allocator

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Multi-processors

rtosa

rtosb

rtosc

rtosd

network

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Multi-processors

rtosb

rtosc

rtosa

rtosd

network

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Multi-processors

rtos rtos

rtosb

rtosc

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Multi-processors

synchronizer

schedulerscheduler

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Example

1

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2

oi Ti ei

0 4 2

0 6 2+2

4 6 3

1

2

4

3

bos

4

aos

1

2

3

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Dynamic scheduling

bos

4

aos

1

2

3

0 4 6 8 102 14 1612

1

2a

0 4 6 8 102 14 1612

3

4b

RM RM

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Changing synchronization protocol

0 4 6 8 102

0 4 6 8 102

14 1612

14 1612

bos

4

aos

1

2

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3

2

4

a

b

RM EDF

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Multi-processing anomalies

Assume a set of tasks optimally scheduled on a multiprocessor system with: fixed number of processors fixed execution times (ei) precedence constraints

Then changing the priority list increasing the number of processor reducing execution times weakening the precedence constraints

May increase the scheduling length!

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Example of anomalies

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4 5

1

3

2

4 5Reduce e1 of task 1

a

b

a

b

Task 2 and 4 are sharing a resource, i.e. mutually exclusion

1 3

42

5

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Consequences of anomalies

Tasks may complete before their WCETs So most on-line scheduling algorithms are

subject to experience anomalies Simple but inefficient solution:

Have tasks completing early idle

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Network-on-Chip extension

bos

aos

cos

L1 L2

L3

S1 S2 S3

1

3

4

23

2 5

415mx

mz

my

mx: S1,L3,S3,L2,S2

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Network-on-Chip model

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Design space exploration

bus

4,5c

3b

1,2a

b

a

c

bus

1

4

3

2

5

xy z

b

a

c

bus

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xyz

L1

L2

b

a

c

L3

2

4

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1

5

x

y

z

zL1

L2 b

a

c

L3

1

4 5

3

2

x

x

z

y

QoS AwareAny traffic from a has higher priority

1,2a

3b

4,5c

L1 L2

L3

L1

L2

b

a

c

L3

2

4 5

3

1

x

x

z

yTiming Aware

L3 L4 y xz

b

a

c

bus

1

4

32

5

zyx

L1

L2

b

a

c 1

4

32

5

z

L1

L3

b

a

c 1

4

32

5

z

xx

xyAllocation AwareSwap task on PEs to: 2,3 | 4,5 | 1

3b

4,5cL1 L2

L3L4

L1

L2

b

a

c

L3

2

4

3

1

5

x

y

z

z

1,2a

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Summary

Simple SystemC based framework to study the dynamic behavior of a task set running under the supervision of an abstract RTOS

Synchronizer to handle data dependencies Extension to multi-processor/RTOS systems Network-on-Chip extension (new) Not covered,

Allocator to handle resource sharing Power estimation/profile Multi-processing anomalies (in your slides)

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References

Scheduling in Real-Time SystemsF. Cottet, J. Delacriox, C. Kaiser, Z. MammeriJohn Wiley & Sons, 2002

Real-Time SystemsJ. W. S. LiuPrintice Hall, 2000

Real-Time Systems and Programming LanguagesA. Burns, A. WellingsAddison-Wesley, 2001 (third edition)

System Design with SystemCT. Grotker, S. Liao, G. Martin, S. SwanKluwer, 2002