Aalborg Universitet

Modular Plug’n’Play Control Architectures for Three-phase Inverters in UPSApplicationsZhang, Chi; Guerrero, Josep M.; Quintero, Juan Carlos Vasquez; Seniger, Carsten

Published in:I E E E Transactions on Industry Applications

DOI (link to publication from Publisher):10.1109/TIA.2016.2519410

Publication date:2016

Link to publication from Aalborg University

Citation for published version (APA):Zhang, C., Guerrero, J. M., Quintero, J. C. V., & Seniger, C. (2016). Modular Plug’n’Play Control Architecturesfor Three-phase Inverters in UPS Applications. I E E E Transactions on Industry Applications, 52(3), 2405 -2414. DOI: 10.1109/TIA.2016.2519410

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Modular Plug’n’Play Control Architectures for Three-phase Inverters in UPS Applications

Chi Zhang1, Josep M. Guerrero1, Juan C. Vasquez1, and Carsten Seniger2

Email: {zhc, joz, juq } @et.aau.dk carsten.seniger@leaneco.dk 1 Department of Energy Technology, Aalborg University, Aalborg, Denmark

2 Leaneco A/S, DK-6000 Kolding, Denmark

Abstract— In this paper a control strategy for the parallel operation of three-phase inverters in a modular online uninterruptable power supply (UPS) system is proposed. The UPS system is composed of a number of DC/ACs with LC filter connected to the same AC critical bus and an AC/DC that forms the DC bus. The proposed control includes in two layers, individual layer and recovery layer. In individual layer, virtual impedance concept is employed in order to achieve active power sharing while individual reactive power is calculated to modify output voltage phases to achieve reactive power sharing among different modules. Recovery layer is mainly responsible for guaranteeing synchronization capability with the utility and voltage recovery. With the proposed control, improved voltage transient performance can be achieved and also DC/AC modules can be plugged in and out flexibly while controlling the AC critical bus voltage thus allowing plug’n’play or hot-swap capability. Detailed control architecture of the individual and recovery layers, are presented in this paper. An experimental setup was built to validate the proposed control approach under several scenarios-case studies.

Keywords— Modular UPS system, Plug’n’Play, voltage restoration.

I. INTRODUCTION Nowadays, along with the rapid development of advanced

technologies in communication and data processing, a large number of modern equipment that require continuous and reliable power supply are encompassing into our everyday life [1]. Power reliability issues related to the utility have led to the increasing attention to different kinds of UPS systems.

Based on the International Electrotechnical Commission Standard 62040-3 [2], a UPS system can be categorized in three types, namely offline UPS, online UPS and line-interactive UPS. Online UPS system is receiving more and more interest from both research and industrial fields due to its outstanding capability of suppressing the utility distortion [3]. Consequently, a number of online UPS structures have been proposed in [4]-[6].

Conventionally, an online UPS system is made up of an AC/DC, a DC/AC, a battery pack, a static bypass switch and isolating transformer, as shown in Fig. 1. In addition to controlling DC bus in the UPS system, the AC/DC also acts as the charger for the battery pack in normal condition (Normal). Otherwise, the battery pack will start to regulate the DC bus. In case of power failure (Power Failure), the static bypass switch will be turned on in order to allow the utility to support

AC/DC DC/AC 1

Isolated Transformer

UtilityStatic Bypass Switch

Load

Normal

DC/AC 2

DC/AC n

...

Battery Pack

Power Failure

DC/DC

Load

AC bus

Fig. 1. Proposed Modular Online UPS Structure.

the load directly [4]. Modular online UPS systems (Fig. 1), as a kind of flexible,

reliable architecture, are becoming more and more attractive in in both academic and industrial field [7]. Several inverter modules are operating at the same time to work as inverter stage of the online UPS system. Numbers of the parallel control technologies, such as centralized control [8], master-slave control [9], [10], averaged load sharing [11], allow the possibility of allowing inverter modules share both active power and reactive power of the load. Nevertheless, critical lines are mandatory in these control algorithms. Consequently, wireless droop controls methods [12]-[14] were proposed to avoid such kind of lines among the inverter modules. Normally, wireless droop control will modify the output voltage frequency or phase and voltage amplitude. As a result, actual output voltage of the UPS system will have some deviations compared to the given reference. Thus a recovery layer controller [15], [16] is required to recover the output voltage according to the given reference. Local data of each inverter module is required to transfer through the CAN bus network since the mature DSP technology offers a smaller communication network delay [17].

In this paper, a modular structure is employed with a number of inverter modules operating in parallel as shown in Fig. 1. Each inverter module is connected with the same AC bus with LC filter. System control is divided into two layers, namely individual layer (each inverter module) and recovery layer (UPS output voltage recover). Each individual layer controller for inverter module utilizes virtual impedance approach to achieve active power sharing among different

modules. Inductor current and capacitor voltage are measured to achieve the proposed control. Moreover, regarding reactive power sharing issues, each DC/AC individual reactive power is calculated each phase respectively in order to modify phase angle of its own output, which is called “phase-equal loop”. Consequently, UPS systems output voltage will have voltage deviations and phase shift compared with the given voltage references (utility) and this is an undesired condition for an online UPS system. Hence a recovery layer controller is added in order to compensate voltage amplitude and phase errors by monitoring the proposed online UPS system AC bus voltage amplitude and phase angle information. Therefore, phase angle synchronization capability with the utility is finally achieved and the output voltage amplitude is tightly controlled under different load conditions. In case of modules failure, failed modules need to be replaced without interrupting system operation. Also in some special conditions, modules are required to operate in a certain cycle considering heat and reliability issues. Thus the hot-swap capability provided by the proposed control allows any of the modules connect and disconnect with AC critical bus smoothly without bringing big voltage overshoots or sags. In order to validate the proposed control algorithm under several case-study scenarios, an experimental setup was built.

This paper is organized as follows. Section II presents the proposed system structure and detailed control algorithm, while Section III analyzed the system stability. Section IV discusses the simulation results and experimental results are presented in Section V to validate the control algorithm feasibility. Finally, conclusions are given in Section VI.

II. PROPOSED CONTROL SCHEME FOR ONLINE MODULAR UPS SYSTEM

Compared with conventional online UPS system, each inverter module in the proposed modular online UPS system has a smaller power rate, which is an important issue that will reduce the system cost. Moreover, improved system expandability contributes to the low maintain cost of the system. On the other hand, the LC filter used avoids the resonance brought by LCL filter [18]-[20]. The proposed modular online UPS system, shown in Fig. 1, uses a three-phase-three-wire AC/DC to control the DC bus. The control is carried out in dq frame, which is presented in [21] in detail. The phase angle detected by the AC/DC is also the phase reference for the inverter modules, which is transferred through the CAN bus network.

A. Individual Layer for Single Inverter Module The individual layer control is considered in αβ frame,

which is a typical double loop (voltage and current) control architecture as show in Fig. 2, 2 2 2 2

5,7( ) ( ) ( ( ) )v pv rv o hrv o

hG s k k s s k s s hω ω

=

= + + + +∑ (1)

2 2 2 2

5,7( ) ( ) ( ( ) )c pc rc o hrc o

hG s k k s s k s s hω ω

=

= + + + +∑ (2)

being kpv, krv, ωo, khrv, h, kpc, krc and khrc the voltage proportional term, fundamental frequency voltage resonant

++ +

Reactive Power Calculation

Rvir-

iLabc

-

+ +-

vCabc

δnkref

kph

abc/αβ

Gv(s) Gc(s) PWM+Filtervc

vαβ_ref

vcαβiLαβ

Qnk

Vir

tual

Res

isto

r

Phase Equal Loop

δn

vnk

sin( )nkref g nv tω δ δ+ +

Fig. 2. Inverter Module individual layer control loop diagram.

term, fundamental frequency, the hth harmonic voltage compensation term, harmonic order, current proportional term, fundamental frequency current resonant term and the hth harmonic current compensation term respectively. Hereby, nonlinear load condition is taken into consideration since PR controller has the ability to eliminate the voltage distortion due to the nonlinear load [22], [23]. Only 5th and 7th have been taken into consideration.

Moreover, virtual impedance and “phase-equal loop”, referring to (3) and (4), are used to achieve parallel operation and active, reactive power sharing (shown in Fig. 2).

( )sinnk nkref g n vir nLabcV V t R iω δ δ= + + − (3)

_n utility p nkk hk Qδ δ= + (4)

Here n is the number of inverter module (1, 2, 3…N), k is the phase order (a, b, c), Vnkref is the nominal voltage reference, Rvir is the virtual resistor, δutility is the utility phase information of phase k, kph is the phase regulating coefficients and Qnk is the reactive power of each phase of each inverter module.

In a previous work [25], a virtual impedance loop was proposed. However it is complex since it needs to be resistive for high frequency ranges and inductive at the fundamental frequency, further it uses two droop functions, so that active and reactive powers are needed to be calculate. In a cut clear contrast, we propose a simpler approach by using pure resistive virtual impedance loop for the whole frequency range, and only reactive power is needed to regulate the phase angle. Thus, active current sharing is achieved by using the virtual resistor, which means that it is not necessary to calculate the active power of each module. Note that this this simplifies the controller implementation.

The basic idea of the proposed approach is to adjust the phase with the reactive power. Note that thanks to the virtual resistance, the phase is dependent on the reactive power as follows [13]: ( )sin QQ EV R kφ φ= − ≈ − (5)

being Q, E, V, R and ϕ the output reactive power, output voltage amplitude, AC critical bus voltage, output virtual resistance, and power angle, respectively.

Fig. 3. Overall control diagram for the online UPS system.

Thus, when increasing the phase, reactive power may decrease almost linearly. In this sense, we can use a reactive power versus phase “boost” scheme, that we call here “phase equal loop” (4). Each module will regulate its own phase angle based on its own output reactive power until modules reach the same phase angle. Each phase voltage references are calculated and modified respectively, referring to (6), (7) and (8), aiming at compensating unbalance load conditions, _• sin( )a aref util phity Lvaa r aikt Q iv V Rω δ= + −+ (6)

_• sin( )b bref util phity Lvbb r bikt Q iv V Rω δ= + −+ (7)

_• sin( )c cref util phity Lvcc r cikt Q iv V Rω δ= + −+ (8)

B. Recovery Layer for the Online UPS System Due to virtual impedance, output voltage amplitude and

phase angle of the UPS system are load dependent. That means the deviations between UPS output voltage and the utility are varying in different load condition. So voltages must be recovered to the nominal value and synchronized with the utility without causing any voltage oscillation according to International Electrotechnical Commission Standard 62040-3 [2]. So a high-level controller, called “recovery layer” control is chosen to eliminate the deviations between UPS output voltage and the utility. Through the “recovery layer” control loop, compensated value for voltage references are obtained and broadcast through the CAN bus network. Considering that each phase may be faced with different load condition, the voltage references compensating values are calculated each phase respectively.

The overall control diagram is shown in Fig. 3. Instead of implementing the voltage recover control in each inverter module, the AC bus voltage of the UPS system is used, for instance phase a, ( )_ _ _ _ ( )a rec utility a bus a v recv V V G s= − ⋅ (9)

( )_ _ _ _ ( )a rec utility a bus a ph recG sδ δ δ= − ⋅ (10)

being va_rec, Vutility_a, Vbus_a, Gv_rec, δa_rec, δutility_a, δbus_a and Gph_rec as restoration value of voltage amplitude, RMS voltage reference of phase a in central controller (utility voltage amplitude), AC bus voltage RMS value of phase a, voltage compensation block transfer function, phase restoration value of voltage phase, phase reference in central controller of phase a (utility phase angle), AC bus voltage phase angle of phase a and phase compensation blocks transfer function respectively.

It can be seen that the recovery layer controller is only monitoring the AC bus voltage amplitude and phase angle all the time. Notice that even though without knowing the exact operating numbers of the inverter modules, it can still calculate the recovered voltage amplitude value for each inverter module.

In this scenario, the compensation blocks are implemented by using two typical PIs, shown in (11) and (12), _ _ _( )v rec pv rec iv recG s k k s= + (11)

_ _ _( )ph rec p rec i recG s k k sδ δ= + (12)

being kpv_rec the voltage proportional term, kiv_rec the voltage integral term, kpδ_rec the phase proportional term and kiδ_sec the phase integral term.

III. STABILTY ANALYSIS Since the system control is derived mainly in two layers,

critical parameters used in these two layers are analyzed respectively, namely individual layer and recover layer control parameters.

A. Analysis of Individual Layer Control Parameters Based on Fig. 2, the voltage and current inner loop is

considered in αβ frame, whose transfer function is derived. In order to make the model more accurate, a delay block due to PWM and control is given, ( ) 1 (1.5 1)PWM sG s T s= + (13) where Ts is the PWM period. So by combining (1), (2) and (13), transfer function from reference voltage to output capacitor voltage is derived,

( )2( )G s d as bs c= + + (14)

with Loada LR C= , current PWM Loadb L G G R C= + ,

Load current PWM voltage current PWM Loadc R G G G G G R= + + ,

( ) ( )Load v c PWMd R G s G s G= , where L, C and RLoad are filter inductance, filter capacitance and load respectively. Consequently, bode diagram of the system is presented in Fig. 4. It can be observed that 0 dB is achieved on both fundamental frequency and harmonic frequency (5th and 7th). With the proportional term kpv increasing, 0dB is guaranteed while bandwidth of the controller is increased. A similar performance is observed in the current loop, as shown in Fig. 4(b).

kpv is increasing from 0.25 to 2

(a)

(b)

kpc is increasing from 0.5 to 5

50Hz 5th 7th

50Hz 5th 7th

Fig. 4. Bode diagram of inner loop. (a) Bode diagram with variable kpv. (b) Bode diagram with variable kpc.

In order to design the virtual resistance value (Rvir), the maximum allowed voltage deviation has to be taken into account. Since the output voltage amplitude of the UPS system is decreased proportionally to the inductor current while considering a fixed virtual resistor value as shown in Fig. 5. According to the full load working condition, the virtual resistor value can be chosen as, maxL viri R v≤ ∆ (15)

being iLmax as the inductor current under full load condition. And Δv is the maximum allowed voltage error, which is chosen as 10% of nominal UPS output voltage value. As for the “phase equal loop”, it is analyzed together with the phase restoration loop since it is tightly related with output voltage’s phase angle.

B. Analysis of Recover Layer Control Parameter The control diagram shown in Fig. 3 is able to be

represented by Fig. 6. By assuming that inner loop of each inverter module is well tuned and operates properly. v can be treated the same as vbus_k. Similarly, δ is able to be seen the same as δbus_k. Hereby k is the phase order (a, b and c). Consequently, the control diagram is simplified as shown in Fig. 7(a) and the transfer function is derived,

_ _ __

_1v rec delay utility k nk ref vir Lnk

bus kv rec delay

G G v v R iv

G G+ −

=+

(16)

Considering the dynamic performance of the system, the closed loop function is expressed as follows,

iLiLmax

VVmax

ΔVRvir

Fig. 5. Design criteria for Rvir.

+

-

+

+

+-

+

+

+

-

vutility_k

vbus_k vnk_ref

Gv_rec Gdelayvk_rec

Rvir

δutility_k

δbus_k

Gph_rec Gdelay

Power calculatevc

iLnk

LPFδk_rec

v

δkph

iLnk

δutility_k

vref

Fig. 6. Control loops for voltage restoration and phase restoration.

+

-

+

+

+

-

+

+

+

-

vbus_k vnk_ref

Gv_rec Gdelayvk_rec

Rvir

δbus_k

Gph_rec Gdelay

iLnk

LPF kph

δutility_k

vutility_k

δutility_k

vbus_k

δbus_k

Q

δk_rec

(a)

(b) Fig. 7. Simplified recovery level control. (a) Amplitude recover. (b) Phase recover.

2

_ 2_ _

1.5( )1.5 (1 )

vir svoltage rec

s pv rec iv rec

R T s sG sT s k s k

+= −

+ + + (17)

With kpv_rec moving from 0 to 2

(a)

(b)

With kpδ_sec moving from 0 to 2

Another pole keep almost in the same position!

Fig. 8. PZ map for recovery control. (a) PZ map for variable kpv_rec. (b) PZ map for variable kpδ_rec.

Fig. 8(a) shows the pz map of voltage amplitude restoration control block. While kpv_rec is moving from 0 to 2, one dominating pole moves obviously towards origin point while the second one tends to move inconspicuously towards boundary of stable area. Similarly, a simplified control diagram for phase restoration is derived as shown in Fig. 7(b), from which a mathematical model is able to be derived,

Phase restoration pole movement

Phase restoration zero movement

With CAN bus delay Tc increasing

With CAN bus delay Tc increasing

Amplitude restoration pole movement

Amplitude restoration zero movement

Another two poles and one zero are almost kept in the same position

The other pole and one zero are almost kept in the same position

(a)

(b) Fig. 9. Communication delay impact on voltage amplitude and phase restoration control. (a) Phase restoration. (b) Amplitude restoration.

_ __

_1ph rec delay ref r ref LPF ph

bus kph rec delay

G G G k QG Gδ δ

δ+ +

=+

(18)

Consequently, the dynamic system mathematical model is expressed as follows,

( )_1LPF ph ph rec delayG k Q G Gδ = + (19)

( )LPF c cG sω ω= + (20)

2

3 2

ds esQ fs gs hs iδ +=

+ + + (21)

( )( ) 1 1delay cG s T s= + (22)

with the following parameters: 1.5 c c phd T kω= , c phe kω= , 1.5 cf T=

_1.5 1c c p recg T k δω= + + , _rec _c i p rec ch k kδ δω ω= + + ,

_i rec ci k δ ω= , where ωc and Tc are cut off frequency of power calculation low pass filter and communication delay time respectively. The phase regulation coefficient kph is on the numerator, which means that it doesn’t affect system stability. Under different control parameters for phase restoration, pz map in Z domain is presented in Fig. 8(b). It can be observed that a similar poles and zeros movements performance is obtained.

On the other hand, the impact of communication delay Tc on system stability is also analyzed. With increasing Tc, one dominating pole of phase restoration tends to move outside of stable region indicating an unstable system. And one zero is moving out of the unit circle, which means a slow transient performance, as shown in Fig. 9(a). Fig. 9(b) presents the pz map for amplitude recovery. Note that similar behavior as in previous case is obtained.

IV. SIMULATION RESULTS A three-inverter-module online UPS system, as shown in

Fig. 1, was simulated by using PLECS. The parallel sharing performance with amplitude recovery is shown in Fig. 10(a). At t, module #2 is ordered to connect with the AC critical bus and work in parallel with module #1. Due to the phase equal loop, two modules phases are regulated to the same phase angle. Moreover, two modules voltage amplitudes are tightly regulating the voltage to 325V (peak value). After a few cycles, both active and reactive power are well share between the two modules.

In Fig. 10(b), it can be see that with the modules plugging in and out, small oscillation in the AC bus voltage is observed. The AC bus voltage is tightly controlled. As mentioned in IEC 62040-3, the output voltage oscillation of a UPS system should be kept to minimum 10% compared with the nominal value. It can be observed that when any of the inverter modules is plugged in or out, there is around 10V voltage overshoot or dip on AC bus, which is around 5% of the nominal RMS voltage value of the AC critical bus, thus being acceptable for a UPS application.

At the same time, phase errors between utility and UPS output voltage are also calculated, which are shown in Fig. 10(c). Due to the recovery level control action, the errors between them are eliminated gradually until they are eliminated, as shown in Fig. 10(c).

0

0.67pu

1pu

230

245

215

300

-300Time (s)

P3P2P1

AC

bus

vol

tage

(V)

AC

bus

RM

S (V

)M

odul

e Po

wer

(p

u)

t1 t2 t3 t4 t5 t6

(a)

Phas

e a

volta

ge

(V)

Phas

e a

angl

e(r

ad)

Act

ive

pow

er(W

)R

eact

ive

pow

er(V

ar)

Phase a voltage of module #2

Phase a voltage of module #1Phase a angle of module #1

Phase a angle of module #2

Active power of module #1

Active power of module #2

Reactive power of module #2

Reactive power of module #1

(b)

Time(s)

t

Phas

e er

rors

(rad

)Ph

ase

Sign

als

(rad

)

Utility phase a UPS phase a

Phase errors

(c)Time(s)

Fig. 10. Simulation results. (a) Phase regulation results. (b) Power sharing and AC critical bus voltage performance in simulation in case of module plugging in and out. (c) Phase synchronization performance.

V. EXPERIMENTAL RESULTS

A modular online UPS system shown in Fig. 1 was built in the Intelligent MicroGrids Laboratory (Fig. 11) [24] with four Danfoss converters, shown in Fig. 11. Three were working as inverter modules and the last one as AC/DC. The control algorithm was established in MATLAB/SIMULINK and compiled into a dSPACE 1006 platform for real-time control of the experimental setup. A list of critical parameters that have significant effect on the system performance is presented in Table I. Experiments, including both steady and transient operation, were carried out to prove the proposed approach feasibility.

TABLE I. PARAMETERS OF EXPERIMENTAL SETUP

Symbol Parameter Values

Converters fsw Switch frequency 10kHz

L Filter inductance of DC/AC module

1.8mH

C Capacitor of DC/AC module 27μF Inverters Control Parameters

kpv Proportional voltage term 0.55 krv Resonant voltage term 70

k5rv,k7rv 5th, 7th resonant voltage term 100,100 kpc Proportional current term 1.2 krc Resonant current term 150

k5rc,k7rc 5th, 7th, resonant current term 30,30 Vref Reference voltage 230V (RMS)

Secondary Control kpv_rec Proportional voltage term 3.2 kiv_rec Integral voltage term 30.5 kpδ_rec Proportional phase term 0.2 kiδ_rec Integral phase term 9

dSpace 1006

AC/DCThree DC/ACs

Scope

AC critical bus

PC

Isolated transformer

Loads

Fig. 11. Experimental setup.

P2

P1

P3

ta tb ta tb

Q1

Q2

Q3

(a) (b)

Act

ive

pow

er (W

)

Rea

ctiv

e po

wer

(Var

)

Fig. 12. Power sharing performance in case of module plugging in and out. (a) Active power sharing when module #3 plug in and out. (b) Reactive power sharing when module #3 plug in and out.

A. Power Sharing Performance In order to test the powering sharing performance in case of

inverter modules plugging in and out, three inverter modules are used to work in parallel to support hybrid load (resistors and non-controlled rectifier). The experimental results are shown in Fig. 12. At ta, inverter module #3 is suddenly connected with the AC critical bus and disconnected suddenly at tb. It can be observed that both active power and reactive

power are well shared among the modules as shown in Figs. 12(a) and (b). Hereby, a low pass filter is used to calculate the averaged active power and reactive power.

B. Voltage Restoration Performance Voltage transient performance of the system should be also

evaluated in the process of modules connection and disconnection (hot-swap capability). In the standard IEC 62040-3, there are requirements about the voltage transient performance regarding voltage overshoot or sag amplitude and transient time, which is shown in Table II. Fig. 13(a) depicts the UPS output voltage transient performance at ta. It can be observed that the whole transient time duration is around 70ms. The voltage overshoot when module #3 is reconnected is around 40V, as shown in Fig. 13(a), which is around 7% ((610-570)/570) of the nominal output voltage value. According to Table II, if the voltage overshoot is less than 10% of the nominal value, the transient duration time is in the

TABLE II. TRANSIENT DURATION TIME REQUIREMENTS

Voltage overshoot or sag (%) Duration time (ms)

Linear Load

14% (overshoot or sag) 20-40 12% (overshoot or sag) 40-60 11% (overshoot or sag) 60-100 10% (overshoot or sag) 100-1000

Nonlinear Load 12% (overshoot) /27% (sag) 40-60 11% (overshoot) /27% (sag) 60-100 10% (overshoot) /20% (sag) 100-1000

Vab

Vbc VcaAround 70ms

Vab

Vbc Vca

(a)

(b) Fig. 13. Real time voltage performance. (a) Details at ta. (b) Details at tb.

(a)

(b)

ioa2 ioa3 ioa1ierror

ioa2 ioa3 ioa1ierror

Fig. 14. Output current sharing performance. (a) Details before ta. (b) Details after tb.

range of 100ms – 1000ms. Consequently, it can be concluded that the system performance meets the standard IEC 62040-3 [2].

Fig. 13(b) shows the voltage transient performance when module #3 is disconnected, and an obvious voltage overshoot or sag is observed. In Fig. 13, the transient performance when modules are disconnected from the AC critical bus is presented, highlighting the smooth voltage transient response.

At the same time, the current sharing performance of the three modules is presented in Fig. 14. It can be seen that the current shape of three modules almost the same and well shared among the modules. Before ta, the current sharing performance between the two modules is shown in Fig. 14(a). After tb, the third module plugs into the system. It can be seen that the current is also properly shared between the three modules.

C. Voltage Synchronization Capability Hereby the AC critical bus voltage is detected and used to

achieve not only voltage restoration but also the synchronization process. So synchronization performance of the system was also tested with the same hybrid load condition, which is shown in Fig. 15. Line-to-line voltage of phase a and b of the utility and proposed online UPS system is presented. It can be observed that the phase errors are reduced smoothly until it reaches zero without causing any voltage oscillation.

(b)

(a)

(d)

(c)

Error

Vab_utility Vab_ups

te tf tg

Vab_utility Vab_ups

Vab_utility Vab_ups

Fig. 15. Synchronization performance. (a) Overall process. (b) Details at te. (c) Details at tf. (d) Details at tg.

(a)

(b)

Vab_utility Vab_upsδdifferent

Vab_utility Vab_upsδdifferent

Verror

Verror

Fig. 16. Performance in case of communication failure. (a) Two modules in parallel. (b) Three modules in parallel.

D. Central Controller Failure Performance Since the central controller uses a communication network

(in this case CAN bus) to send back and forward information to the local controllers, it is necessary to check the robustness of the system during those faults. Based on the aforementioned analysis and from Fig. 3, it can be concluded that the central controller, which depends on the communication network, is mainly responsible for the synchronization and restoration between UPS output and the utility. Restoration values for voltage reference will be missing if the communication network fails, resulting in steady-state voltage deviation, which is a characteristic of the virtual impedance performance. However, there is no obvious impact on the power sharing and the local control loop of the DC/AC modules.

As a consequence, there will be phase shift and voltage drop between UPS output voltage and utility voltage due to the virtual resistor and phase equal droop control. In Fig. 16, the line to line voltage (phase a to phase b) is presented. In Fig. 16(a), two modules are operating in parallel, and it can be seen that there is an existing δdifferent. Also, as aforementioned a voltage drop will appear in this condition. Finally, the third module plugs in as shown in Fig. 16(b), and a larger voltage error occurs.

Here, the control parameters Rvir and kph have been adjusted to obtain a clear lower performance. In a practical

application, proper design of the parameters will make those errors much lower, so that in case of communication network failure, it will only affect the bypass procedure, which may not be possible to do it fast in this condition, so that we may need to wait until an eventual phase match occurs between the critical bus and the main ac grid [26].

VI. CONCLUSION In this paper, a control strategy intended for a modular

online UPS system was developed with the capability of plug’n’play. With the inverter modules starting or stopping, the proposed control is able to control the AC bus tightly and make sure that the AC bus voltage is tightly synchronized with the utility. Both active and reactive power sharing performance is validated through experiments results in both steady and transient process. In hybrid load condition (nonlinear plus linear), with the modules plugging in or out, the AC bus voltage is well controlled. Thus the transient time duration is also tightly controlled and it meets the standard IEC-62040-3. Experimental results are presented to support the proposed control approach performance.

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VII. BIOGRAPHY

Chi Zhang (S’14) received the B.S degree in electronics and information engineering from Zhejiang University (ZJU), Hangzhou, China in 2012. Between 2012 and 2013, he works as a Master student in National Engineering Research Center for Applied Power Electronics in Zhejiang University. He is currently working toward his Ph.D in

power electronic at the Department of Energy Technology, Aalborg University, Denmark.

His research interests include power electronics converter design in modular uninterruptible power supply systems, active power filter systems and renewable energy generation systems.

Josep M. Guerrero (S’01-M’04-SM’08-FM’15) received the B.S. degree in telecommunications engineering, the M.S. degree in electronics engineering, and the Ph.D. degree in power electronics from the Technical University of Catalonia, Barcelona, in 1997, 2000 and 2003, respectively. Since 2011, he has been a

Full Professor with the Department of Energy Technology, Aalborg University, Denmark, where he is responsible for the Microgrid Research Program. From 2012 he is a guest Professor at the Chinese Academy of Science and the Nanjing University of Aeronautics and Astronautics; from 2014 he is chair Professor in Shandong University; and from 2015 he is a distinguished guest Professor in Hunan University. His research interests is oriented to different microgrid aspects, including power electronics, distributed energy-storage systems, hierarchical and cooperative control, energy management systems, and optimization of microgrids and islanded minigrids. Prof. Guerrero is an Associate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS, the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, and the IEEE Industrial Electronics Magazine, and an Editor for the IEEE TRANSACTIONS on SMART GRID and IEEE TRANSACTIONS on ENERGY CONVERSION. He has been Guest Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS Special Issues: Power Electronics for Wind Energy Conversion and Power Electronics for Microgrids; the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS Special Sections: Uninterruptible Power Supplies systems, Renewable Energy Systems, Distributed Generation and Microgrids, and Industrial Applications and Implementation Issues of the Kalman Filter; and the IEEE TRANSACTIONS on SMART GRID Special Issue on Smart DC Distribution Systems. He was the chair of the Renewable Energy Systems Technical Committee of the IEEE Industrial Electronics Society. In 2014 and 2015 he was awarded by Thomson Reuters as Highly Cited Researcher, and in 2015 he was elevated as IEEE Fellow for his contributions on “distributed power systems and microgrids.”

Juan C. Vasquez (M’12-SM’14) received the B.S. degree in electronics engineering from the Autonomous University of Manizales, Manizales, Colombia, and the Ph.D. degree in automatic control, robotics, and computer vision from the Technical University of Catalonia, Barcelona, Spain, in 2004 and 2009, respectively. He was with the

Autonomous University of Manizales working as a teaching assistant and the Technical University of Catalonia as a Post-

Doctoral Assistant in 2005 and 2008 respectively. In 2011, he was Assistant Professor and from 2014 he is working as an Associate Professor at the Department of Energy Technology, Aalborg University, Denmark where he is the Vice Programme Leader of the Microgrids Research Program. From Feb. 2015 to April. 2015 he was a Visiting Scholar at the Center of Power Electronics Systems (CPES) at Virginia Tech. His current research interests include operation, advanced hierarchical and cooperative control, optimization and energy management applied to distributed generation in AC and DC microgrids. He has authored and co-authored more than 100 technical papers only in Microgrids where 60 of them are published in international IEEE journals. Dr. Vasquez is currently a member of the IEC System Evaluation Group SEG4 on LVDC Distribution and Safety for use in Developed and Developing Economies, the Renewable Energy Systems Technical Committee TC-RES in IEEE Industrial Electronics, PELS, IAS, and PES Societies.

Carsten Michaelsen Seniger was born in Pandrup, Denmark, in 1968. He obtained a B.Sc.E.E. degree in Electronic Engineering from Sønderborg Teknikum, Denmark in 1996. Carsten Michaelsen Seniger has since then been working with power electronics at Servodan A/S in Sønderborg, C programming at Shima

and R&D Engineering at former Thrane & Thrane in Aalborg. In 2009 Carsten Michaelsen Seniger moved from Aalborg to Kolding for a job at APC Schneider as a Platform Engineer. Carsten Michaelsen Seniger is now working as a R&D engineer at the UPS company Leaneco A/S in Kolding.