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Electric Power Systems Research 108 (2014) 245– 253

Contents lists available at ScienceDirect

Electric Power Systems Research

jou rn al hom e page: www.elsev ier .com/ locate /epsr

step-dynamic voltage regulator based on cascaded reduced-powereries transformers

.E.C. Britoa, L.R. Limongib, M.C. Cavalcantib,∗, F.A.S. Nevesb, G.M.S. Azevedob

Companhia Energetica de Pernambuco (CELPE), Recife, BrazilFederal University of Pernambuco, Department of Electrical Engineering, Recife, Brazil

r t i c l e i n f o

rticle history:eceived 16 April 2013eceived in revised form2 November 2013

a b s t r a c t

The large number of computers and other sensitive electrical loads connected to power grid are directlyaffected by grid disturbances. The vast majority of these disturbances is related with voltage transients,such as voltage sags. This paper deals with a step-dynamic voltage regulator designed to protect the

ccepted 26 November 2013vailable online 20 December 2013

eywords:ower qualitytep voltage regulator

load against the effects of these voltage transients. The ideia is to use a simple structure based on theinsertion of a cascaded reduced-power series transformers between grid and load. It makes possiblethe use of actual mains voltages to compensate and mitigate the disturbances. It will be shown thatthe proposed solution can fully compensate or mitigate the faults that occur more frequently in powersystems. Experimental results obtained on a 5 kVA prototype demonstrate the feasibility of the proposedsolution.

. Introduction

The short-duration voltage variations are the most frequent andignificant disturbances present in the power grid and they areargely responsible for unplanned shutdowns in industry. It is oftenaused by system faults, switching of large loads which require hightarting currents, or intermittent loose connections in power wiring1]. Depending on the location and the system conditions, the faultan cause temporary voltage rises (swells), voltage dips (sags), or

complete loss of voltage (interruptions) [1,2]. The vast majority92–98%) of these disturbances are voltage sags [3] and power util-ties have faced an increasing number of occurrences related to it4,5]. The large number of computers and other electrical loads con-ected to power grid are at the heart of the problem [6]. The controlf large industrial processes is performed by computers that usuallyresent malfunction during a failure in the power system. There-ore, a voltage sag has a considerable impact on production, sincehe time expended to perform a complete restart of the processfter a system fault is usually long [1].

The dynamic voltage restorer (DVR) is a device designed withhe primary function to compensate voltage sags and swells [7–9].owever it can also be designed to perform additional features

uch as reducing the transient voltages as well as voltage har-onics, protecting sensitive loads from unexpected shutdowns andalfunction due to power quality degradation produced by these

∗ Corresponding author. Tel.: +55 81 21267102.E-mail address: marcelo.cavalcanti@ufpe.br (M.C. Cavalcanti).

378-7796/$ – see front matter © 2013 Elsevier B.V. All rights reserved.ttp://dx.doi.org/10.1016/j.epsr.2013.11.024

© 2013 Elsevier B.V. All rights reserved.

phenomena. The traditional scheme of a DVR consists of an inverterconnected in series to the grid through a coupling transformer asshown in Fig. 1 [9]. So, hereinafter it will be called inverter-basedDVR. During the disturbance, the inverter-based DVR injects thecompensation voltages in real time, protecting the load against fail-ure. There are several derivations of this topology proposed in theliterature [9–15]. In Ref. [9], an arbitrary type of energy storage isused to feed the dc link. In Ref. [10], the active power to compensatethe voltage sag is taken from the incoming supply through a passiveshunt converter connected to the supply side. In Refs. [11–13], theinverter-based DVR is implemented using multilevel converters.These topologies have a common characteristic: they are relativelyexpensive systems because of the inverter that includes energystorage elements and power switches.

On the other hand, a great effort has been made to reduce costs.In Ref. [16], it has been presented a inverter-based DVR based ondirect converters without energy storage elements. Another alter-native based on a single-phase direct ac/ac converter energizedfrom the main grid is proposed in [17]. In Ref. [18], the inverter-based DVR topology allowed the use of high frequency transformerswith the benefit of reducing size, weight and cost of the wholestructure. Nevertheless, these topologies are still based on complexpower switches systems and powerful computational platforms.This is because most inverter-based DVR topologies are designedto compensate the voltage sag in a small fraction of a voltage cycle.

However, taking a careful look at the Computer Business EquipmentManufactures Association (CBEMA) and Information TechnologyIndustry Council (ITIC) curves, that establish the susceptibility lev-els of the sensitive electronic equipment [1,19], it is possible to

246 M.E.C. Brito et al. / Electric Power System

nsvtact

oam[wiaAci

Fig. 1. Traditional inverter-based DVR topology.

ote that the transient response does not need to be as fast as thetate-of-art DVRs are. The same assumption is also valid for theoltage compensation limits. In other words, it is possible to choosehe inverter-based DVR compensation limits nearer to the CBEMAnd ITIC curves and still protect the sensitive load. Therefore, theseharacteristics can be exploited to obtain an alternative in termsopology.

Some topologies known as dynamic voltage regulators, basedn electromagnetic devices, were proposed more than two decadesgo. In general, these proposals are very simple in terms of imple-entation needs but present some important drawbacks. In Ref.

20], thyristors are used to deliver a voltage waveform to the loadhich is in quadrature with the grid phase voltage. The result-

ng load voltage is then distorted by the compensating device

nd it cannot be used as a steady-state compensation device.nother scheme was presented in [21] through the use of thyristor-ontrolled multi-tap transformers, similar to the topology shownn Fig. 2. However, the voltage regulator has some drawbacks that

Fig. 2. Voltage regulator.

s Research 108 (2014) 245– 253

do not allow its utilization to compensate sags: the need to passthrough intermediate stages, i.e., it is not possible to go from tap1 to tap 3 without passing through tap 2, making the equipmenttoo slow for complying with the current grid codes; the numberof bidirectional switches to be used must be equal to the numberof steps of the compensating device; all switches must have fullcurrent conduction capability.

A low cost topology can be achieved through a step-dynamicvoltage regulator (S-DVR) that uses the actual mains voltages tocompensate and mitigate the disturbances [23–32]. Therefore, it isnot necessary to use inverter systems and energy storage elementsto synthesize a sinusoidal voltage making the solution very simplein terms of implementation. This topology has been originally pro-posed by the authors in [33,34], with the main focus in the costsanalysis of the proposed scheme using thyristors devices.

Related to the previous versions [33,34], the main contribu-tion of this paper is the presentation of experimental validationof the proposed topology. This is important in order to show thatequipment time response is short enough to comply with CBEMAand ITIC curves [1,19]. In the previous papers, there were onlysome results related to the control board performance with notest bench. Furthermore, this work presents some design aspectsregarding the transformers and switches of the proposed topology;and a cost comparison considering the proposed topology (usingbidirectional switches) and the inverter-based DVR. In order toavoid using market-dependent values, the components have beencharacterized by the power handled by them. After a thorough bib-liographical research, it can be stated that although being simplethe proposed topology is innovative and has a good potential forbeing accepted in industry due to its good performance and lowcost.

2. Voltage sags and equipment susceptibilityconsiderations

Most of the voltage sags are caused by short-circuit faults manyof them last only a few tens or hundreds of milliseconds andare unbalanced (i.e., involve a negative-sequence component [3]).When a fault occurs at some point in the power system, the voltagedrops until a protection trips to clear this fault. During this interval,all loads that are connected at the faulted feeder will be subjectedto a voltage sag.

The five types voltage sags that can commonly be experiencedare A, B (one-phase sag, no phase shift), C, D and E (two-phase sag,no phase shift). For type A voltage sags, the three-phase voltagesare balanced, while the phase voltages are unbalanced for type Cor D voltage sags, as shown in Fig. 3. The type A voltage sag is pro-duced by a three-phase fault, and it is characterized by the samevoltage drop in all three phases. The type D voltage sag appearson the secondary side of a distribution transformer with delta/wyeconnection and having its primary side subjected to a phase-to-phase fault. A type C voltage dip may occur in any of the followingtwo situations: (1) a phase-to-phase fault at the transformersecondary side or (2) a single-line-to-ground fault in the trans-former primary side (seen as phase-to-phase fault at the secondaryside).

There are many international standards that classify the voltagesags, such as IEEE 1159 [2], which defines voltage sags as eventsthat have duration shorter than one minute during which the rmsvoltage is lower than 0.9 p.u. Although the standard sets limits, itdoes not address the susceptibility levels for the sensitive electronic

equipment. However, some consensual curves do exist like CBEMAand ITIC [1,19,22] which establish voltage limits for the safe oper-ation of industrial equipment. Based on the ITIC curve shown inFig. 4 some considerations can be made:

M.E.C. Brito et al. / Electric Power Systems Research 108 (2014) 245– 253 247

Fa

•

•

ivv

Applicable to 120, 120/208, and120/240 Nominal Voltages

Voltage ToleranceEnvelope

0

40

708090100110120

140

200

300

400

500

in series with the load. In addition, this scheme provides only twopossible compensation voltages (positive or negative) which aredefinitely not enough if the goal is to compensate a wide range

ig. 3. Phase voltage phasors before (dotted) and during (solid) sags of types A, Cnd D.

A general device to mitigate the sag does not need a responsetime shorter than one cycle for voltage sags.Voltage variations up to 10% are tolerable and do not demand anycorrective action.

Another important aspect to take into account is that the major-ty (92–98%) of short-duration voltage variation disturbances areoltage sags with a residual voltage of at least 0.7 p.u [4]. In case ofoltage swells, 75% of the events have a maximum voltage of 120%

0.001c 0.01c 0.1c 0.5c 1c 10c 100c 1000c

Fig. 4. ITIC curve for susceptibility.

of the rated voltage [5]. Looking at the ITIC curves, it can also be seenthat a voltage compensator topology does not need a fast responsetime (less than a half cycle) in case of voltage swells. Therefore, it ispossible and convenient to design a topology that meets these char-acteristics without using elements like energy storage or invertersystems, decreasing the costs associated with the entire system.

3. Proposed step-dynamic voltage regulator

The proposed S-DVR principle, based on the voltage regulatorin Fig. 2, is shown in Fig. 5. The proposed topology uses the trans-former Ts connected in series with the load so that its secondaryvoltage is added with the grid voltage to compensate the disturb-ance. Its power is taken from the incoming supply through thetransformer TP. The switches Sa and Sb must have complemen-tary states and are used to select the polarity of the voltage tobe applied to the series transformer Ts with respect to the supplyvoltage, making possible to compensate sags and swells. It shouldbe noted that during normal operation the series transformer pri-mary winding must be short-circuited (with Stb), otherwise thehigh transformer magnetization impedance would be connected

Fig. 5. S-DVR operating principle.

248 M.E.C. Brito et al. / Electric Power System

odIesis

iriFtSdrOto

8dstf(

Stl

v

Fig. 6. Proposed S-DVR (single-phase scheme).

f sags and swells. These compensation voltages are completelyetermined by the transformers turn-ratios and the switches states.

n order to allow compensating sags or swells with several differ-nt levels, the number of series transformers can be increased ashown in Fig. 6. This scheme has been drawn using bipolar switchesn order to put in evidence the relationship between the switchtates.

The practical implementation of the bipolar switches in Fig. 6s made as follows: each bipolar switch is composed of two bidi-ectional switches. The individual bidirectional switches may bemplemented using a diode bridge and one IGBT as shown inig. 7 or using two thyristors connected in antiparallel. Ideally,he bidirectional switch Sta should close at the same instant whentb opens and vice-versa. A snubber circuit must be carefullyesigned in order to avoid switches overvoltage due to inter-upting inductive current (during undesired switches dead-time).vercurrent could also happen due to short-circuit if both bidirec-

ional switches remain closed during a too long non-intentionalverlap-time.

The turn ratios of the transformers Ts1, Ts2 and Ts3 are 2:1, 4:1 and:1 respectively. Based on this fact, it is possible to obtain 2n+1 − 1ifferent S-DVR voltage compensation levels through the properwitching of St1, St2, St3 and Sab, where n is the number of the seriesransformers. Note that a small increase in the number of trans-ormers results in a large increment in the number of possible statesdifferent voltage levels).

The load voltage is equal to the source voltage vsource plus the-DVR voltage (i. e., the sum of the secondary voltages of the seriesransformers). Considering ideal transformers and switches, theoad voltage can be computed as:

load = vsource + (vts1s + vts2s + vts3s), (1)

D1

D2

D3

D4

RS

CSSt

Fig. 7. Bidirectional switch with IGBT and snubber in bridge configuration.

s Research 108 (2014) 245– 253

and

vts1s = vtpsSabSt1

Nts1

vts2s = vtpsSabSt2

Nts2.

vts3s = vtpsSabSt3

Nts3

(2)

where voltage vtps is the secondary voltage of transformer TP, Ntsx

for x = 1, 2, 3 are the turn-ratios of the series transformers, Stx forx = 1, 2, 3 represent the bipolar switches states (Stx = 0 means thetransformer short circuit, that is, the switch Stx is in position 2,otherwise Stx = 1, which means switch Stx is in position (1) and Sabis equal to 1 or −1. Since the turn-ratios are Nts1 = 2, Nts2 = 4 andNts3 = 8, the following relation can be reached:

Nts3 = 4Nts1

Nts3 = 2Nts2.(3)

Using (2) and (3) in (1), and knowing that vtps = vsource/Ntp,where Ntp is the turn ratio of parallel transformer, the followingexpression can be achieved:

vload = vsource

[1 + Sab(4St1 + 2St2 + St3)

(NtpNts3)

]. (4)

Analyzing (4), it can be concluded that the S-DVR voltagedepends only on the switches states and on the available sourcevoltage, making the device operation very simple.

To illustrate the S-DVR operation suppose that the supply volt-age is 80 V, instead of 100 V (rated value, that is, reference loadvoltage v∗

load). The S-DVR control system must determine the nec-

essary switches states in order to compensate the voltage sag. Sincean additive compensation is needed, Sab must be equal to one.Observing Fig. 6, NtpNts3=16, then using (4):

(4St1 + 2St2 + St3) = (v∗load

− vsource)NtpNts3

vsource= 4. (5)

Converting (5) to the binary system results: 410 = 1002. Theswitches states should then be St1 = 1, St2 = 0 and St3 = 0. The S-DVR voltage is an integer multiple of vsource/(Nts3Ntp). If a bettervoltage resolution is required, more states are necessary and thenumber of transformers must be increased for the same maximumvoltage sag compensation capability. Note that the series trans-former secondary current is the same that circulates through theload. However, the transformers secondary voltages are different,meaning they have different rated power. In Fig. 6, the Ts3 ratedpower is the half of Ts2 and so on. Another important aspect relatedto the device design is the fact that the primary currents of Ts1,Ts2 and Ts3 have different values because they have different turn-ratios with the same secondary current (load current) and the samerated primary voltage (equal to the secondary voltage of TP). As aconsequence, switches with different current capabilities can beused to reduce the cost.

In the case of increasing the number of transformers, (4) can begeneralized:

vload = vsource

[1 + Sab

NtpNtsn

(n∑

i=1

2i−1St(n−i+1)

)]. (6)

As an alternative solution, all series transformers could besubstituted by a single transformer with the secondary winding

connected in series with the load and the primary winding hav-ing multiple taps, one for each possible secondary voltage to beinjected. However, this would come at the expense of increasingthe number of switches.

System

4

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4

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V

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M.E.C. Brito et al. / Electric Power

. S-DVR design

The shunt and series transformers as well as the bidirectionalwitches play a very important role in the proposed S-DVR. Theudicious selection of these components is very important for min-mizing the S-DVR cost. Additionally, it is possible to see how theransformers parameters influence the S-DVR performance. There-ore, this section is devoted to presenting the S-DVR componentsatings and evaluating the effects of their parameters in the S-DVRerformance.

.1. Design of series transformers and their losses

For proper operation of the S-DVR, the transformer voltagesust not be higher than the rated values in order to avoid sat-

ration, which would increase the losses and compromise theerformance. On the other hand, overrating the transformers vol-ages directly impacts the cost of the S-DVR. In a conventionalnverter-based DVR (Fig. 1) designed for compensating voltageags/swells, as well as unbalance and harmonic components ofhe source voltages, the series transformers must be designed sohat these voltage components do not cause magnetic saturationn the worst possible case. According to [35], this can be accom-lished if the inverter-based DVR secondary rated voltage of theeries transformer is selected according to

s ≥ V1 +N∑

h=2

Vh

h, (7)

here V1 and Vh are the rms values of the maximum fundamental-requency, hth harmonic voltages to be injected by the transformernd N is the higher harmonic component considered. For this rea-on, the secondary rated voltage of the series transformer of aonventional inverter-based DVR typically reaches values around0% above the maximum voltage sag to be compensated.

In the proposed S-DVR shown in Fig. 6, there are several seriesransformers. The primary voltages of any of these transformers arequal to the secondary voltage Vtps of the shunt transformer. Thems secondary voltages considering n series transformers are equalo Vtps/2, Vtps/4, . . ., Vtps|/2n where Vtps/2n is the lowest voltage stephat can be produced by the S-DVR. In this case, the maximum rmsoltage to be injected by the transformers is

ts1s + Vts2s + · · · + Vtsxs + · · · + Vtsns = 2n − 12n

Vtps, (8)

here n is the number of series transformers. The primary sides oferies transformers in the S-DVR of Fig. 6 are connected to the sec-ndary side of the shunt transformer. Therefore they are subject tohe same harmonic components of the grid voltages. Furthermore,ifferently from inverter-based DVR’s, the series transformers ofhe proposed S-DVR are not subject to high order voltage harmon-cs due to switching. Nevertheless, all other harmonic components

ust be taken into consideration and the rated values of the seriesransformers secondary voltages should be selected according to:

tsxs ≥ Vtps1

2x+

N∑h=2

Vtpsh

2xh, (9)

here x indicates which series transformer is under consideration.ince the load current flows through the secondary winding of theeries transformer, its nominal current should be specified basedn the same criteria used for the inverter-based DVR current rat-

ng. In other words, the harmonic components of the load current

ust be taken into consideration. As a conclusion, a S-DVR and anverter-based DVR designed for the same load and with capacityf compensating voltage sags or swells with the same magnitude

s Research 108 (2014) 245– 253 249

need series transformers with the same rated current. In addition,the sum of the secondary rated voltages of all series transformers ofthe proposed S-DVR is approximately equal to the secondary ratedvoltage of the series transformer of the inverter-based DVR. Also,it can be assumed that the losses in the series transformers of theproposed S-DVR and inverter-based DVR’s are also similar. The corelosses are negligible, since the series transformers remain short cir-cuited most of the time, while the copper losses are associated tothe load current and windings resistances.

4.2. Design of shunt transformers and their losses

The shunt transformer primary winding is directly connected tothe grid and is therefore subject to its harmonic content. Thus, foravoiding saturation of this transformer, this voltage should be ratedaccording to (7). However, the shunt transformer of the inverter-based DVR secondary circuit remains open, except during a voltagesag or swell. Thus, its rated current can be determined based on thetransformer thermal damage curve. Typically, a transformer can besubject to a current above 10 p.u. for more than 10 s. Then the sec-ondary rated current of the shunt transformer of a S-DVR can bechosen as 10% of the maximum current required by the secondarycircuits of all series transformers. Consequently, the shunt trans-former rated power can be equal to 10% of the sum of the powersof the series transformers. The core losses in the shunt transformerof the proposed S-DVR, caused mainly by eddy currents and hys-teresis, are dictated by the grid rms voltage and the characteristicsof the core material. On the other hand, the copper losses are neg-ligible, due to the no load operation except when a fault in the gridoccurs.

4.3. Design of bidirectional switches

The set of bidirectional switches in the proposed S-DVR is shownin Fig. 6. The maximum voltage and current in the bidirectionalswitches are computed considering the peak voltage between ter-minals “1” and “2” and the repetitive peak current conducted interminal “3”. Note that the series transformer secondary currentsare equal to iload and their primary currents are the same which cir-culate in switches St1, St2 and St3. Based on this fact, the repetitivepeak currents in Stx, where x ∈ {1, 2, 3, . . ., n}, are equal to:

IStx = Iload

2x, (10)

where the hat symbol stands for peak value and n is the number ofseries transformer used. The maximum voltages in St1, St2 and St3are equal to Vtps.

Coming to switch Sab, the repetitive peak current is given by:

ISab=

n∑x=1

Iload

2x= 2n − 1

2nIload. (11)

The maximum voltage in switch Sab is also equal to Vtps.

5. S-DVR and inverter-based DVR costs

The transformers and switches of an S-DVR and an inverter-based DVR both capable of compensating a 50% voltage sag, arecompared in this section. In order to avoid using market-dependentvalues, the components are characterized by the power handled bythem, i.e., by the product of their rated voltages and currents. Aninverter-based DVR capable of compensating single-phase faults

needs an inverter with four legs and eight switches (or three single-phase full bridge inverters). Considering that the turns ratio of theseries transformer is 1:1, the maximum voltage and current of eachof these switches are the dc bus voltage Vdc and the peak value of the

250 M.E.C. Brito et al. / Electric Power Systems Research 108 (2014) 245– 253

e of t

lote

S

Tt

S

ItstAtc

hta(p

S

Tai

S

IsetcsicOts

6

s

Fig. 8. Control schem

oad current Iload, respectively, as shown in Fig. 1. At the beginningf the voltage sag, the dc bus voltage is equal to the peak value ofhe phase-to-phase rated voltage VLL . Thus, the power handled byach of the eight inverter switches is

sw = VLLIload. (12)

he total power handled by the inverter-based DVR is then equalo

sw−DVR = 8VLLIload. (13)

t is worth to point out that the power losses depend on the commu-ation frequency and the saturation voltage, that are mainly due toemiconductor device characteristics. Therefore, if the commuta-ion losses are considered, the total system power losses increase.n important advantage of the proposed S-DVR topology is that

he commutation losses are nearly null, resulting in the operationalosts reduction.

Coming to the S-DVR topology presented in Fig. 6, the powerandled by the bidirectional switches for selecting the seriesransformers that should contribute for the voltage compensationre SSt1 = (VLL/2

√3)(Iload/2), SSt2 = (VLL/2

√3)(Iload/22) and SSt3 =

VLL/2√

3)(Iload/23), while for the bidirectional switches Sab thatower is

Sab= VLL√

3

3∑x=1

Iload

2x= 7

8√

3VLLIload. (14)

he total power handled by the 24 switches of the S-DVR is thenpproximately equal to 56% of the total power handled by thenverter-based DVR switches:

sw-S-DVR = 3[2SSt1 + 2SSt2 + 2SSt3 + 2Sab] � 4.5VLLIload. (15)

n order to ensure the same compensation capability, the sum of theecondary voltages of the series transformers of the S-DVR must bequal to the secondary voltage of the inverter-based DVR seriesransformer. Of course these windings are all subject to the loadurrent. One can conclude then that power handled by the set oferies transformers in an S-DVR is equal to that of the conventionalnverter-based DVR series transformer. In the S-DVR, 10% of extraost must be considered due to the need of the shunt transformer.n the other hand, the inverter-based DVR needs the capacitor of

he dc bus and the LC or LCL filter for connecting the inverter to theeries transformers.

. Control scheme for the proposed S-DVR

The control block diagram for the single-phase S-DVR of Fig. 6 ishown in Fig. 8. The control action can be summarized as follows:

he proposed S-DVR.

1 The rms voltage is computed from the measured load voltagevload (using only half cycle signal) and compared to the referencev∗

load.

2 The percent voltage deviation ı is obtained from the voltage errorsignal ε divided by v∗

load.

3 The absolute value of ı, |ı|, is compared with the maximum tol-erable voltage deviation value %v. If ı is lower than the tolerancevalue %v, the S-DVR does not take any action (k = 0). On the otherhand, if |ı| is higher than this tolerance value, the parameter kis equal to 1 and the percent voltage deviation ı is divided bythe input parameter p (lowest percent secondary voltage of theseries transformers), resulting in the continuous quantity x.

4 The result x is rounded to the nearest integer number y.5 The variable y is the input of an accumulator updated with a rate

of 1/120 s (half cycle). This is the control action rate in the S-DVR.This accumulator saturates at 7 (1112 in binary notation). Thisis due to the nature of the S-DVR that has a set of 3 switches tobe controlled (St1, St2 and St3). Therefore, the states St1, St2 andSt3 are computed converting the absolute value of � to a binaryrepresentation, with St3 corresponding to the least significant bitand St1 to the most significant bit.

6 The value of Sab can be determined from �, being 1 when � isgreater than zero (which means the S-DVR is injecting a positivevoltage), and −1 when � is less than zero (in this case the S-DVRis injecting a negative voltage).

7. Experimental results

A 5 kVA three-phase prototype has been built using three single-phase S-DVR units like that in Fig. 6. The general diagram of theexperimental setup is shown in Fig. 9. A general view of the exper-imental test bench is presented in Fig. 10.

The hardware platform used to implement the S-DVR controlalgorithm is a floating point TMS320F28335 digital signal proces-sor, connected to a microcomputer through an isolated J-tag device.The control sampling frequency has been set at 10 kHz and thequantities measured from the system are the line-to-neutral sup-ply voltages van, vbn and vcn. The control output was implementedusing the general purpose input/output pins of the digital signalprocessor.

The first test has been performed in order to demonstrate theS-DVR operation limits. The phase-to-neutral rms reference volt-age is maintained equal to 220 V while the supply voltage variesaccording to trace 1 in Fig. 11. Five vertical line segments are usedto indicate instants when the operation condition changes. From

instant “1” to instant “2” the S-DVR injected voltage is maximum:Sab = 1, St1 = 1, St2 = 1 and St3 = 1. However, this compensation volt-age is not enough to maintain the load voltage on the rated value(220 V). The oscillation in the load voltage from “2” until “3” shows

M.E.C. Brito et al. / Electric Power Systems Research 108 (2014) 245– 253 251

Fig. 9. Experiment setup of the three-phase S-DVR.

Fig. 10. General view of the experimental test bench.

Fig. 11. Source and load voltages (3 s/div): trace 1, rms source voltage (50 V/div);trace 2, rms load voltage (50 V/div).

the S-DVR switches commutation due to the changes in the supplyvoltage in order to maintain the load voltage at the rated voltagelevel. In the time interval from “3” to “4”, the source voltage remainsconstant at 350V and there is no switch commutation. During theinterval “4” to “5” the source voltage decreases and the S-DVR hasto adjust its switches states again. After instant “5”, it cannot com-pensate the voltage sag and the load voltage is lower than the ratedvoltage. It is important to mention that although the number oflevels is equal to compensate sags and swells, the available abso-lute compensation voltage depends on the remaining grid voltageacross the parallel transformer (TP in Fig. 6) that is used to per-form the compensation. During the sag, the available grid voltageis lower than the rated value in such a way that the compensationcapability decreases. On the other hand, during the swell, the avail-able grid voltage is higher than the rated value in such a way thatthe compensation capability increases. This is the reason for the

sag compensation capability is lower than the swell compensationcapability (instants 2 and 3, respectively in Fig. 11).

The S-DVR transient response during a single-phase voltage sagof 77% (maximum compensation capability per phase) is shown in

252 M.E.C. Brito et al. / Electric Power Systems Research 108 (2014) 245– 253

Fig. 12. S-DVR transient response during a single-phase voltage sag (100 V/div, 20 ms/div): traces van , vbn and vcn , source voltages; traces vLan , vLbn and vLcn , load voltages.

F2v

Fh

saatTssv

pUodvc

ig. 13. S-DVR transient response during a three-phase voltage sag (100 V/div,0 ms/div): traces van , vbn and vcn , source voltages; traces vLan , vLbn and vLcn , loadoltages.

ig. 12. In this situation, the voltage sag is compensated in aboutalf cycle.

The response to a three-phase voltage sag (type A) of 77% ishown in Fig. 13. Again, the compensation time is around half cyclend the response is similar to that observed in the single-phase volt-ge sag. This is due to the particular S-DVR characteristic of havinghree identical structures in each phase working independently.he main drawback of this structure is not being able to compen-ate phase shifts. The steady state result for a voltage sag type C ishown in Fig. 14. It can be seen that the S-DVR compensates theoltage level, however, phases b and c remain shifted.

It should be pointed out that the proposed S-DVR is able to com-ensate the majority of voltage disturbances in a power system.sing data from 22,035 events of short-duration voltage variations

btained in 222 monitoring points of an electrical utility companyuring two years [5], it was verified that more than 92% of theoltage variations could be mitigated by the proposed S-DVR, notausing harm to the consumers.

Fig. 14. S-DVR steady state response during a voltage sag type C (100 V/div,5 ms/div): traces van , vbn and vcn , source voltages; traces vLan , vLbn and vLcn , loadvoltages.

It is important to cite that around 88% were voltage sags (mostof them were single-phase sags), 8% were voltage swells and 4%were voltage supply interruptions. In 95% of the voltage swells,the remaining voltages were below 1.69 pu, then they could bemitigated by the proposed S-DVR.

8. Conclusions

This paper deals with a S-DVR topology using only a set oftransformers and bidirectional switches to compensate voltagesags and swells. The proposed topology is very attractive becausethe classical inverter-based DVR has not been used in power sys-tems applications due to the high cost of its components. Aftera very detailed discussing about the transformers and switches

design, it was shown that although the number of transformersused is higher, the total power of these transformers is similar tothat of the transformers used in the inverter-based DVR. Further-more, the total power handled by the switches in the proposed

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-DVR topology is about 62.5% of the total power of the inverter-ased DVR switches. The dc bus capacitor and LC/LCL filter in the

nverter-based DVR has not been considered in the cost analysis.his consideration would increase the advantage of the proposedopology in comparison with the inverter-based DVR.

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