A CMOS Low Voltage Folded Cascode LNA for Wideband Applications
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A CMOS Low Voltage Folded Cascode LNA for Wideband Applications S. Rosino-Rincon, D. Ramos-Valido, H. García-Vázquez, R. Pulido Medina, Sunil L. Khemchandani and J. del Pino Institute for Applied Microelectronics (IUMA), Departamento de Ingeniería Electrónica y Automática, Universidad de Las Palmas de Gran Canaria, Spain Published in XXVII Design of Circuits and Integrated Systems Conference. Aviñon, Francia, 2012. Low-voltage CMOS wideband LNA can be efficiently implemented using folded cascode topology. A comparison was made between a conventional cascode amplifier working at 3.6 V and the new low-voltage amplifier working at 1.8 V. The comparison showed that the low-voltage amplifier preformed within the same specifications of the conventional cascode for the same operating conditions of the corresponding transistors. Conclusions 0 Circuits Design Simulations INSTITUTO UNIVERSITARIO DE MICROELECTRÓNICA APLICADA (IUMA) UNIVERSIDAD DE LAS PALMAS DE GRAN CANARIA (ULPGC) Abstract A CMOS Low Noise Amplifier to achieve low-voltage and wide-bandwidth operation is presented. This circuit is based on folded cascode topology combined with wideband impedance matching and shunt peaking load. Two low noise amplifiers have been designed using a mature 0.18 μm CMOS technology, one using the cascode conventional approach and the other using the proposed topology. Simulation results show that for the same transistors operating conditions, the low-voltage amplifier performance is similar than the conventional cascode. This work is partially supported by the Spanish Ministry of Science and Innovation (TEC2008-06881-C03-01 and TEC2011-28724-C03-02) and the Spanish Ministry of Industry, Tourism and Trade (TSI-020400-2010-55). Acknowledgement Figure 2 Simplified schematic of the folded cascode LNA with wideband impedance matching. Figure 4. S11 and S21. Figure 6. 1 dB compression point for cascode LNA. Figure 5. Noise figure. Figure 7. 1 dB compression point for folded cascode LNA. Figure 1 Simplified schematic of a CMOS folded cascode LNA. Figure 3 Layout of the two UWB LNAs: (a) Cascode (b) Folded Cascode. Layout
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Transcript of A CMOS Low Voltage Folded Cascode LNA for Wideband Applications
A CMOS Low Voltage Folded Cascode LNA forWideband Applications
S. Rosino-Rincon, D. Ramos-Valido, H. García-Vázquez, R. Pulido Medina, Sunil L. Khemchandani and J. del Pino
Institute for Applied Microelectronics (IUMA), Departamento de Ingeniería Electrónica y Automática, Universidad de Las Palmas de Gran Canaria, Spain
Published in XXVII Design of Circuits and Integrated Systems Conference.
Aviñon, Francia, 2012.
Low-voltage CMOS wideband LNA can be efficiently implemented using folded cascode topology. A comparison was made between a conventional cascode amplifier working at 3.6 V and the new low-voltage amplifier working at 1.8 V.
The comparison showed that the low-voltage amplifier preformed within the same specifications of the conventional cascode for the same operating conditions of the corresponding transistors.
Conclusions
0
Circuits Design
Simulations
INSTITUTO UNIVERSITARIO DE MICROELECTRÓNICA APLICADA (IUMA) UNIVERSIDAD DE LAS PALMAS DE GRAN CANARIA (ULPGC)
AbstractA CMOS Low Noise Amplifier to achieve low-voltage and wide-bandwidth operation is presented. This circuit is based on folded cascode topology combined with wideband impedance matching and shunt peaking load. Two low noise amplifiers have been designed using a mature 0.18 μm CMOS technology, one using the cascode conventional approach and the other using the proposed topology. Simulation results show that for the sametransistors operating conditions, the low-voltage amplifier performance is similar than the conventional cascode.
This work is partially supported by the Spanish Ministry of Science and Innovation (TEC2008-06881-C03-01 and TEC2011-28724-C03-02) and the Spanish Ministry of Industry, Tourism and Trade (TSI-020400-2010-55).
Acknowledgement
Figure 2 Simplified schematic of the folded cascode LNA with wideband impedance matching.
Figure 4. S11 and S21.
Figure 6. 1 dB compression point for cascode LNA.
Figure 5. Noise figure.
Figure 7. 1 dB compression point for folded cascode LNA.
Figure 1 Simplified schematic of a CMOS folded cascode LNA.Figure 3 Layout of the two UWB LNAs: (a) Cascode (b) Folded Cascode.
Layout
