Reference PFE : GE 05

A BI-DIRECTIONAL DC/DC CONVERTER FOR THE DUAL 42/14V AUTOMOTIVE SYSTEM.

Final Year Research Project Report

Carried out by Ensigns

J.Fraigneaud and H.Miranda

Class of 2011

A bi-directional DC/DC converter for the dual 42/14V automotive system.

PFE reference : GE05

Students : Ens. J.Fraigneaud and H.Miranda, EN 2011

Report : Final Year Research Project

University : Federal University of Santa Catarina (U.F.S.C)

Project Supervisor : Ivo Barbi, Professor of Power Electronics Engineering at UFSC

ABSTRACT

The objectives of this project are to perform a complete analysis and design of a bi-directional DC/DC converter for the dual 42/14V automotive system. The converter studied is a completely new topology and in case of success may pave the way for a new branch of power electronics. To achieve these tasks, a preliminary study of the basics of converters (buck, boost and buck-boost) is necessary, before the study of our hybrid bi-directional converter. The core of the proposed research is to select and build the most relevant components for the converter. This is achieved through a comprehensive simulation of the converter: using PSIM and Mathcad in order to infer waveforms and numerical values needed for a thorough understanding. Then, the integration of a control loop with a current feedback will permit an automatic control of the converter’s parameters.

The final aim of this study will be to implement and test a prototype in the laboratory to validate the theoretical study.

RESUME

Ce projet a pour but l’étude et la réalisation complète d’un prototype de convertisseur bidirectionnel à courant continu adapté au système 42/14-V des automobiles. Ce convertisseur adopte une toute nouvelle topologie encore jamais étudiée et pourra donc, en cas de succès, ouvrir de nouvelles perspectives d’études dans le domaine de l’électronique de puissance. Le travail préliminaire sera constitué d’une étude qualitative et quantitative du convertisseur: compréhension des étapes de fonctionnement et déduction des principales équations. Ensuite nous implémenterons une simulation complète du convertisseur dans le logiciel PSIM afin de déduire les formes d’onde à obtenir et les valeurs numériques nécessaires à la sélection des composants du prototype. Nous ajouterons également une boucle de contrôle en courant afin d’asservir le convertisseur. Enfin le convertisseur sera testé en laboratoire afin de valider l’étude théorique.

Keywords : Bi-directionnal DC/DC converter, inductor, MOSFETS.

Acknowledgements

First, we want to thanks Dr. Franck Scuiller who found the contact in the INEP and allowed us to study in Brazil.

Considering that this project was done in shared supervision, a few people have participated to its accomplishment. The scientific research work was done in the department of Power Electronics of the Federal University of Santa Catarina in Florianopolis, Brazil.

Our very deep gratitude goes to our supervisor at the Federal University of Santa Catarina, namely Professor Ivo Barbi, for his guidance and support all along the project. Special thanks go to our co-supervisors, Professor Gierri Waltrich and M.Sc. Daniel Flores Cortez, for their patience, their assistance and the research time spent to help us.

We wish to very warmly thank all the workers in the Power Electronics Department (INEP), who gave us support during this work and helped us each time we needed.

We are very grateful to Adj. Alcino Ferreira, for his advice and for his support in improving the English of this report.

A special thanks goes to Lt Cdr Clad, military supervisor in the French Naval Academy, for proofreading our report.

Finally, our many thanks go to Mr Luiz Marcelius Coelho, research technician of the INEP laboratory, for his availability and his kindness in helping us on the building of the inductor and for his swiftness to build our converter.

Table of contents

LIST OF NOTATIONS ........................................................................................................................................ 1

INTRODUCTION................................................................................................................................................. 2

I. GENERALITIES ABOUT DC/DC CONVERTERS. ............................................................................................. 3 1. Unidirectional converters...................................................................................................................... 3

a) Buck converters.................................................................................................................................................. 3 b) Boost converters................................................................................................................................................. 7 c) Buck and boost converters. ................................................................................................................................ 7

2. Bidirectional Converter. ........................................................................................................................ 8 a) Bidirectional Buck Converter and Boost Converter. .......................................................................................... 9 b) Complete study of a buck bidirectional converter. ........................................................................................... 11 c) Buck and Boost Converter. .............................................................................................................................. 15

3. Switched capacitor DC/DC converter. ................................................................................................ 16 a) Buck switched DC/DC converter. .................................................................................................................... 16

II. HYBRID BIDIRECTIONAL DC/DC CONVERTER. ......................................................................................... 19 1. Steps of functioning ............................................................................................................................. 19 2. Current Control ................................................................................................................................... 22 3. Choose of the switches and heatsink.................................................................................................... 23 4. Adaptation of the converter to available components. ........................................................................ 24

III. DESIGN OF THE INDUCTOR.................................................................................................................... 27 1. Choice of the appropriate core............................................................................................................ 27 2. Number of turns and gap length .......................................................................................................... 30 3. Determination of the wire’s parameters. ............................................................................................. 31 4. Copper and magnetic losses. ............................................................................................................... 32 5. Increase in temperature....................................................................................................................... 32 6. Possibility of execution. ....................................................................................................................... 33 7. Construction and measures ................................................................................................................. 33

IV. CURRENT CONTROL.............................................................................................................................. 34 1. Current sensor. .................................................................................................................................... 34 2. Comparator. ........................................................................................................................................ 35 3. Integrated circuit. ................................................................................................................................ 36 4. Inverter. ............................................................................................................................................... 37 5. Driver .................................................................................................................................................. 38 6. Drivers power supply........................................................................................................................... 38 7. Global current control loop................................................................................................................. 39

V. TESTS OF THE LABORATORY PROTOTYPE. ................................................................................................. 39 1. Prototype problems and solutions. ...................................................................................................... 40

a) Driver set up..................................................................................................................................................... 40 b) High frequency noise. ...................................................................................................................................... 40 c) Enhancing stability and protecting UC3525..................................................................................................... 41

2. Operating stage. .................................................................................................................................. 42 a) Buck mode. ...................................................................................................................................................... 42 b) Boost mode. ..................................................................................................................................................... 43 c) Efficiency tests. ................................................................................................................................................ 43

3. Test of the Control loop. ...................................................................................................................... 45

CONCLUSION.................................................................................................................................................... 47

APPENDICES ..................................................................................................................................................... 48

BIBLIOGRAPHY ............................................................................................................................................... 54

1

List of notations

t Time s

f Frequency Hz

fs Frequency of the switches Hz

fc Cut frequency Hz

T Period s

Vout Output voltage V

Vin Input voltage V

vL Average voltage across the inductor V

Vi Voltage across component i V

II Current through component i A

IAVG Average current through component i A

IRMS Efficient current through component i A

Io Average current through the inductor (output) A

ΔIo Peak to peak value of the current to the output (Ripple current) A

ΔVo Peak to peak value of the voltage across the output (Ripple voltage) V

ton Conduction time s

toff No conduction time s

D Duty cycle No dimension

Ri Resistor i Ω

L Inductance H

Lc Critical inductance to be in Continuous conduction mode L

Ci Capacity i F

Po Power of the system W

Ptotal Total losses of the circuit W

Pcommi Commutation losses in switch i W

Pcondi Conduction losses in switch i W

tr Time of rise s

tf Time of fall s

tdon Turn on delay time s

tdoff Turn off delay time s

RDson Drain to source on resistance °C/W

RJC Junction to core thermal resistance °C/W

RCH Core to heatsink thermal resistance °C/W

RHA Heatsink to air thermal resistance °C/W

Ti Temperature into the component i °C

K Proportional gain No dimension

τ Time constant s

Average voltage in the inductor over a period V

ΔD Disturbance of the duty cycle over a period No dimension

Disturbance of the average current over a period A

2

Introduction

The automotive industry has benefited from permanent technological advances which have increased the need for more and more electric power. While electric loads on vehicles are nowadays set around 2kW, in the next few years the electrical power consumed may overcome 15kW for a combustion-engine vehicle and 40kW for an electric vehicle. This increase in energy demand is due to the massive use of electronic systems which allow more comfort and flexibility. Likewise, environmental concerns are likely to foster a continued increase of the power demand.

Therefore it will be impossible to maintain the current 14-V system and 42-V devices are being increasingly used. Some studies have shown that the 42-V system allows improving energy efficiency and minimizing losses but this major change involves many changes in electronic devices.

However, as various automotive firms possess a large stockpile of 14-V electronic devices (such as lamps, switches or fuses) it will be very expensive to completely abandon this system even if the 42-V system is more efficient than the 14-V system. This is why a transitional solution has been proposed: a dual-voltage (14-V and 42-V) architecture. The 42-V bus will supply high-power loads while the 14-V bus will apply the low-power components. Such a dual system requires the use of DC/DC converters to transform the 42-V in 14-V or conversely.

Several dual-voltage converter architectures have been proposed in recent years. The solution proposed by Dr. Ivo Barbi is a bi-directional converter formed by merging a switched capacitor converter and a conventional one. This hybrid converter should allow halving the voltage across power switches and thereby reducing commutation and conduction losses.

The aim of our study is to perform a complete design analysis of this hybrid converter. After a first part focusing on basic converters, we will carry out a qualitative and quantitative study to determine basic waveforms and equations. Then, we will design all the components needed for the implementation of the converter such as inductors and semiconductors. Afterwards, a current control circuitry will be designed to check the converter and ensure the optimal operation of the system. Finally, we will perform tests and experimentation on the laboratory prototype to validate preliminary theoretical studies.

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I. Generalities about DC/DC converters.

The aim of a DC/DC converter is to change an input DC current and voltage into a desired output DC current and voltage. The shift is accomplished thanks to different switches like a simple switch combined with diode or with MOSFET1. There are a wide variety of converters, the simplest of which are the unidirectional converters called buck converters, boost converters and buck-and-boost converters. In this chapter, the first study on unidirectional buck converters will be the most detailed to better understand the overall functioning of a converter then we will cover the analysis of the other converters more quickly.

1. Unidirectional converters.

a) Buck converters.

The buck converter as shown in Figure 1 provides an average output DC voltage inferior to the average input DC voltage (0≤ Vout ≤ Vin) while the average output current is higher than the input DC current. [b1].

Figure 1: Schematic of a buck converter.

1 A MOSFET (Metal Oxide Semi-Conductor Field-Effect Transistor) is a type of field effect transistor which enables to switch or amplify electric signals.

4

The switch S operates with a commutation period T=ton+toff. The interrupter is closed (conducting) during the interval ton and it is open during the period toff. The relation between the conduction time of

the interrupter ton and the commutation period T is called the duty cycle: D= . (0≤D≤1).

Figure 2: Average output voltage function of duty cycle.

Two modes of conduction can be achieved with this circuit; they are represented in the following schematics (Figure 3. and 4.). The differential equations result from the Kirchoffs laws.

Figure 3: Switch S ON and Diode D OFF. Figure 4: Switch S OFF and Diode D ON.

5

00.5

11.5

22.5

33.5

Iin

0

-1

1

2

3

4

ID

3.24

3.28

3.32

3.36

3.4

I(L)

0.19375 0.1938 0.19385 0.1939 0.19395 0.194Time (s)

0-20

-40

20

4060

80

VL

Figure 5: PSIM waveforms of a buck converter.

These waveforms in figure 5 can be obtained if we assume that the inductor current is always positive. If the inductor current is never zero for any period of time the converter will function in a mode called the continuous conduction mode. The continuous conduction mode is preferred to improve the efficiency and the use of semi-conductor switches and passive components.

During the continuous stage the average voltage in the inductor is equal to 0 and thanks to the

waveforms; it is possible to find a relation between the average output voltage and the input

voltage. Therefore, the term in this report will be written Vout.

Vout D Vin (1)

Relation (1) shows that the output voltage is in fact lower than the input voltage. It is easy to see here that the duty cycle D is the factor that allows us to control the value of the output voltage and more precisely as D= ton/T, it is the control of the conduction time of the switch which allows us to obtain the desired value of the output voltage. [b3].

Considering the ripple current ΔIo lower than 20% of the average current Io the following equations are valid:

The average current is:

The average and RMS current in the switch are: ;

The average and RMS current in the diode are: ;

6

The identification of the critical value of the inductor is a crucial point because it sets the frontier between the continuous and discontinuous mode.

When t=ton the inductor current is equal to: IL(ton)=

(2)

with ton=D*T and T=1/f

Equation (2) gives

The continuous mode is verified if:

ΔIo=2*Io

Therefore the inductance has to be superior to Lc= to be in a continuous mode.

The value of the capacitor C is determined thanks to the condition on the ripple voltage caused by the current ic. To limit this ripple voltage the value of the capacitance has to be superior to a certain value.

The variation of voltage in the capacitor is equal to the variation of the output voltage ΔVo:

Thus

Figure 6: Area calculation for DQ.

7

b) Boost converters.

Figure 7: Boost converter.

In a boost converter such the one ine figure 7, the output voltage is always greater than the output voltage. This converter is similar to the buck; two states of switches are possible. First, switch S is ON and diode D is OFF, the current in the inductor increases linearly: vL=Vin and Iin =Is.

The other option is when switch S is turned OFF and diode D is conducting, the inductor releases the stored energy through the diode to the output: vL=Vin-Vout and Iin=Id.

As for the buck converter the average voltage in an inductor is zero during the steady stage:

The boost converter functions in the continuous mode for L >

To limit the output voltage ripple the boost converter needs a greater filter capacitor than the buck converter because the current provided to the output RC circuit is discontinuous. When the diode is turned off it is the capacitor which provides the output current. So the capacitance has to be superior to a certain value given by the ripple voltage condition:

c) Buck and boost converters.

A buck-boost converter as shown in figure 8 combines the characteristics of the input of a buck converter and the characteristics of the output of boost converters. In this kind of converter the output voltage can be inferior to, superior to or equal to the input voltage but with a reversed polarity. The voltage source can be in both, input or output.

8

Figure 8: Buck-boost converter

When switch S is ON and diode D is OFF the current in the inductor increases. Thus, when the switch is turned OFF and the diode is conducting, it provides a passage for the inductor’s current. It is important to mention that it is the output which determines the polarity of the diode. In the steady state the average inductor voltage is zero:

The value of the inductor which allows the continuous mode is:

The value of the capacitance is the same as that of a boost converter because the output structure is the same for both except for the polarities which are reversed.

Thus,

2. Bidirectional Converter.

In automotive applications, most DC/DC converters have to exchange power between two voltage sources. To accomplish this power transfer, the current must be able to go through the circuit in both directions. There are a lot of applications for this kind of converters, because the use of a battery implies the capacity of charging and discharging so the use of a bidirectional converter allows avoiding a complex system of twin circuits to accomplish the charge and the discharge of the battery. The range of power for those converters is very large. Battleships use 110V-batteries to supply the electrical energy from 240V to 24V DC installations in case of an emergency, charged by the DC-110V-network, with the use of converters. [b2]. This paper will focus on the use of DC-DC converters to share power with a DC-42V source and a DC-14V source, and shared loads of 42-V and 14-V DC voltage.

The main difference with a unidirectional DC/DC Converter is on the use of Mosfet or IGBT to switch the state of the current instead of all the diodes. Indeed, diodes do not allow current to flow in both directions, but with Mosfet the period of each position can be easily controlled.

The particularity of bidirectional DC-DC converters is the need of a current control circuit on the inductor. The current in the converter is imposed by the duty cycle of the switches. In order to limit the power exchanged between the two sources, thus protecting the switches from failing, the current is

9

controlled by a comparison to a voltage command. The control shown in figure 9 is made up of a transfer function with the current and a command as input, and the control of the switches as output.

Figure 9: PSIM simulation of the current control for the directional DC/DC buck and boost converter.

The figure 10 shows waveforms of the current control. The command voltage is V1. The voltage representing the current Vcurrent is subtracted to V1. The result (Vcompare) is amplified and limited to 1V in order to protect the comparator. Vcarr is a high frequency signal which determines the frequency of commutation of the switches, thereby determining the frequency of the ripple current. The output of the comparator is inverted for two switches and 4 drivers transform this signal with no power to a powered signal capable of activating the four switches.

Figure 10: PSIM waveforms of the controlled current in the bidirectional DC/DC buck and boost converter.

a) Bidirectional Buck Converter and Boost Converter.

The use of a bidirectional buck converter enables the capacity of discharging and charging a battery with a same source of tension, if this source of tension never has a voltage which is superior to that of the battery. The maximal and minimal input voltage that the battery delivers is a point of concern: the input voltage (of the battery) can decrease substantially when the battery is low-charged and conversely, the voltage of the battery can be higher than the nominal voltage when the battery is fully charged.

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With this condition respected, the converter can transfer power from the battery to the load and from the load to the battery. The applications are numerous: an example is a DC electric motor for an electric vehicle supplied by a battery with a higher voltage. When the motor is used as a motor, the battery provides its power. When the vehicle is being slowed down, the motor can be used as a generator, and give power to the battery to charge it.

Figure 11: PSIM simulation of a bidirectional DC/DC buck converter.

The equations which define this converter are obtained by the same calculations as for the unidirectional version of the converter. The important values to design each component are average voltage, average current, ripple current and ripple voltage. The output source is replaced by a resistor and a capacitance in parallel to carry out the calculation, because it is more true to life. The average

time between the two stages of operation gives the average voltage of the left part: .

Then, the average current is measured through the resistor.

The RMS currents through Mosfet are: and .

With the differential equation, we have: and

The ripple current is: .

The ripple voltage is linked to the capacitor via .

The DC/DC boost converter is nearly the same electric device with the two sources switched. Simulations and calculations give the same results as those of the unidirectional converter, but both are necessary to supply higher and lower voltage with a same source of tension.

Figure 12: PSIM simulation of the bidirectional DC/DC boost converter.

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b) Complete study of a buck bidirectional converter.

The purpose of this preliminary study is to fully design a bidirectional buck converter. For this, constraints are a power of 140W with an input voltage of 42V and an output voltage of 14V. The frequency for the control of switches is 50 kHz. Moreover, we set the limit of ripple voltage at 5% and 20% for ripple current.

Design includes the calculation of power losses, thermal exchange and stability of the converter.

Calculations will not be explained because the same method will be described later, for the study of a hybrid converter.

First we need to obtain the basic size of components:

With: , , , ,

we can find :

The duty cycle:

The period :

Average current :

and

In order to design Mosfets, average current, maximum current and IRS current are needed:

, ,

, ,

We obtain the inductance L and capacitance C with the method previously described:

and .

This information enables the choice of Mosfets which will best fit the circuit. Then, thanks to datasheets, we can determine the heatsink that will be required such as the one in figure 13.

Thermal dissipation is due to the losses of power. These losses can be calculated with the datasheets. Indeed, there are two types of losses on switches: commutation losses and conduction losses. The first one is the power spent during time of commutation: current begins to increase when voltage decreases, and both are not instantaneous. The second one is the losses during the conduction time because of the heat dissipated. For two switches, we have:

12

This system has to operate in every situation. Therefore we have chosen for calculations an air temperature of 50°C and a maximum junction temperature of 100°C, although the provider had given a maximal temperature of 175°C. Nevertheless, a graph in the datasheet shows the maximum average current on junction in function of temperature of the core : the maximum of 17A that has been done is decreased because of a 80°C-temperature in the core when the junction is 100°C. Our model will have an average current of 11A maximum, so it is acceptable.

Figure 13: Schematic of the installation of a heatsink.

For this, there is the notation for few data we can find in datasheets:

tr: Time of rise. tf: Time of fall. tdon: Turn on delay time. tdoff: Turn off delay time. RDSon: Drain to source on resistance. RJC: Junction to core thermal resistance. RCH: Core to heatsink thermal resistance. RHA: Heatsink to air thermal resistance. Ti: Temperature into the component i.

Mosfets datasheet gives the thermal resistance from junction to core and from core to heatsink and air. By a study of the difference between the junction temperature with or without taking into account heat loss, we will not take into account the latter. As a consequence maximum resistance for the heatsink can be fully determined by constraints of junction and air temperature, and by the two other resistances. [b4].

We found:

First, we need to determine the size of the heatsink. It must be able to cool two Mosfets the dimensions of which are 15*11*5 mm. Therefore, we chose a 10 cm-long heatsink. For this study, we have used the HS dissipadores catalogo 2008/2009. The model is the HS 10334 (figure 14), with a

final size of 103*100*34mm and a resistance of .

To have the final temperature in core, we did all calculations on the other way to finally obtain:

13

Figure 14: Heatsink HS 10334.

The circuit requires a control loop for current in order to admit load variations. So we have to find the transfer function of this loop, and to design the components which will compose this controller. The current sensor is put in series with the inductance, because of the propriety of average current equal to zero. So we have:

(1)

And: (2)

with (1) and (2), we obtain:

with (3)

We have the transfer function:

(4)

The gain can be written:

So, the bode diagram is on figure 15:

Figure 15: Bode diagram of G(f).

The cut in frequency is around 72 kHz, whereas frequency of the switches is . We have

to choose a gain that does not exceed fs/2. We have chosen .

14

We calculated the gain of the proportional controller needed:

With this new controller, however, we have a lower current than it should be: from -12 to 8A in place of -10 to 10A: this static error can be removed by using a proportional integrator controller : PI

controller. The gain can be written: .

We found:

We can plot this new gain:

Figure 16: Bode diagram with the new transfer function G3(f) and the phase diagram Phi(f).

The phase diagram on figure 16 enables to check the stability of the system: margin phase has to be as close as possible to 45°. Here margin phase is close to 84.8°, which is a compromise with a realistic time constant (not too small).

The last step is to build the PI controller with real components. To do this, we studied the transfer function of a PI and then we compared it with the one we had:

Figure 17: Proportional Integer (PI) Controller.

The PI such as that on the figure 17 can be defined by:

15

That results in and .

Then, the choice of Ca gives what we need for Cb and Ra.

c) Buck and Boost Converter.

Bidirectional DC/DC boost converters and buck converters have similar components and are operated in a similar way. Thus to avoid having two components, it is possible to add two switches to use only one component and get a buck and boost converter. Indeed, the inductor is the bulkiest and heaviest part of the converter. In order to save money and weight, the use of a bidirectional buck and boost converter is the best solution.

Figure 18: PSIM simulation of a bidirectional DC/DC buck and boost converter.

This converter enables to power higher or lower voltage sources, and to transfer power from one source to the other, whichever the direction. The control of the switches is really important to avoid a having MOS1 and MOS2 or MOS3 and MOS4 conducting on the same time. Then, as for the other bidirectional converter, a control of the current is required for this converter.

Figure 19: schematic of the stages of a bidirectional DC/DC buck and boost converter.

On the first case of operation, MOS1 and MOS2 functions as if the converter were just a buck converter. On the other case of operation, MOS3 and MOS4 do the same. So the buck and boost can accomplish each function with a proper control of the switches. When the buck and boost converter is

16

operating, the only stages of operation are those on the right on the Figure 19. So with a duty cycle of 0.5, there is no exchange of power.

3. Switched capacitor DC/DC converter.

In recent years switched capacitor (SC) converters have become more attractive. Because, since they do not use magnetic elements and electrolytic capacitors, they present several advantageous properties. They can easily be implemented in integrated circuits. SC converters allow high power density, small size and lower weights which are sought properties in power electronics. A traditional converter uses inductance to store energy but the SC converter with its equivalent resistance allows for higher performance. SC converters do not use duty cycle control to manage the circuit, so it is the choice of a type of capacitor which is really important for high power converters. A SC converter can also be unidirectional or bidirectional. In this part we will study in depth the buck SC converter to better understand our own converter which is an upshot of this converter.

a) Buck switched DC/DC converter.

The figure 20 shows the simulation of a switched capacitor converter. This converter does not use any inductance, what enables to save weight.

Figure 20: PSIM simulation of a buck switched capacitor converter.

According to figure 21, from 0 to D.TS, switch S1 is conducting and switch S2 is blocked:

Vc

Figure 21: First step: S1 ON and S2 OFF.

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The voltage value across a capacitor in transitional regime in function of time for a first order system

is defined by the following relationship:

With the voltage in steady state, Vini the initial value of the voltage and τ=R*C the constant time.

So, we have : (1)

(2)

From D.Ts to Ts, the switch S1 is off and the switch S2 is conducting:

Figure 22: Second step: S1 OFF and S2 ON

For the second step, equations are: (3)

(4)

We simulate the circuit of the figure 20 on PSIM to obtain the following waveforms, the value of Va and Vb are obtained for the minimum and maximum value of Vc respectively.

0

0.4

0.8

VS1

0

0.4

0.8

VS2

20.2

20.4

20.6

20.8

VC1

20.2

20.4

20.6

20.8

Vc2

0

-10

10

Ic1 0

0.0035 0.00352 0.00354 0.00356 0.00358 0.0036 0.00362

Time (s)

0

10

20

I0

Figure 23: PSIM waveforms of the SC buck converter.

To find the values of Va and Vb we have to insert the equation (2) in (4) and the equation (1) in the equation (3):

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(5)

(6)

The circuit can be represented by an equivalent resistor as figure 24 shows:

Figure 24: Circuit equivalent in the steady state.

Kirchhoff’s laws give: so (7)

Variation of voltage across the capacitors is given by the following equation:

(8)

We have:

(9)

Equation (8) in equation (9) gives:

(10)

Equation (10) in equation (7) gives:

(11)

To obtain the minimum equivalent we have to do a limited development at the second order:

(12)

The higher the commutation frequency, the lower the equivalent resistance:

19

Figure 25: equivalent resistance in function of the commutation frequency (diagram extracted from Conversores CC-CC a capacitores chaveados, M.c Maccarini [b5].

We can also notice that the minimum of the equivalent resistance is reached for a duty cycle D=0.5.

II. Hybrid bidirectional DC/DC converter.

The hybrid bidirectional DC/DC converter is an attempt to preserve the advantages of the two previous types of converters. This converter shown in figure 26, merges a switched capacitor converter (which halves the input voltage) and a bidirectional buck converter (which can have an output between 0 and 21V). Reducing the voltage enables a cut of the power through the switches, and a decrease of the size of the inductance. [b6]

Figure 26: Hybrid bidirectional DC/DC converter.

1. Steps of functioning

Two modes of conduction can be accomplished with this converter. First from (0; D.Ts), switches S1 and S3 are ON as Figure 27 shows. Then from (D.Ts; Ts), switches S2 and S4 are ON.

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Figure 27: i) Switches S1 and S3 ON ii) switches S2 and S4 ON

In the first operating stage, capacitors C1 and C3 have the same voltage as well as C2 and Vout + VL. Then, RL is the intern resistor of the inductor: it is really small. The effect in term of voltage is negligible, as well as the ones of switches. Finally, average value of VL is zero, so C2 and Vout have the same voltage. On the second operating stage, C1 is in series with C2 and C3 in parallel. The output is short circuited. So the three capacitances have the same voltage: Vin/2. By studying only the right part of the converter, we obtain a buck converter with Vin/2 as input. Left part is a switching capacitor converter with Vin/2 in output. So the output voltage can't be over Vin/2, as well as all components of this circuit. This fact enables to decrease conduction losses which are function of voltage and current across each component.

The waveforms represented in the Figure 28 show how the converter works. The first part shows the two compared signals and the output of the comparator, which controls the switches. The next graph shows current inside the inductance and the ripple current. Then are current and voltage across each capacitance. The current is increasing when the stage 1 is operating, because input gives power to output. Then, inductance and output are running alone, so resistive components are dissipating power so inductance current decrease. Every capacitance voltage is about 21V and is not oscillating too much. . We choose the capacitances thanks to the PSIM simulation and information given by our tutors to finally have C1=C2=C3=2200μF which is a good compromise between a high capacitance and a small size, knowing that a high capacitance allows to reduce the voltage ripple.

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Figure 28: Waveforms of the converter.

To remember, if a switched converter works in continuous conduction mode, then in the steady state the average voltage across the inductor and the average current through all capacitor will be equal to

zero during a switching cycle. Thus is the current through capacitor Cx

associated at the resistance Rx and .

In state 1, Kirchhoff’s laws give:

In state 2:

Thus, the average voltage in the inductor is equal to:

Gain:

The inductance is calculated across the maximum current ripple through the inductor. For the first step, the expression of the inductor’s voltage is:

(1)

The interval time of the first step is: (2)

The substitution of equation (2) inside equation (1) gives:

Thus, the inductance is:

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2. Current Control

In a first time, the transfer function linked to the current has to be found. Now we have to take in account some disturbances of the system. We will consider Vin and Vout as two ideal voltage sources. Thus, the average inductor current is equal to:

(1)

With : Average voltage in the inductor over a period.

ΔD: Disturbance of the duty cycle over a period.

: Disturbance of the average current over a period.

Then, (2) with

Replacing equation (2) in equation (1):

After some simplifications namely using: , we obtain:

(3)

Laplace transformations give: (4)

The same method as previously is used, with a frequency fs=70 kHz.

New bode diagrams are on figure 30:

Figure 29: New Bode diagram and margin phase.

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The results of new calculations yield:

We obtain a margin gain equal to 87.2° and a time constant tc=129.755* which is acceptable.

Then as we do for the simple buck bidirectional converter we have to find the components of the PI

controller. Using the Millman’s theorem we obtain: and

We choose Ca=367pF, so we find Cb=1000pF and Ra=430kΩ.

3. Choose of the switches and heatsink.

Designing the best-adapted switches for a circuit imply the exact knowledge of constraints its will face. For active components such as Mosfets, main parameters are peak voltage, peak current, average current, RMS current and maximum current in nominal operating stage. Thanks to the PI controller, there is only a small peak current when the current is changed, so all Mosfets designed for our RMS current accept this kind of peak current. Then, voltage across switches is about 40V, so we have chosen 100V Mosfets. The following table shows data about each switch obtained from PSIM simulation of the converter.

Switch IRMS (A) IAVG (A) IMAX (A)

1 4.2 3.5 5.1

2 6.7 3.6 13.3

3 4.2 3.5 5.6

4 12 7 24 Figure 30: Current values given by PSIM simulation.

In order to simplify the building of the converter, and to be cost-saving, the four switches will be the same even if they are not operating with exactly the same current. Only the maximum value for each data will be used. We have found as Mosfet which feet to the circuit on Farnell website [s4]. Then, datasheets enables to find internal characteristics of Mosfets and to make a new revision of our simulation, more precise than before.

The next point is to calculate conduction and commutation losses in Mosfets. These losses are responsible for most of the loss of efficiency of the converter.

Losses are due to the time during which current is increasing and voltage is decreasing, and vice versa. The dissipated power during this period is:

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For each switch, with , and , we have a loss per second of :

Then, during conduction time, the RMS value of the current gives conduction losses:

For each switch:

Total loss is the sum of conduction and commutation losses for each switch. For our converter, we find a total loss of:

These losses have to be evacuated with a heatsink well calibrated. Datasheet of the switch gives maximum operating core temperature, thermal resistance from junction to core and from core to heatsink. Then, to determine the needed thermal resistance of heatsink, we choose the limit of temperature in the junction and an extreme air temperature of 50°C.

Calculation of thermal equivalent resistance Req gives:

So, we obtain:

4. Adaptation of the converter to available components.

After doing this complete simulation and see that it works well the aim was to approach the real conditions. Indeed in the previous study all the components were ideal but the reality is different, we have to take into account the interne inductance of the capacitors and inductance of the wires. The new circuit is represented in the following schematic:

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Figure 31: Hybrid converter with non-ideal components and PI controller.

The PSIM simulation is made with no-ideal components. Important phenomena are not taken into account on our calculation because of the high difficulties to solve it and low effect on the result. But non-ideal component data we found on datasheets were added to the simulation. First, Mosfets are fitted with parallel RC line to represent the fact a few current can cross through the component, even if the switch is just closed. Internal resistance of switch called Rdson is not represented on the schematic but is an internal parameter of switches. Theses resistances are responsible for most of losses on the circuit.

Then, input and output of the switch, respectively called Source and Drain, have their own inductance:

Figure 32: Equivalent representation of a Mostfet.

The datasheet gives: ; L2=13nF ; C=Coss-Crss=550-110=440pF, with Coss the output capacitance and Crss the reverse transfer capacitance. Then we choose a resistance R=5Ω to generate reality.

Finally, each capacitor can be represented as on figure 33:

Figure 33: Equivalent representation of a capacitance.

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The internal inductance represents the fact that current can't rise immediately and the resistor represents losses. The datasheet of the 2200μF capacitor gives some values which allow us to calculate the internal inductance. The capacitance depends of the temperature but also depends of the frequency. Therefore we introduce a new value called the dissipation factor, tan(δ), which is equal to the ratio of the equivalent resistance to the capacitive reactance in the equivalent circuit series. For a frequency superior to 10kHz and 63V our capacitor has a dissipation factor and a resistance equal to:

tan(δ)=0.2 R=0.02Ω

Then, ; f=70kHz ; C=2200μF

The inductance is given by the expression: so L=2.35nH.

When we launched the simulation with these new parameters, the current control did not seem efficient and we saw that the inductor current did not follow the command (figure 34).

Figure 34: Waveform of the fall in current through the inductor.

This fall in current is caused by a component in the circuit which charges or discharges in current, so it is probably a parasitic inductance. There are two main possible sources of parasitic inductance: the overall length of wire or small internal inductance within the capacitance. Another correction brought to the circuit was to change the PI controller into a simple proportional controller with a gain which will be determined later.

Capacitances C1, C2 and C3 were increased because the current which passed through the capacitor was too high, according to the datasheet. In fact these capacitors can stand a current of 2.35A for 110°C, with a correction of 1.8 it represents 4.23A in total. We measured 7.8A in the branch. An important point to underline for the choice of materials is that we cannot buy capacitors and we have to tackle our issue with the available supply of the INEP laboratory. Thus, before we choose a capacitor we must check whether it is available. Capacitors of 4700μF which can stand a current of 8.30A were available [s1]. The calculation of the internal inductance thanks to the datasheet gives:

tan(δ)=0.15

The resistance was not provided in the document, calculation gives:

Ω

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The inductance is:

However as the stock available at the laboratory could only provide us with two capacitors of 4700μF another solution has to be found for the third one. Thus, we chose to use the three 2200μF capacitors in parallel to obtain a sufficient current in each branch.

The new schematic for the simulation is on figure 35:

Figure 35: new schematic of the hybrid converter with non-ideal components.

III. Design of the inductor.

After having completed the simulation of the circuit it is now time to build it in the laboratory. To that end, the first step is to fully design the inductor: type of core, number and type wires needed. In order to ensure best performance of a DC/DC converter the choice of magnetic elements is crucial. Indeed, magnetic elements present some parasite properties such as magnetizing, dispersion inductance or the existence of capacitance between coils or between wires. These parasite properties can cause significant losses, voltage peaks in semiconductors and noise. Therefore, we need to build an inductor perfectly-suited to the studied converter.

1. Choice of the appropriate core.

Some of the required information is already available (obtained by calculation or PSIM simulation):

Inductance:

Maximum current:

Rms current:

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Current ripple:

Frequency:

It is important to notice that the converter will work with a high frequency. The use of such frequency allows a reduction of noise and also a reduction of filters (capacitors and inductor). For the following design all the equations have been checked with the document Projeto Físico de Indutores e Transformadores em Alta Freqüência by Ivo Barbi. [b7]

Then some well-known equations are needed:

Ampere’s law: (1) with If,s the free current through a surface S and H the magnetic field strength.

Faraday’s induction law: (2) with N the number of turns of wire

and the magnetic flux through a single loop.

Relation inside the inductor: (3)

Magnetic induction: (4) with the permeability of a free space and B the magnetic flux density.

Magnetic flux: (5) with Ae the central area over the core.

The purpose of the core is to provide an adequate path for the magnetic flux. Type-E ferrite presents some advantages: a high magnetic permeability and low electrical conductivity. However, the core saturation problem cannot be ignored. It is proved that each winding provides some differential flux. A leakage flux is caused by a current through the leakage inductance in each winding. This flux is able to saturate the core material and modify the point where we want to work on the BH curve. This saturation decreases the inductive reactance and causes noise through the filter. Figure 38, for example shows two different ferrite cores called PC90 and PC44. The saturation occurs for a flux density B roughly superior to 0.3T. To avoid this saturation, the best option is to work on the linear part of the curve. Therefore, we chose to work with a Bmax=0.18T.

Figure 36: Magnetization curves of two different ferrite core.

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In order to select the most appropriate core, we use the previously-mentioned-equations. Equation (2) and equation (3) are two expressions of the same voltage, hence:

(6)

Then, replacing equation (5) inside equation (6) gives: (7)

Now we consider that when the maximum current in the inductor is reached, B reaches its maximum value Bmax. Therefore in equation (7) ∆i can be replaced by Ipeak and B by Bmax.

(8)

The next step is to introduce the factor kw which represents the rate of occupation of the copper wire inside the core, with:

(9) and kw=0.7

Ap: Transversal area of the copper winding.

Aw: Window area over the core.

Figure 37: schematic of the core.

The maximum current density is defined by: (10) with , the typical value for J.

Expression (9) inside expression (10) gives: (11)

We isolate N from the equation (11) to obtain:

(12)

Equaling the two expressions of N, equation (8) and equation (12):

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(13)

With our data we obtain:

Datasheets of different core do not give us a core with the same value of so we have to

oversize the core and to choose one with corresponding to the E-42/21/15 manufactured by Epcos. [s3].

The data of this core are:

Ae=1.78 cm2

Aw=1.75 cm2

Lcore=8.7 cm, length of the magnetic path.

Vcore=17.3 cm3

2. Number of turns and gap length

The number of turns is directly deduced from the equation (8), so:

Since it is impossible to make 22.503 turns, the immediately superior integer value is kept (23 turns).

The next step is to determine the gap length and this for two reasons. First, the gap allows the inductance L not to depend on the variations of the core permeability which strongly depend on the temperature. Secondly, with the addition of a gap the saturation in the core is avoided because the inductor operates with higher current in the windings. The gap is shown on figure 40.

Figure 38: Magnetic path and gap length

The inductance directly depends on the number of turns N and the total reluctance of the magnetic circuit Rtotal:

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(14)

Interestingly, even if we use the best material for the core, there will often be an opposition for the passage of the flux, called core reluctance: its expression is:

(15)

The gap reluctance is given by the expression: (16), where μo is the air permeability.

Considering that the gap reluctance is much higher than the core reluctance, the total reluctance can be

expressed as: .

Equation (14) becomes: (17)

Equation (17) gives: (18)

For our inductor we find: Lgap=1.618 mm

3. Determination of the wire’s parameters.

The use of high frequency can result in the apparition of skin depth effect in wires. Indeed when the frequency increases the current inside the wire spread out over the periphery. The result is that the current density is higher on to the edges than in the central area. Therefore the conduction efficiency of wires is cut by this phenomenon.

The value of the skin depth effect is given by the following expression:

(19)

ρ: Resistivity of the copper: ρ=1.673*10-8 Ω.m

μr: Relative permeability: μr=1 for most metals

With our parameters we find: δ=246.048 μm.

Thus to avoid the decrease of efficiency due to the skin depth effect the maximum wire diameter has to be equal to: Dwire=2*δ=0.049 cm.

In the wires datasheet it is the AWG 28 (American Wire Gauge) which is the most convenient:

Dwire=0.032 cm

Swire=0.000810 cm2: Section of one wire.

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Sisowire=0.001083 cm2: section of one wire with isolation.

Ρwire=0.002845 Ω/cm: Resistivity of the wire.

However the following equation shows that the wire diameter is also linked to the maximum current density that it can admit:

This value is superior to the area of our selected wire. Therefore to avoid overheating of the wires we must put some wires in parallel. The number of necessary wires in parallel nwires is given by:

Thus, taking the next integer value we will use 28 wires in parallel.

The length of a wire needs to be equal to:

4. Copper and magnetic losses.

Total losses in the non-ideal inductor result of both, losses in the copper due to the joule effect and magnetic losses in the core. The consequence of these losses is to increase the heat in the inductor. The internal resistance of wires causes the losses: as we have 22 wires in parallel this resistance is:

The losses due to the joule effect are:

Magnetic core losses are due to hysteresis and eddy currents. Eddy currents can be ignored. Thus to calculate magnetic losses we will use the datasheet of the core given by Epcos. (Appendice XX.).

Datasheet gives the approximate weight of the core: mcore=88 g/set and the power by set PV=3.30 W/set so PV=0.0375 W/g.

The bulk density of the ferrite is equal to: ρcore=7874 kg/m3.

Thus,

It gives:

5. Increase in temperature.

To be efficient the inductor must work bellow a temperature defined by its maker: here the core must be operated bellow 300°C. If the losses are too significant, the temperature will increase and burn

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some elements of the circuit. Therefore we must ascertain that the inductor respects this temperature limit.

The internal resistance of the core is:

The rise of temperature is:

6. Possibility of execution.

The last step is to verify if it is possible to fit the wires into the core, in other words to verify if the construction of the inductor can indeed be achieved.

The minimum window to fit all the wires is:

The possibility of execution is:

For our inductor we obtain: Exec=0.64

Thus, the wires will occupy 64% of the core.

7. Construction and measures

We built our inductor at the laboratory of the INEP following the steps explained in the previous part. Thus, to build the inductor we made 23 turns of the core with 28 two-meter wires in parallel and created a gap of 1.618 mm between the two parts of the core. We also immersed the wires in tin to connect all them to the board.

Figure 39: Inductor built by us in the laboratory.

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In reality, we had to adapt the gap to reach an inductance close to 70μH, according to figure 42, therefore the gap is not exactly equal to 1.618mm.

Figure 40: measure test to adapt the gap.

IV. Current control

This part focuses on the design of the current control loop. The circuit in the previous chapter operated with a simplified control with only a PI controller and no realistic component to transform the output signal from the comparator to switches, neither to supply each command circuit components in power. In this part, we shall discuss the design of the components used in the loop. First, we need to find the equations, and then try to simulate the converter, find available components, implement the design, run tests to detect problems, solve them and run this process again to ensure a sturdy, error-free design.

The converter needs to be commanded to work properly. The specifications are a power of 140W with an output voltage of 14V, so the current has to be 10A. Current is given by the duty cycle of the switches, so the command has the current in input and the duty cycle in output. The command signal is given by a reference in voltage which we are free to choose.

The current loop has three main functions: to measure the current through the output line, to compare the actual current with the command, and to transform this signal into another signal, one which the switches can process. In each step of the design of the current control loop, we must check available components in the laboratory and find datasheets on their provider's websites. One of the main difficulties is to find components which can operate with the same range of voltage and current.

1. Current sensor.

On the first step, we tried to find components to fit the simulation in chapter II, and to complete the circuit of the control loop, which included new components not implemented in the simulation. Indeed, the current sensor had been modified to a hall sensor: LAH 25-NP from LEM. It measures the

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induction with from 1 to 3 primary turns of the main circuit. The advantage is no influence on the primary circuit. The image current is in pin M, with a resistance there to convert the current into a voltage. Lines between outputs and inputs enable to use 1, 2 or 3 loops depending on the input current, from 8 to 25A. For 10A, we chose to use 2 loops.

Figure 41: Altium scheme of the current LAH 25-NP

The gain for each primary current loop is 1/1000, so the output resistance has to increase this gain by same magnitude. The datasheet gives a maximal resistance of 394 Ω. To avoid being too close to the limit, we set Rm=330 Ω. We then calculated the gain Ki of the current sensor, in order to design the following components.

(1)

(2)

(3)

2. Comparator.

Then, the comparator was chosen among what was available in the laboratory: the LF347 seemed to be a relevant choice. This kind of integrated circuit often has four comparators on the same circuit, but only one is used. The reference is given by a frequency generator on pin 3. Input comes from the sensor on pin 2. In order to avoid a fall of the current through the inductor a proportional controller is used: it is less precise than a proportional integer but more stable in our situation. Using the PSIM simulation of the whole circuit, we tried to find a compromise between a high gain (G) and a good stability. The result is a gain of 10, given by the study of a proportional controller:

(4)

(5)

(6)

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(7)

Figure 42: Altium scheme of the comparator LF347N (left): extract of the datasheet of the LF347N (right).

A small capacitor is added in parallel with resistance R2 in order to reduce the output noise of the comparator. Power supply of the LF347N is generated outside of the converter, and the pins go to the global input of +15V and -15V. The choice of both resistance R3 and R2 with a gain of 10 was to take R3=1K and R2=10K.

3. Integrated circuit.

Figure 43: Altium schematic of the integrated circuit UC3525.

The role of the integrated circuit is to transform the comparison signal to a square signal which is the duty cycle, with a precise frequency. It creates an oscillator frequency, based on the components CT and RT respectively on pin 5 and 6. The datasheet gives the following calculation:

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(8)

In order to change the frequency depending on the need, we chose to implement a capacitance of

450pF and a variable resistance of 15 kΩ. For , we have .

The use of pins 1, 3, 4, 9 and 10 are not required in this converter. Pin 7 is the discharge of the circuit, it is linked to a capacitance because it is not needed. Pin 2 is the input and is linked to the result of the comparator. Pins 12, 13 and 15 are respectively the ground, circuit supply and output supply of the circuit. There are two outputs which both deliver a complementary signal with a duty cycle from 0 to 0.5, so with two diodes we obtain a duty cycle from 0 to 1. The softstart on pin 8 is linked to the ground with a capacitance given by the datasheet. Finally, pin 16 delivers a 5V voltage that we use to have a manual variable input with a voltage divider in case of a failure of the comparator.

The use of a proportional controller and this integrated circuit brings a static error to our comparator. Indeed, the input voltage range is from 0.9V to 3.3V for a duty cycle from 0 to 1. Therefore, in order to have 10A in the primary circuit, we need a duty cycle around 0.7, which corresponds to an input of about 2.6V. So the gain of the comparator is important to reduce this error, because it is equal to

in our case.

4. Inverter.

The integrated circuit provides only one signal of duty cycle, but 4 switches must be commanded by pairs. An inverted enables to copy this signal and to reverse it. The inverter used on our converter is the Fairchild CD4069UBC [s2]. As for the comparator, an inverter often has numerous cells inside to invert many signals. The CD4069 has 6 independent inverting cells. Constraints were the RMS current and voltage of the signal to be inverted. This component requires a +15V power supply, as for the other ones. Empty inputs are connected to the ground, while outputs are not connected to anything.

Figure 44: Altium schematic of the inverter CD4069UBC.

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5. Driver

Switches cannot be driven directly from the output signal of integrated circuit. Drivers are components made to transform the duty cycle to a signal which the switches can process. Each driver provides the signal for two switches, and can transform two different signals, one for each switch. These two parts are called channel A and B. The driver used is: Duplo - DRO100D25A, which is a Portuguese model of SKHI20op provided by Semikron.

Pin 7 is the input signal for channel A, powered by pins 4 and 5 which receive power from a power supply (see below). Then the output signal is delivered to the source, drain and gate of the first Mosfet on pins 1, 3 and 2 respectively. The same roles apply for pins 11 to 16.

Pin 6 is the reset input. It is used to reset the converter to its initial state. This input needs to receive a constant voltage during normal operation of the driver, and to receive a 0V voltage to be reset. A push button is used to connect pin 6 to the ground when needed.

Pin 8 is the error signal. When the driver is operating normally, pin 8’s output is 15V. In case of short circuit or fall in output power supply voltage, this error voltage falls to 0V. We built a circuit which connects a 15V power supply to the ground with a switch commanded by the error signal. If the switch is no longer commanded, the diode is set alight.

Figure 45: Altium schematic of the driver SKHI20op.

6. Drivers power supply.

Since drivers cannot be supplied by a common power supply of +15V, a specific power supply is needed. It is crafted by the same provider and is adapted to our driver. This power supply is DS320-08A, similar to the Semikron SKHI PS1. This power supply can only provide power to both channel of one driver, through pins 1 to 4. Pins 5 and 6 are power outputs to supply a transformer which can supply our second driver. This transformer is the TRM480D20A, the same used on the DS320-08A. Then, the power supply is supplied by the same 15V power source than other components.

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Figure 46: Power supply of the drivers.

7. Global current control loop.

Figure 46 represents the final schematic given to the builder of the converter. Global power inputs +15V and -15V are represented by a header in the left of the schematic. The other inputs are the ground and the regulation of command. Most components are small integrated circuits, but capacitances and drivers are much bigger and represent most of the weight of the converter.

Figure 47: Altium schematic given to the technicians.

V. Tests of the laboratory prototype.

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Our goal is to acquire the waveforms of the operating of the converter during buck mode and boost mode (with input and output inverted). Secondly we wish to assess the efficiency of the converter. These two steps will afford a clearer idea of the real possibilities this topology allows. Indeed, the test of the control loop is only possible if first steps are achieved.

1. Prototype problems and solutions.

In order to prove their efficiency, new topologies usually require a lot of prototypes, because all phenomena cannot be simulated with computers or mathematics. In our case, only the first prototype of this converter was crafted, so we need to cope with difficulties through a modification of the prototype. Some issues such as the line inductance caused by an inefficient placement of components cannot be solved without a rebuild of the prototype.

a) Driver set up.

The two drivers used on the prototype need to be adapted to our circuit. A dead time between the shutting down of the first output and the start of the second one must be implemented thanks to a resistor. This can be chosen from 0.5us to 1.5us. Depending on the frequency, this dead time can avoid a simultaneous opening of switches 1 and 2 or 3 and 4. This would create a short circuit and possibly set the prototype ablaze. But the dead time decreases the prototype's efficiency, since no power is transferred when it happens. Two burnt switches enabled us to choose a correct dead time for the following steps.

By testing each component separately before powering up the entire prototype, some mistakes were contained. A wrong connection and a defective welding were found and solved, and resistors on the driver error circuit were changed in order to better fit the circuit. This step ensured we would avoid the loss of a driver, which is an expensive component.

b) High frequency noise.

By measuring the current through switch 4, the one which carries the highest current, a high-frequency peak of current was found. This peak was caused by extremely small parasitic inductances and capacitances mostly due to the length of wire and inherent switch inductance. Indeed, this prototype was not efficient for high frequencies: components should have been placed differently avoiding some centimeters of copper which bring parasitic inductance. In order to filter this high frequency signal, small value capacitances (0.33μF) were added in parallel to the two main capacitances of 4700uF.

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Figure 48: Measurement of high frequency peak of current: output current (CH2), switch 4 current (CH3) and switch 4 voltage (CH4).

c) Enhancing stability and protecting UC3525.

The final changes in the prototype were the stability increase needed to make it work and to limit the risk of failure. Indeed, a problem of recurrent error in the drivers was solved. The actual gain was 10 while the target gain, found by simulation of PSIM, was 1.7. We added two new resistors in parallel of existing ones.

Figure 49: Schematic of the two resistors R2 bis added to the operational amplifier.

Because the operational amplifier is powered with +15V and -15V, the output can overpower the UC3525 pin 2 input. Indeed, UC3525 datasheet gives 3.6V for the maximum voltage in pin 2. A small integrated circuit was printed in order to limit the voltage in this part of the circuit to 3.6V.

Figure 50: PSIM schematic of the protection of UC3525.

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The Zener diode allows only the flux of current from the operational amplifier's pin 1 to the ground when voltage is more than 3.6V. So pin 2 is effectively protected, without affecting the operating of the circuit.

2. Operating stage.

a) Buck mode.

The first operating stage tested is the buck mode. In order to check the good operation of the prototype, a 42V-source of voltage is connected in input while a resistive load is connected in output. The first measures are made to verify that current or voltage is not too high on components. Then, increasing slowly the power provided by the voltage source, the output current and voltage are checked. The result of the test is given by the fig. xx. For a 10A output current, the voltage across switch 4 rises to 20V and the current is close to 25A during the conduction time.

Figure 51: Waveforms of buck mode extracted from the oscilloscope.

A high frequency peak of current is still crossing through the mosfet, close to 70A. The mosfet chosen can stand this kind of current peak. The simulation was modified to fit to the real prototype, and then it gave similar waveforms.

Figure 52: PSIM waveforms of buck mode.

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b) Boost mode.

In order to test the bidirectional capability of the converter, the voltage source and the load have to be switched. For an output power of 140W, and a voltage of 42V, the resistor needed is

. Fig.53 shows the waveforms obtained in this operating mode.

Figure 53: Waveforms of boost mode extracted from the oscilloscope.

The comparison between the oscilloscope and PSIM waveforms shows that the current ripple is missing in the PSIM simulation when the switch is on. These kinds of effects are due to the limit of PSIM non-ideal representation of components.

Figure 54: PSIM waveforms of boost mode.

c) Efficiency tests.

With the two modes operating correctly, the next step is to check the global efficiency of the converter. The first prototype's efficiency cannot be compared to usual converter's efficiency. The desired outcome of this part is the global trend of efficiency depending on the power and the frequency. It should be noted that on this converter, the components used are found amongst available components in the laboratory, and there high efficiency is not a goal.

First power must be increase up to the 140W power required. In fact, losses are quite high and it was chosen not to increase power up to 110W in order to limit the risk of burning some components. Fig.xx shows the two curves of efficiency on buck mode and boost mode. Surprisingly, a high

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efficiency is obtained for low power, which shows that conduction losses are far more important than anticipated.

Figure 55: Efficiency curve of the converter for 70kHz and constant duty cycle.

With the previous results, another point to check is the capability of the circuit to handle a high frequency. The following test is to change the switch's commutation frequency. This enables us to measure the proportion of losses due to commutation. Measurements are done with frequencies from 20 kHz to 100 kHz. For each frequency, power is increased from 20 kW to 110 kW. This enables us to have a 3D curve to analyze the best operating conditions of the converter.

Figure 56: Efficiency curve of the converter for 20kHz to 100 kHz and a power from 17kW to 110kW.

An important point is that the curve is created by the software when the frequency is over 80 kHz and the power is over 90kW. Indeed, the more the frequency is increased, the less power can be sent in the circuit. In fact, for the test with a frequency of 100 kHz, the maximal power tested is 85 kW.

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There are two main conclusions from these experiments; Firstly, the converter seems to be far more efficient with low power (about 20 kW). The converter has been designed to operate at 70 kHz, and it is the frequency where the efficiency is the best under this low power. But the other conclusion is that surprisingly, with the nominal power (about 100 kW in output, and 140 kW in input), the best efficiency is obtained for low frequency because of the high commutation losses. Our assumption is that, because of the non optimization of the converter, losses could be much more limited than they currently are.

3. Test of the Control loop.

After having tested the converter in open loop it is now necessary to check the functioning of the control current loop. To accomplish this test, we first need to replace jumper W1 by a resistor of 330kΩ and open jumper W2 to close the loop. Then, to check that the current sensor is functioning properly, we input different reference signals such as sinusoidal, square and triangular signals, to assert that the current follows the reference. Figure 57 shows the results obtained, which are very satisfactory: the blue curve represents the current in the inductor and the pink curve the reference signal applied.

Figure 57: Inductor’s current following the reference.

This test was performed with a positive reference. We only checked that the current control loop functioned well with a positive current. The next step is to test if the converter is in fact bidirectional, and thus if the power flow (and therefore the current) can be reversed.

46

Before we test this, some capacitors were added in parallel with the charge, as shown in figure 58. Since the resistor cannot store energy, the added capacitor charges while a positive current will be applied. As soon as the flow is reversed, the capacitor will work as a voltage source.

Figure 58: Schematic of the bidirectional system.

Now the reference voltage signal is a square signal oscillating between 10A and -10A. In the following figure, the reference is the pink curve and the current throught the inductor is the blue one. The green curve shows the charge and the discharge of the capacitor. Therefore it is proved that the converter works perfectly in a dynamic state.

Figure 59: Reversion to the power flow (left) and response time (right).

Moreover, the system seems to respond very quickly as Figure 59 shows. We can measure a time response of 110μs between the reference and the current through the inductor, which is very satisfactory.

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Conclusion

The complete design of this hybrid bidirectional converter was a very interesting experience not only because of the challenge of studying a new topology and providing new results in power electronics but also in the way to proceed. Indeed, while we started with only an electrical schematic of the converter, we managed to craft a functional prototype which operates as we had forcast in the laboratory. The first step of our work was to understand simple converters which enabled us to go further afterwards. This first study was vital for a proper understanding of our complex converter.

Then, we carried out the complete analysis of the hybrid converter, describing each of the steps of its functioning with the two modes of operations, basic equations and transfer function which enabled us to calculate the parameters needed in order to design a control circuitry. The next step was to choose and design all the components in a very meticulous manner to ensure the correct operation of the converter. The design of the inductor was a crucial and rewarding step because it was entirely accomplished independently.

However, we faced some problems in the selection of components, not all were available in the laboratory of INEP. Therefore, we had to oversize some components to be sure that the converter would be able to function and would not sustain too much current or voltage. Shortly after having sent the complete schematic of our converter to the technicians, we received the prototype and we started the tests in the laboratory.

Experiments highlighted that simulation cannot account for some phenomena. From the very start of tests, we had to carry out several modifications on the prototype to make it work. The converter was later tested in buck and boost modes in open loop. The comparison between waveforms obtained by PSIM simulation and those measured gave us a first assurance that the converter was well-designed. Afterwards, the circuit was tested in closed loop with the control circuitry, which was highly successful: the current through the inductor perfectly followed the input reference.

This prototype has proved that the hybrid converter born from the merging of conventional and switched capacitor converter can be viable to address the automotive dual voltage issue. The development and the optimization of this prototype could be the next step, perhaps accomplished by other students or by laboratories of automotive firms interested in this solution. [b8]

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Appendices

Appendix 1: Heatsink datasheet.

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Appendix 2: Datasheet for the type E-E core.

Appendix 3: Datasheet for the wires.

Appendix 4: UC3525 schematic cabling.

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Appendix 5: Schematic from Altium Designer software.

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Appendix 6: Print Circuit Board of the hybrid converter.

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Bibliography References

[b1] “Conversadores CC-CC Bàsicos Nao Isolados”, Ivo Barbi and Denizar Cruz Martins, 2008.

[b2] "Experimental study of a bidirectional dc-dc converter for the dc voltage control and the regenerative braking in pm motor drives devoted to electrical vehicules", F. Caricchi, F. Crescimbini, G. Noia, D. Pirolo, Electrical Engineering Dept. - University of Rome "La Sapienza", Via Eudossiana, 18 - 00184 Rome (Italy).

[b3] "Power electronics handbook", Muhammad H. Rashid, 2001.

[b4] “Electrônica de Potência”, Ivo Barbi, 2005.

[b5] “Conversores CC-CC a capacitores chaveados”, M.c Maccarini,

[b6] “Retificador monofasico com fator de potencia unitario, de alto ganho, baseado em um conversor boost hibrido”, M.c Maccarini,2013. Universidade Federal de Santa Catarina. Programa de Pos-Graduaçao em Engenharia Eletrica.

[b7] “Projeto Físico de Indutores e Transformadores em Alta Freqüência”, Ivo Barbi, 2002.

[b8] "Study of Bi-Directional Buck-Boost Converter Topologies for Application in Electrical Vehicle Motor Drives", F. Caricchi, F. Crescimbini, F. Guilii Capponi, L. Solero, Electrical Engineering Dept. -University of Rome "La Sapienza", Via Eudossiana, 18 - 00184 Rome (Italy) and University of Rome III Dept. of Mech. & Engineering Via della Vasca Navale, 79 - 00146 Rome (Italy)

Internet websites

[s1] http://www.datasheetcatalog.com/fairchildsemiconductor/

[s2] http://www.fairchildsemi.com/

[s3] http://www.epcos.com/

[s4] http://www.farnellnewark.com.br/

Software

PSIM Mathcad Altium designer 10 Matlab 7