8254 SOFTWARE PROGRAMMABLE TIMER/COUNTER

Difference between 8253 and 82548253 8254

1 Maximum input clock frequency is 2.6 MHz

Maximum input clock frequency is 8 MHz

2 It does not have read-back feature

It has read-back feature

Read back commandThis command allows the user to check the

count value, programmed Mode, and current states of the OUT pin

Each of the three counter has 3 pins associated

CLK: input clock frequency- 8 MHz OUT GATE: Enable (high) or disable (low) the

counter

The 8254 solves one of most common problem in any microcomputer system the generation of accurate time delays under software control.

Instead of setting up timing loops in system software, the programmer configures the 8254 to match his requirements, initializes one of the counters of the 8254 with the desired quantity, then upon command the 8254 will count out the delay and interrupt the CPU when it has completed its tasks.

It is easy to see that the software overhead is minimum and variable length delays can be easily accommodated.

8254 has 3 counters that can operate independently.

To operate a counter a count has to be loaded in its register and on command it decrements the count and when the count reaches zero a pulse is sent the 8086 (CPU) i.e, an interrupt can be sent to 8086 saying that count has reached zero.

It can be either a BCD or a Binary counter. It can be programmed to work in different modes.

Each of the three counters must be programmed separately

Control byte must be first written into the control register. The 8254 must be initialized before use

The programmer can not only write the value of the count into the 8254, but read the content of the counter at any given time as well

All counters are down counters

Initializing an 8254 programmable peripheral deviceSteps:-Determine the system base address for the

device.Determine the internal addresses for each of

the control registers, ports, timers, status registers, etc .,A1 A0 SELECTS

0 0 COUNTER 00 1 COUNTER 11 0 COUNTER 21 1 CONTROL WORD

REGISTER

Add each of the internal addresses to the system base address to determine the system address of each of the parts of the device.

SYSTEM ADDRESS 8254 PARTF F 0 1 COUNTER 0F F 0 3 COUNTER 1F F 0 5 COUNTER 2F F 0 7 COUNTER REGISTER

control word

8254 counter modes and applications

Note The following conventions apply to all mode timing diagrams:1. Counters are programmed for binary (not BCD) counting and for reading/writing least significant byte (LSB) only.2. The counter is always selected (CS always low).3. CW stands for ``Control Word''; CW = 10 means a control word of 10 HEX is written to the counter.4. LSB stands for ``Least Significant Byte'' of count.5. Numbers below diagrams are count values. The lower number is the least significant byte. The upper number is the most significant byte. Since the counter is programmed to read/write LSB only, the most significant byte cannot be read.N stands for an undefined count.Vertical lines show transitions between count values.

Mode 0-Interrupt on terminal count

Mode 0-example

Mode 1- Hardware-Retriggerable one-shot

Mode 1: example

Mode 2- Timed interrupt generator

Mode 2- examples

Mode 3-square-wave mode

Mode 3- examples

Mode 4- Software-Triggered strobe

Mode 4- Examples

Mode 5- hardware-Triggered strobe

Mode 5- Examples