8051 Chap3 Instruction

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    Chapter 3

    Instruction Set

    The 8051 Microcontroller

    L Ch Thng

    Ref. I. Scott Mackenzie, The 8051 Microcontroller

    Instruction Set

    255 instructions, mnemonic code

    1-3 byte instructions

    Opcode(operation code) + 0,1,2 bytes

    address, data 1-byte instructions 139

    2-byte instructions 92

    3-byte instructions 24

    2Ref. I. Scott Mackenzie L Ch Thng

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    FIGURE B1 Opcode map

    Jump, call, push, pop MOV

    3Ref. I. Scott Mackenzie L Ch Thng

    Coding format

    Opcode (operation code) + operands

    Operands addressing modes

    Register

    Direct : address

    IndirectImmediate : constant

    Relative : jump, branch, call (change PC)

    Long : call

    Indexed : array (base+offset)

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    FIGURE 31 8051 Addressing modes. (a) Register addressing (b) Direct addressing (c) Indirect addressing (d)Immediate addressing (e) Relative addressing (f) Absolute addressing (g) Long addressing (h) Indexed addressing

    Coding format

    - Addressing modes

    5Ref. I. Scott Mackenzie L Ch Thng

    Register Addressing

    Addressing Modes

    6Ref. I. Scott Mackenzie L Ch Thng

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    Register bankso Bank 0 (default), Bank 1, Bank 2, and Bank 3

    o Change register bank by selecting bits RS1 and RS0 the

    program status word (discussed next slide)

    o One bank includes 8 registers: R0 through R7

    Ex:

    Read the contents of location 05H

    into the accumulator

    MOV A, R5

    orMOV A, 05H

    Write the contents of the accumulator

    into location 00H

    MOV R0, A

    7Ref. I. Scott Mackenzie L Ch Thng

    Program Status Word (PSW)

    8Ref. I. Scott Mackenzie L Ch Thng

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    Register Addressing

    - 8 registers: R0 ~ R7

    Ex: MOV A,R6

    ADD A,R7

    - 4 banks of registers: Bank 0 (default), Bank 1, Bank 2, and Bank 3

    - The active bank is determined by bit PSW.3 & PSW.4 (reviewed inthe next 2 slides)

    Ex: MOV PSW,#00011000B; activates bank 3

    Ex: INC DPTR

    Addressing Modes

    9Ref. I. Scott Mackenzie L Ch Thng

    Direct Addressing

    Addressing Modes

    10Ref. I. Scott Mackenzie L Ch Thng

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    Bit-addressable

    RAM

    (20H-2FH)

    Register banks

    (00H-1FH) DPTR

    Using for MUL,DIV

    Internal (on-chip) data memory:

    General purpose

    RAM

    (30H-7FH)

    Special function

    registers

    (80H-FFH)11Ref. I. Scott Mackenzie L Ch Thng

    Direct Addressing

    - Access internal memory

    Ex: MOV A,30H

    ADD A,31H

    - Access special function registers: can use the mnemonicabbreviation instead of the addresses

    Ex: MOV P1,A; Accumulator Port 1

    MOV 90H,A; same

    Opcode: F5 90

    Ex: MOV R1,ACC

    MOV R1,0E0H

    MOV R1,A

    Same function, but

    Addressing Modes

    0000 A9E0 1 MOV R1,ACC0002 A9E0 2 MOV R1,0E0H0004 F9 3 MOV R1,A 12Ref. I. Scott Mackenzie L Ch Thng

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    Immediate Addressing

    - Source operand is constant

    - Use # sign

    Ex: MOV A,#12

    MOV A,#0CH

    MOV R1,#0

    ADD A,#11110001B

    MOV DPTR,#2000H

    Addressing Modes

    13Ref. I. Scott Mackenzie L Ch Thng

    Indirect Addressing

    - Address of a memory location is stored in R0 or R1

    - Use @sign to access the content of this memory location: @R0,@R1

    Ex: MOV R0,#30H

    MOV A,@R0

    Ex: Implementation of array

    MOV R0, #60H

    LOOP: MOV @R0, #0

    INC R0

    CJNE R0, #80H, LOOP

    Addressing Modes

    14Ref. I. Scott Mackenzie L Ch Thng

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    Relative Addressing

    - Used with SJMP instruction.

    - A relative address (or offset) is an 8-bit signed value.

    - It is added to PC to form a new value for PC.

    - Range: -128 ~ +127

    - Usually used with label

    Ex: SJMP LABEL1 is in memory at locations 0100H and 0101H

    PC = 0102H

    - LABEL1 is the label representing an instruction at location 0107H Relative offset is 0107H 0102H = 5

    Opcode of SJMP LABEL1 is 80 05

    Addressing Modes

    15Ref. I. Scott Mackenzie L Ch Thng

    Relative Addressing

    Addressing Modes

    FIGURE 32 Calculating the offset for relative addressing. (a) Short jump ahead inmemory (b) Short jump back in memory

    16Ref. I. Scott Mackenzie L Ch Thng

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    Absolute AddressingAddressing Modes

    FIGURE 33 Instruction encoding for absolute addressing. (a) Memory map showing 2Kpages (b) Within any 2K page, the upper five address bits are the same for the source anddestination addresses. The lower 11 bits of the destination are supplied in the instruction

    17Ref. I. Scott Mackenzie L Ch Thng

    Long Addressing

    - Used with LCALL and LJMP instruction

    - Use full 16-bit address

    - Usually used with label

    Ex: LCALL SUBPROGRAM1

    LJMP LABEL2

    Indexed Addressing- Base address (PC or DPTR) + Offset (A) Effective Address

    - Used with JMP or MOVC

    Ex: MOVC A, @A+DPTR

    JMP @A+DPTR

    Addressing Modes

    18Ref. I. Scott Mackenzie L Ch Thng

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    Instruction Types

    Data transfer

    Arithmetic

    Logical

    Boolean variable

    Program branching

    19Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryLegend

    20Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    21Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    22Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move (write) 40H to location 30H in internal

    RAM using 2 methods of addressing: direct addressing and indirect

    addressing.

    Method 1: Direct addressing

    ORG 0000H

    MOV 30H,#40H

    END

    Method 2: Indirect addressing

    ORG 0000HMOV R0,#30H

    MOV @R0,#40H

    END

    23Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to clear location 31H in internal RAM using 2

    methods of addressing: direct addressing and indirect addressing.

    Hint: to clear means to reset the data to zero.

    Method 1: Direct addressing

    ORG 0000H

    MOV 31H,#0

    ENDMethod 2: Indirect addressing

    ORG 0000H

    MOV R0,#31H

    MOV @R0,#0

    END

    24Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move (write) the content of A to location

    32H in internal RAM using 2 methods of addressing: direct

    addressing and indirect addressing.

    Method 1: Direct addressing

    ORG 0000H

    MOV 32H,A

    END

    Method 2: Indirect addressing

    ORG 0000HMOV R0,#32H

    MOV @R0,A

    END

    25Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of location 33H in internal

    RAM to register A using 2 methods of addressing: direct addressing

    and indirect addressing.

    Method 1: Direct addressing

    ORG 0000H

    MOV A,33H

    ENDMethod 2: Indirect addressing

    ORG 0000H

    MOV R0,#33H

    MOV A,@R0

    END

    26Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of location 33H in internal

    RAM to register A using 2 methods of addressing: direct addressing

    and indirect addressing.

    Method 1: Direct addressing

    ORG 0000H

    MOV A,33H

    END

    Method 2: Indirect addressing

    ORG 0000HMOV R0,#33H

    MOV A,@R0

    END

    27Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of location 34H in internal

    RAM to location 35H in internal RAM using 2 methods of

    addressing: direct addressing and indirect addressing.

    Method 1: Direct addressing

    ORG 0000H

    MOV 35H,34H

    ENDMethod 2: Indirect addressing

    ORG 0000H

    MOV R0,#34H

    MOV A,@R0

    INC R0

    MOV @R0,A

    END28Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to write 40H to location 0030H in external

    RAM.

    ORG 0000H

    MOV A,#40H

    MOV DPTR,#0030H

    MOVX @DPTR,A

    END

    29Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to clear location 0031H in externalRAM.

    ORG 0000H

    CLR A

    MOV DPTR,#0031H

    MOVX @DPTTR,A

    END

    30Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of location 0032H in

    externalRAM to register A.

    ORG 0000H

    MOV DPTR,#0032H

    MOVX A,@DPTTR

    END

    31Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of register A to location

    0033H in externalRAM.

    ORG 0000H

    MOV DPTR,#0033H

    MOVX @DPTTR,A

    END

    32Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryData Transfer

    Ex: Write a program to move the content of location 0034H in

    externalRAM to location 0035H in externalRAM.

    ORG 0000H

    MOV DPTR,#0034H

    MOVX A,@DPTTR

    INC DPTR

    MOVX @DPTR,A

    END

    33Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryArithmetic Operations

    34Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryArithmetic Operations

    35Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryArithmetic Operations

    36Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryFlag Effect

    37Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryLogic Operations

    38Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryBoolean Variable

    39Ref. I. Scott Mackenzie L Ch Thng

    8051 Instruction Set SummaryProgram Branching

    40Ref. I. Scott Mackenzie L Ch Thng

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    8051 Instruction Set SummaryProgram Branching

    41Ref. I. Scott Mackenzie L Ch Thng

    ArithmeticStatus in PSW : CY (carry/borrow), PSW.7

    OV (overflow), PSW.2

    AC (Auxiliary carry), PSW.6

    Flag 0 (zero), PSW.5

    P (Even parity), PSW.0

    RS1,0 PSW.4,3CY for unsigned integer

    OV for signed integer, (+)+(+)(-), (-)+(-)(+)

    ADDC, SUBB multi-byte operations

    DA (decimal adjustment) for BCD

    42Ref. I. Scott Mackenzie L Ch Thng

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    Examples allowed addressing mode for specifiedinstructions

    ; ADD/SUB with C/B

    MOV A, R7

    CLR C ; bit operation, used bit-address

    SUBB A, R6

    ; inc/dec data in data memory

    MOV A, direct

    INC A

    MOV direct, A

    ; 2-byte data dec

    DEC DPL

    MOV R7, DPL

    CJNE R7, #0FFH, SKIP;compare and jump if

    DEC DPH

    SKIP: .

    43Ref. I. Scott Mackenzie L Ch Thng

    ; MUL/DIV

    MUL AB

    DIV AB ;PSW status of A

    SUBB A, R6

    ; BCD addition

    MOV A, 43H

    ADD A, 41H

    DA A

    MOV 41H, A

    MOV A, 42H

    ADD A, 40H

    DA A

    MOV 40H, A

    44Ref. I. Scott Mackenzie L Ch Thng

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    LogicANL, ORL, XRL

    CLR A, CPL A (complement)

    RL, RLC

    RR, RRC

    SWAP

    MOV R7, #8

    LOOP: RLC A

    XCH A, 0F0H ; register B : 0F0HRRC A

    XCH A, 0F0H

    DJNZ R7, LOOP; dec/jump, R7- counter

    XCH A, 0F0H

    45Ref. I. Scott Mackenzie L Ch Thng

    Data transferMOV (internal memory), MOVX (external memory)

    XCH A,

    XCHD A, ; exchange digits (lower nibble)

    PUSH, POP

    PUSH : sp++; @sp data

    POP : Ri@sp ; sp--;sp (stack pointer) : 08H-7FH

    if sp>7FH; no operation

    46Ref. I. Scott Mackenzie L Ch Thng

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    ; LOOK-UP TABLE, TRICKED; usually PC can

    ; not be accessed directly

    MOV A, #ENTRY_NUMBER; n+size (RET)

    CALL LOOK_UP

    .

    ; subroutine

    LOOK_UP:

    MOVC A, @A+PC ; move constant

    RET

    TABLE:; define byte-data (array for high-level language)

    DB data1, data2, data3,

    47Ref. I. Scott Mackenzie L Ch Thng

    Time-space consideration

    ; TABLE LOOKUP - 13 bytes, 5 clocks

    SQUARE:

    INC A ; sizeof (RET), 1 clocks

    MOVC A, @A+PC ; move constant, 2 clocks

    RET ; 2 clocks

    TABLE:

    ; define data (array for high-level language

    DB 0,1,4,9,16, 25, 36, 49, 64, 81

    ; Use multiplication - 8 bytes, 13 clocks

    SQUARE:

    PUSH 0F0H ; register B ,LABEL, 2 clocks

    MOV 0F0H, A ; 1 clocks

    MUL AB ; 4 cycles

    POP 0F0H ; 2 clocks

    RET ; 2 clocks

    48Ref. I. Scott Mackenzie L Ch Thng

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    BooleanBit operand, address 0-127

    SETB

    CLR

    MOV ,

    CLR C (single instruction) compare with CLR CY

    JC LABEL (jump if CY=1)

    JB , LABEL (jump if bit==1)

    JBC , LABEL (jump if bit==1 and clear bit)

    JNC LABELJNB , LABEL

    49Ref. I. Scott Mackenzie L Ch Thng

    FIGURE 34 Simple implementation of a logic AND operation

    50Ref. I. Scott Mackenzie L Ch Thng

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    FIGURE 35 Instruction sequence for worst-case propagation delay

    LOOP:

    MOV C, P1.0

    ANL C, P1.1

    MOV P1.2,C

    SJMP LOOP

    ; XOR

    MOV C, BIT1JNB BIT2, SKIP

    CPL C

    SKIP:

    ..

    51Ref. I. Scott Mackenzie L Ch Thng

    Program branchingSJMP : 8-bit offset

    LJMP : 11-bit address (2KB segment)

    AJMP : 16-bit

    LCALL, ACALL

    ExampleMOV DPTR, #JMP_TABLE

    MOV A, #INDEX_NUMBER

    RL A ; index*2-byte

    JMP @A+DPTR

    52Ref. I. Scott Mackenzie L Ch Thng

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    Example :

    ; DJNZ : Dec and jump non-zero

    ; use as counter

    MOV R7, #10

    LOOP:

    DJNZ R7, LOOP

    ; CJNZ : compare and jump non-zero

    CJNZ A, #03H, SKIP ; 03H : control-CSJMP TERMINATE

    SKIP:

    53Ref. I. Scott Mackenzie L Ch Thng

    Example : bit-wise XOR

    XRB:

    MOV 20H, C

    ANL C, /P

    MOV 21H, C

    MOV C, P

    ANL C,/20H

    ORL C,21H

    Other ways

    (1) Use byte-wise XOR

    (2) Use JB, JNB

    54Ref. I. Scott Mackenzie L Ch Thng

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    FIGURE 38 Interface to a DIP switch and 7-segment LED

    Example : BCD to 7-segment decoder

    55Ref. I. Scott Mackenzie L Ch Thng

    Some Simple Instructions

    MOV dest,source ; dest = source

    MOV A,#72H ;A=72H

    MOV R4,#62H ;R4=62H

    MOV B,0F9H ;B=the content of F9th byte of RAM

    MOV DPTR,#7634H

    MOV DPL,#34H

    MOV DPH,#76H

    MOV P1,A ;mov A to port 1

    Note 1:MOV A,#72H MOV A,72H

    After instruction MOV A,72H the content of 72th byte of RAM willreplace in Accumulator.

    Note 2:MOV A,R3 MOV A,3

    Ref. I. Scott Mackenzie 56L Ch Thng

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    ADD A, Source ;A=A+SOURCE

    ADDA,#6 ;A=A+6

    ADDA,R6 ;A=A+R6

    ADD A,6 ;A=A+[6] or A=A+R6

    ADD A,0F3H ;A=A+[0F3H]

    SUBB A, Source ;A=A-SOURCE-C

    SUBB A,#6 ;A=A-6

    SUBB A,R6 ;A=A+R6

    Ref. I. Scott Mackenzie 57L Ch Thng

    MUL & DIV

    MUL AB ;B|A = A*B

    MOV A,#25H

    MOV B,#65H

    MUL AB ;25H*65H=0E99;B=0EH, A=99H

    DIV AB ;A = A/B, B = A mod B

    MOV A,#25

    MOV B,#10

    DIV AB ;A=2, B=5Ref. I. Scott Mackenzie 58L Ch Thng

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    SETB bit ; bit=1CLR bit ; bit=0

    SETB C ; CY=1

    SETB P0.0 ;bit 0 from port 0 =1

    SETB P3.7 ;bit 7 from port 3 =1

    SETB ACC.2 ;bit 2 from ACCUMULATOR =1

    SETB 05 ;set high D5 of RAM loc. 20h

    Note:

    CLR instruction is similar to SETB

    i.e.:

    CLR C ;CY=0

    But following instruction is only for CLR:

    CLR A ;A=0

    Ref. I. Scott Mackenzie 59L Ch Thng

    DEC byte ;byte=byte-1

    INC byte ;byte=byte+1

    INC R7

    DEC A

    DEC 40H ; [40]=[40]-1

    Ref. I. Scott Mackenzie 60L Ch Thng

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    RR RL RRC RLC A

    EXAMPLE:

    RR A

    RR:

    RRC:

    RL:

    RLC:

    C

    C

    Ref. I. Scott Mackenzie 61L Ch Thng

    ANL - ORL XRL

    Bitwise Logical Operations:

    AND, OR, XOREXAMPLE:

    MOV R5,#89H

    ANLR5,#08H

    CPL A ;1s complementExample:

    MOV A,#55H ;A=01010101 B

    L01: CPL A

    MOV P1,A

    ACALL DELAY

    SJMP L01

    Ref. I. Scott Mackenzie 62L Ch Thng

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    Stack in the 8051 The register used to

    access the stack iscalled SP (stackpointer) register.

    The stack pointer inthe 8051 is only 8 bitswide, which meansthat it can take value

    00 to FFH. When 8051powered up, the SPregister contains value07.

    7FH

    30H

    2FH

    20H

    1FH

    17H

    10H

    0FH

    07H

    08H

    18H

    00HRegister Bank 0

    (Stack) Register Bank 1

    Register Bank 2

    Register Bank 3

    Bit-Addressable RAM

    Scratch pad RAM

    Ref. I. Scott Mackenzie 63L Ch Thng

    Example:

    MOV R6,#25H

    MOV R1,#12H

    MOV R4,#0F3H

    PUSH 6

    PUSH 1

    PUSH 4

    0BH

    0AH

    09H

    08H

    Start SP=07H

    25

    0BH

    0AH

    09H

    08H

    SP=08H

    F3

    12

    25

    0BH

    0AH

    09H

    08H

    SP=08H

    12

    25

    0BH

    0AH

    09H

    08H

    SP=09H

    Ref. I. Scott Mackenzie 64L Ch Thng

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    LOOP and JUMP Instructions

    JZ Jump if A=0

    JNZ Jump if A/=0

    DJNZ Decrement and jump if A/=0

    CJNE A,byte Jump if A/=byte

    CJNE reg,#data Jump if byte/=#data

    JC Jump if CY=1

    JNC Jump if CY=0

    JB Jump if bit=1

    JNB Jump if bit=0

    JBC Jump if bit=1 and clear bit

    Conditional Jumps :

    Ref. I. Scott Mackenzie 65L Ch Thng

    DJNZ:

    Write a program to clear ACC, then

    add 3 to the accumulator ten time

    Solution:

    MOV A,#0

    MOV R2,#10AGAIN: ADD A,#03

    DJNZ R2,AGAIN ;repeat until R2=0 (10 times)

    MOV R5,A

    Ref. I. Scott Mackenzie 66L Ch Thng

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    LJMP(long jump)LJMP is an unconditional jump. It is a 3-byte instruction. Itallows a jump to any memory location from 0000 to FFFFH.

    AJMP(absolute jump)

    In this 2-byte instruction, It allows a jump to any memorylocation within the 2k block of program memory.

    SJMP(short jump)

    In this 2-byte instruction. The relative address range of 00-

    FFH is divided into forward and backward jumps, that is ,within -128 to +127 bytes of memory relative to the address ofthe current PC.

    Ref. I. Scott Mackenzie 67L Ch Thng

    CALL Instructions

    Another control transfer instruction is the CALL instruction,

    which is used to call a subroutine.

    LCALL(long call)

    This 3-byte instruction can be used to call subroutineslocated anywhere within the 64K byte address space

    of the 8051.

    ACALL (absolute call)

    ACALL is 2-byte instruction. the target addressof the subroutine must be within 2K byte range.

    Ref. I. Scott Mackenzie 68L Ch Thng

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    Example:

    Write a program to copy a block of 10 bytes from RAMlocation starting at 37h to RAM location starting at 59h.

    Solution:

    MOV R0,#37h ; source pointer

    MOV R1,#59h ; dest pointer

    MOV R2,#10 ; counter

    L1: MOV A,@R0

    MOV @R1,AINC R0

    INC R1

    DJNZ R2,L1

    Ref. I. Scott Mackenzie 69L Ch Thng

    Performing the Addition with 8051

    . 65536's 256's 1's

    . R6 R7

    + R4 R5

    = R1 R2 R3

    1.Add the low bytes R7 and R5, leave the answer in R3.

    2.Add the high bytes R6 and R4, adding any carry from step 1, and leave the answer in R2.

    3.Put any carry from step 2 in the final byte, R1.

    Ref. I. Scott Mackenzie 70L Ch Thng

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    Steps 1, 2, 3MOV A,R7 ;Move the low-byte into the accumulator

    ADD A,R5 ;Add the second low-byte to the accumulator

    MOV R3,A ;Move the answer to the low-byte of the result

    MOV A,R6 ;Move the high-byte into the accumulator

    ADDC A,R4 ;Add the second high-byte to the accumulator, plus carry.

    MOV R2,A ;Move the answer to the high-byte of the result

    MOV A,#00h ;By default, the highest byte will be zero.

    ADDC A,#00h ;Add zero, plus carry from step 2.

    MOV R1,A ;Move the answer to the highest byte of the resultRef. I. Scott Mackenzie 71L Ch Thng

    72

    References

    L Ch Thng

    I. Scott Mackenzie, The 8051 Microcontroller

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