5.1.seyler

1st AMICSA Workshop – 2 & 3 October 2006

1

Evaluation of a Evaluation of a 12 bits Video Processor 12 bits Video Processor

for Space Applicationfor Space Application

J.-Y. Seyler, F. Malou, G. Villalon ( CNES, Toulouse - France )


Presentation Plan :Presentation Plan :

The Context

The Purpose

You said « CSP » ??? CSP Functions

Preliminary Tests Preliminary Selection

From 5 to 3 candidates

Characterization Principle

Measurements Results 1 possible candidate

Complementary Tests

“ Lot Evaluation ” Tests Quality, Reliability & Radiations Evaluation

Electrical Tests

Radiations Validation


Context Context (1/2)(1/2) : :

In space applications, analog electronics for CCD signals processing uses usually specifically designed devices such as :Asics or Hybrid Circuits ...

Today :

• Performances needs are increasing ( maximum pixel frequency, linearity, noise ... )

• While the mean power consumption should be decreased

So, commercial CMOS CCD Signal ProcessorCMOS CCD Signal Processor ( CSP )are a possible solution to cope with all these constraints.


Context Context (2/2)(2/2) : :

In the last years, low power CMOS CSP where introduced on the market for wide diffusion applications ( digital imaging, video, … ).

BUT : according to their incomplete datasheets it is not possibleto accept those devices in a space payloadswithout complementary measurements !

Measurements objectives :

With a specifically developed electronic bench, characterization :

• of Critical Parameters ( linearity, noise )• and Sensibility to Environmental Influence.


In order to optimise the performance of the electronics of video equipments, we have tested several “ Video ProcessorsVideo Processors ”( or CSPCSP = “ CCD Signal Processor ” or AFEAFE = “ Analog Front End ” ).

1. PRELIMINARY TESTS :These tests were based on :

• Latchup sensitivity• Electrical performances ( some tests at several temperatures )

They have then allowed to select one possible candidate.

2. LOT EVALUATION TESTS :So, we have bought several parts from the same lot ( 2 sub-lots )and performed a “ Lot Evaluation ” :

• Lot Qualification ( “ COTS ” philosophy )• Radiation sensitivity ( Latchup, Total Dose, Single Event Upset )

Purpose :Purpose :


You said : “ You said : “ CSPCSP ” ??? : ” ??? :

• The Analog Video Signal Processing• The CSP Function


Analog Video Signal Processing :Analog Video Signal Processing :

1 single consumer “ Off-the-shelf ” electronics component may replace several functions

Video Chain

Detector

Analog Processing Electronics

Analog to Digital

Conversion

Detector Implementation

Electronics

TimingGenerator Power Supply

Interfaceto Digital Devices

N b

its

CCD CCD PROCESSORPROCESSOR

Pho

tons


You said « You said « CSPCSP » ??? » ???

What is an CSP, « CCD Signal Processor » ?

It is a Integrated Circuit which is usually composed of the following elements :

– Input DC value compensation ( Clamp ),– Correlated Double Sampling ( CDS ), – Signal scaling by Variable Gain Amplifier ( VGA ),– Analog to Digital Converter ( ADC ),– Offset Calibration Loop based on Dark Pixels.

– Additional functions : DAC, auxiliary A / D…


CSP Functions :CSP Functions :

CDS

CCD IN

VGA A/D

CONVERTER

OFFSET REGISTER

CLPDM

SHP

SHD

CLPOB

ADCCLK

Input Clamp

Correlated Double Sampling

Dark Pixel Offset Correction

Gain and A/D Conversion


Preliminary Selection :Preliminary Selection :

• Latch-Up sensitivity Test• Electrical Characterization• Selection Criteria


Preliminary Selection :Preliminary Selection :

• Latch-Up sensitivity Test ( CNES Quality Dep t ) :– Bibliographic survey– Elimination of several fab-less candidates5 types among 2 manufacturers– Latch-up tests3 candidates among 2 manufacturers

• Full Electrical Characterization :– Inter-calibration with other bench ( on 1 part already tested )– Tests ( @ SODERN )

1 only candidate left


Criteria & Selected CSPs :Criteria & Selected CSPs :

• Our need :

• 1 Channel only,• Resolution = 12 bits,• 20 MSamples / Second• Offset calibration loop ( based on dark pixels )• Programmable Gain : ~ 0 40 dB.

We have eventually selected 3 CSPs :

• Candidate 1 ( Analog Devices ) : 70 mW• Candidate 2 ( Texas Instruments ) : 80 mW• Candidate 3 ( Texas Instruments ) : 75 mW, Low Latchup

sensitivity


SEL Sensitivity / LET :SEL Sensitivity / LET :

1E-07

1E-06

1E-05

1E-04

1E-03

10 20 30 40 50 60 70

LET (MeV/mg.cm²)

SE

L X

-secti

on

(cm

²/d

ev.)

no event

no eventno event


Preliminary Tests :Preliminary Tests :

• Test Bench presentation• General Performances of the CSP• Complementary tests of the candidate• Thermal Characterization & Radiation Tests


Control Computer

Data exploitation

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

1

2

3

4

5

6

7

8

9

10

0 512 1024 1536 2048 2560 3072 3584 4096

Code de sortie de l'AFE

LS

B(1

2)

DAC 16 bits

ClocksSynthesis

•Pattern Generation•Bench Configuration•I/O bench

•Performances computation•Graphic display•Storage

CSP under Test

Palier vidéo

Palier référence

V aleur pixel

Real Timerecording

Characterization Principle :Characterization Principle :


Bench :Bench :

Video stimuli waveform

Performances :• 9.25 Mhz maxi pixel frequency• Better than +/- 2 LSB (12) integ. linearity

Benchmark and Evaluation Board


General PerformancesGeneral Performancesof the CSP :of the CSP :

• Differential Non Linearity• Integral Non Linearity• Noise Performance


Differential Non Linearity Performance :Differential Non Linearity Performance :

0 500 1000 1500 2000 2500 3000 3500 40001

0.75

0.5

0.25

0

0.25

0.5

0.75

1NLD pixels sur les pixels utiles

Pas codeur

No

n L

inéa

riré

Dif

fére

nti

elle

1

1

Bi

long0 i


Integral Non Linearity Performance :Integral Non Linearity Performance :

0 500 1000 1500 2000 2500 3000 3500 40002

1.5

1

0.5

0

0.5

1

1.5

2

2.5

3

3.5NLI pixels sur les pixels utiles

Pas codeur

Non

Lin

éari

té I

ntég

rale

3.5

2

Bi

long0 i


Noise Performance :Noise Performance :

0.4 0.6 0.8 1 1.2 1.4 1.60

0.2

0.4

0.6

0.8

Répartition du bruit (en LSB)

Bruit en LSB

1

0

fk

Distri k

upperlower intervals k


Measurements Results :Measurements Results :

• Differential Non Linearity performance• Integral Non Linearity performance• Noise performance

Comparison versus “ Space application ” requirements :

Compatible with high performances applications

… but with complementary measurements !


Complementary Tests :Complementary Tests :

• Complementary Electrical Tests• Total Dose Tests


Complementary Tests Complementary Tests (1/3)(1/3) : :

•Complementary Electrical Tests :–Some additional electrical tests ( @ room temp )–Tests at : - 20 °C, + 25 °C, + 70 °C

Consommation du VSP1221 selon la dose cumulée d’irradiation (7.5 MSPS)

0.0

50.0

100.0

150.0

200.0

250.0

300.0

initial 4.8 krad 7.2 krad 14.4 krad

33 krad Anealing 24 h

Anealing 168h

Con

som

mat

ion

(mW

)

Echantillon 1 Echantillon 2 Echantillon 3

•Total Dose Tests :Some concerns about dose rate( “ Rebound Effect ” ? )

CSP


– Electrical Tests made at ambient temperature,and related with project specifications :

• Pleiades Satellites needs• + Specific tests for next projects

( “ Post Pleiades ” & Scientific Payloads ) :– Large Reset peak– Saturated pixel– Clamp efficiency ( V_ref influence for V_util = V_ref = Ct )– Offset correction



Lot Evaluation :Lot Evaluation :

• Quality, Reliability• Electrical Tests• Radiations Validation


The Future : “ Lot Evaluation ”The Future : “ Lot Evaluation ”(at CNES)(at CNES)

• Procurement of “ Commercial Quality Level ”& “ Extended ” Temperature Range ( -20°,+85°C )

• Purpose :

Quality, Reliability & Radiations Evaluation


Quality,Reliability

&RadiationsEvaluation

Procurement 750P – DC0501250P – DC044

Construction Analysis

Radiation Test : TID + SEU

11P TID + 5P SEU DC0501

Performance Characterization

6P DC0440

Serialization

Electrical Characterization-40°C/–20°C / +25°C / +75°C/+125°C

Life Test 10P

Electrical Measurement-40°C/+25°C/+125°C

DPA

Final Report

6P DC0501

13P DC0501

13P DC0501

10P DC0501

1P

Reference3P


Specific Test Bench :Specific Test Bench :

Developed @ CNES Qual. laboratory for :• Biasing the component ( Stimuli Generation )• Static & Dynamic performances.• FPGA delivers different

digital stimuli which are transferred througha 16bits Digital to Analog Converterat the input of the CSP.

• The EXA3000( ATE ) tester ensures the control signals generation, the data reception and the processing( parameters extraction )

FPGA Ramp

CCDFormat

DAC 16 bits

1 > f > 600 MSPS

CSP under TEST

EXA3000 •DNL, INL Extraction

• Functional Characterization :

AC

DC

D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Din

Pin

8 Bits DAC

8 Bits DAC


Electrical Tests :Electrical Tests :

• Up rating / Electrical characterization at 5 temp. :- 20 °C / + 25 °C / + 75 °C conformity with the manufacturer’s

datasheet- 40 °C & + 125 °C possibility of temperature range extension ?

• Dynamic Life Test (10 parts) :– 2000 hours,– T = 125 °C,– Vcc = 3.3 V– Intermediate electrical measurement : 168 h, 500 h, 1000 h

@ Tamb = 25 °C with F = 15 Msps.– The final measurement will be done at 3 temperatures.– Final DPA

• Construction Analysis ( 6 parts ) : Identify & describe the Front-End and Back-End technologies.


Radiations Validation :Radiations Validation :

• Total Ionizing Dose :– 11 parts ( 8 On, 2 Off, 1 Ref. ) with ONERA DESP Cobalt60 Source– Total Dose : 15Krad ( Si ) & 30Krad ( 2 lots ) @ 30 rad / h– Low Dose Rate ( because of the “Rebound Effect”

found after 14 krads in previous TID test )– Annealing : 24 h / 25 °C + 168 h / 100 °C

All the datasheet parameters : measured at ambient temperature & 15 Msps.

• Heavy Ions Tests :– Previous tests showed that the CSP is not sensitive to Single Event

Latch-up for a LET of 60 MeV / mg . cm ²– Single Event Effect ( Transient, Upset or Functional Interrupt )– UCL ( Belgium ) heavy ions facilities + specific test bench

( stimuli, count, record events ) with TRAD support.


Conclusion :Conclusion :

At the end of the validation of the lot (beginning 2007), we will be able to answer to the question :

“ Is our selected CSP, coming from commercial procurement recommended for usage in our spaceflight applications ??? ”

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