3094 Dell Latitude d630 Compalm08 (Dis) Briscoe La-3302
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Transcript of 3094 Dell Latitude d630 Compalm08 (Dis) Briscoe La-3302
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Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Cover Sheet
1 66Wednesday, March 07, 2007
Compal Electronics, Inc.
2007-03-07
BOM P/N : PCB NO :
COMPAL CONFIDENTIALMODEL NAME : IBQ00
M08 (DIS) BriscoeuFCPGA Mobile MeromIntel Crestline + ICH8M
REV : 0.4 (X03)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-3302P ( DAA00000K0L)45144731L01
@ : Nopop Component1@ : Populate for G72MV2@ : Populate for G86MV45144731L01 pop for G86MV45144XXXXX pop for G72MV
Part Number Description
DAA00000K0L PCB ZGX LA-3302PREV0 M/B DIS
MB PCB
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Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Block Diagram
2 66Monday, February 26, 2007
Compal Electronics, Inc.
Clock Generator
DMI
Compal confidentialModel : IBQ01
Azalia Codec
Memory BUS(DDR2)
+1.5V_RUN 100MHz
+1.8V_SUS 533 / 667MHz
PATA
MDC
CK505
STAC9205
Azalia I/F
RJ11D Moudle+5V_MOD
+VDDA
+3.3V_M
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
CPU ITP Port+FAN1_VOUT
SATA
+3.3V_RUN
GUARDIAN IIIEMC4001
Thermal
+3.3V_SUS
FAN
S-HDD+5V_HDD
+1.05V_VCCP
DELL CONFIDENTIAL/PROPRIETARY
page 18
page 18
page6page 7
page 21,22,23,24
page 25 page 25 page 26
page 33
page 16,17
DVI
RGB
TV
DOCKINGBUFFER
page 35
DOCKINGPORT
page 36 page 30
PCI BUS
CardBusOZ711 LQFP
(+3VRUN 33MHz)
IDSEL:AD17(PIRQD#,GNT#1,REQ#1)
+3.3V_RUN
Mini Card2
+3.3V_WLAN
WLAN+3.3V_RUN
Mini Card 1
PCI Express BUS
+1.5V_RUN+1.5V_RUN page 28,29
GIGA Enthernet+3.3V_LAN
RJ45
(+1.5V_RUN 100MHz)
BCM5755MWWAN
page 34page 34
48MHz
USB[9]
USB[6]
SC_USB
AMP & INT.Speaker
HeadPhone& MIC Jack
+5V_RUN +3.3V_RUNpage 27 page 27
INT MIC+VDDA
+5V_RUN
IO/BIO/B
+1.25V_RUN
uFCPGA CPU
INTEL
H_A#(3..35) H_D#(0..63)
Pentium-M
System BusFSB 800 MHz
1299pin BGA
Crestline
+1.8V_SUS
+VCC_CORE
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
478pin
Merom -4MB (Socket P)
+3.3V_RUN
+1.8V_RUN
page 7,8,9
page 10,11,12,13,14,15
INTELICH8-M
676pin BGA
page 21,22,23,24+1.05V_VCCP
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
USB0 : side pair top,USB1 : side pair bottom
USB2 : Rear Left as viewed from the back,USB3 Rear Right as viewed from the back
USB Ports X2
Smart Card+5V_RUN page 31
OZ77CR6
IO/Board
SLOT
+5V_SUS
USB[2,3] USB Ports X2+5V_SUS page 32
USB[4]
USB[0,1] SIDE
REAR
IEEE1394
page 27
+RTC_CELL
page 30
PCI_PIRQA#REQ#0GNT#0
Block Diagram
+2.5V_LAN+1.2V_LAN
+1.25V_RUN
+1.25V_GFX_PCIE
+GPU_CORE(1.1V)
page 51,52,53,54,55,56,57
NV G86PCI-E 16X
+5V_RUNCRT CONN
page 20
+INV_PWR_SRC
+LCDVDD
LVDS CONN
page 19
page 39
page 37
COM
+3.3V_SUSST M25P16
+3.3V_ALW+RTC_CELL
MEC5025page 39
SPI
ECE1077page 37
Stick
page 40
Int.KBD &Stick
page 40+5V_RUN
Touch Pad
LPC BUS+3VRUN33MHz
SMSC SIO
+3.3V_ALW
ECE5028page 38
page 40
Bluetooth
USB[7]
+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
SPI
Trough CableUSB[5]
page 40
Biometric+3.3V_RUN
page 48
Vccore
1.8V / 0.9V/1.25Vpage 46
page 44
DC IN
page 50
Chargerpage 49
Battery Select
PWR Sequencepage 42
1.5V / 1.05Vpage 47
Battery INpage 44
page 45
3V / 5V /15V
ME & LEDpage 43
DOCK LPC BUS
DOCK LPC BUS USB[8]
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Index and Config.
3 66Monday, February 26, 2007
Compal Electronics, Inc.
PIRQ
PM TABLE
PCI DEVICE IDSEL
PCI TABLE
REQ#/GNT#
OZ711
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
ICH8-M
MINI CARD-2 WLAN
None
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
REQ#1 / GNT#1AD17 PIRQD
AD24 REQ#0 / GNT#0
MINI CARD-1 WWAN
POWER STATES
S0 (Full ON) / M0
SLP S3#
SLPS5#
HIGH
SignalState
SLPS4#
HIGH HIGH HIGH
S4STATE#
ALWAYSPLANE
ON
MPLANE
ON
SUSPLANE
RUNPLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH ON ON ON ONOFF
S4 (Suspend to DISK) / M1 ON ON ON ONOFF
SLPM#
HIGH
HIGH
LOW HIGH HIGH HIGHLOW
S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
8
9
PIRQADocking
Side Top
Side Bottom
Rear Left
Rear Right
Smart Card
Biometric
Card Bus
Bluetooth
Docking
WWAN
Lane 5
Lane 6
None
None
GIGA LAN
ECE 5028
1
2
3
4
None
None
None
None
+2.5V_RUN+1.25V_M+3.3V_M +1.25V_M
+3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+1.05V_VCCP
+3.3V_SUS+5V_SUS
+5V_ALW
+1.8V_RUN
+5V_RUN+3.3V_RUN
+3.3V_ALW +1.8V_SUS
+0.9V_DDR_VTT
+1.5V_RUN+VCC_+1P2V_GPU_CORE
+GPU_CORE
S0
S3
S5 S4/AC don't exist
+VCC_CORE
ON
powerplane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO+1.05V_M +1.05V_M
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Power Rail
4 66Monday, February 26, 2007
Compal Electronics, Inc.
+5V_SUS
BATTERY+PWR_SRC
ADAPTER
+VDDA
MAX9789A
FDS4435 +INV_PWR_SRCRUN_ON
SI3456SI3456BDV
HD
DC
_EN
#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_MOD
MO
DC
_EN
#
+VCC_CORE
ISL88550A
RU
NP
WR
OK
ISL6260CHARGER
AUD
IO_A
VD
D_O
N
SUS_ON
+3.3V_ALWALWON
ISL6236
+15V_ALW+5V_ALW
ALWON
SI3456BDV
ENAB
_3V
LAN
+3.3V_LAN
+3.3V_SUS
RUN_ON
+1.8V_LAN +1.0V_LAN
CTR
L_18
SI4810DY
RU
N_O
N
+3.3V_RUN
+5V_HDD
(Q24)
(PU11) (PU6)
1.05
V_R
UN
_ON
+1.05V_VCCP +1.5V_RUN
1.5V
_RU
N_O
N
ISL6236(PU21)
(Q48)(Q56) (U37)
(PU20)
(Q44)
BCP69 BCP69(Q46)(Q45)
(Q58)
CTR
L_10
ISL6236(PU25)
M_ON
+1.25V_M
+GPU_COREGFX_CORE_ON
MAX1510E(PU26) +1.05V_M
ISlL
8855
0_A
VD
D
+1.8V_SUS +0.9V_DDR_VTT
DD
R_O
N
+5V_RUNSI4810DY(Q52)
SI3456BDV
+1.8VRUN
RU
N_O
N
(Q54)
MAX1510E(PU26) +1.25V_RUN
RUN_ON
SI4800BDY
+3.3V_M
(Q67)
M_O
N
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
SMBUS TOPOLOGY
5 66Monday, February 26, 2007
Compal Electronics, Inc.
MEC 5025
ICH8-M
INVERTER
ICH_SMBDATA
ICH_SMBCLK
SIO
PBAT_SMBCLKPBAT_SMBDAT
CHARGER
AD19
AJ26
7
8
5
6
SMBUS Address [TBD]
CLK_SCLK
9
10
111
112
WWAN
SMBUS Address [TBD]
3032
SMBUS Address [TBD]
SBAT_SMBDAT9
102'ndBATTERY
3
4
SBAT_SMBCLK
100
99 THRM_SMBDAT
12
11
Intel LAN
C8C7
SMBUS Address [TBD]
(JLVDS)
LCD_SMBCLK
LCD_SMDATA
EMC4001THRM_SMBCLK
+3.3V_SUS
2.2K
2.2K
4.7K
4.7K
2.2K
100 ohm
100 ohm
2.2K
+3.3V_ALW
8.2K
8.2K
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
100 ohm
100 ohm BATTERYCONN
3
4 SMBUS Address [TBD]
SMBUS Address [TBD]
32 30
5
6
SMBUS Address [TBD]
8.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
6
5
8.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
2N7002MEM_SCLK
MEM_SDATA 195 DIMMA
SMBUS Address [TBD]
197
2N7002
+3.3V_RUN
2.2K
2.2K
DIMMB
SMBUS Address [TBD]
195
197
16
17CKG_SMBDAT
CKG_SMBCLK CLK GEN SMBUS Address [TBD]2N7002
2N7002
12
13
+3.3V_RUN
2.2K
2.2K
CLK_SDATA
WLAN2N7002
2N7002
WLAN_SMBCLK
WLAN_SMBDATA
+3.3V_WLAN
2.2K
2.2K
CLK_SDATA
SMBUS Address [TBD]Charger10
9
CLK_SCLK@ 0
@ 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CK_VDD_MAIN
CLK_ICH_14MCLK_SIO_14M
CLK_PCI_ICH
CLK_SMC_48MCLK_ICH_48M
CLK_PCI_PCM
CLKREF
PCI_LOM
CLK_XTAL_OUT
PGMODE
CLK_SCLK
CLK_SDATA
FSA
CPU_BCLK#CLK_XTAL_IN
CLK_SDATA
CLK_NVSS
+CK_VDD_REFMCH_BCLK
+CK_VDD_48
CLK_SCLK
PCI_PCM
CLK_PWRGD
CPU_BCLK
CPU_ITP
PCI_ICH
DOT96
CPU_ITP#
MCH_BCLK#
CLK_NVSS_27M
+CK_VDD_A
+CK_VDD_REF
CLK_PCI_5018
CLK_PCI_5025
CLK_PCI_TPMCLK_PCI_DOCK
PCI_SIO
PCI_DOCK
PCIE_MINI1
PCIE_MINI1#
MINI1CLK_REQ#
PCIE_SATA
PCIE_SATA#
MINI2CLK_REQ#
PCIE_MINI2
PCIE_MINI2#
PCIE_ICH
PCIE_ICH#
MCH_3GPLL#
MCH_3GPLL
CLK_3GPLLREQ#
SATA_CLKREQ#
+CK_VDD_48
FSC
PCI_ICH
PCI_LOM
PCI_PCM
FSA
PCIE_LOM#
PCIE_LOM
PCIE_VGA#
PCIE_VGA
LOM_CLKREQ#
CLK_PCIE_MINI2#
CLK_MCH_BCLK
CLK_PCIE_VGA
CLK_MCH_3GPLL
CLK_PCIE_MINI1#
CLK_PCIE_SATA#
CLK_MCH_3GPLL#
CLK_PCIE_MINI2
CLK_CPU_BCLK
CLK_PCIE_SATA
CLK_MCH_BCLK#
H_STP_PCI#
CLK_PCIE_LOM
CLK_CPU_BCLK#
H_STP_CPU#
CLK_CPU_ITP#
CLK_PCIE_ICH
CLK_CPU_ITP
CLK_PCIE_MINI1
CLK_PCIE_VGA#
CLK_PCIE_LOM#
CLK_PCIE_ICH#
CLK_SMC_48MCLK_ICH_48M
CLK_ICH_14M
CLK_SIO_14M
CLK_PCI_TPM
CLK_PCI_DOCK
CLK_PCI_PCM
CLK_PCI_5025
CLK_PCI_5018
CLK_PCI_ICH
CLK_NV_27M
+CK_VDD_MAIN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+CK_VDD_MAIN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN +3.3V_RUN
CKG_SMBCLK39
CKG_SMBDAT39
CLK_ICH_14M23CLK_SIO_14M38
CLK_PCI_ICH21
CLK_SMC_48M31CLK_ICH_48M23
CLK_PCI_PCM30
CLK_PWRGD23
CLK_NVSS_27M52
CLK_NV_27M52
CLK_PCI_501838
CLK_PCI_502539
CLK_PCI_TPM28CLK_PCI_DOCK36
CPU_MCH_BSEL18,10
CPU_MCH_BSEL28,10
CPU_MCH_BSEL08,10
CLK_PCIE_ICH 23
CLK_CPU_ITP 7
H_STP_PCI# 23
CLK_PCIE_LOM 28
CLK_PCIE_MINI1 34
CLK_PCIE_VGA# 52
CLK_PCIE_ICH# 23
H_STP_CPU# 23
CLK_3GPLLREQ# 10
CLK_CPU_BCLK 7
CLK_PCIE_VGA 52
MINI2CLK_REQ# 34
SATA_CLKREQ# 23
CLK_PCIE_SATA 22
CLK_MCH_3GPLL# 10
CLK_CPU_BCLK# 7
LOM_CLKREQ# 28
CLK_PCIE_MINI2# 34
CLK_PCIE_SATA# 22
MINI1CLK_REQ# 34
CLK_MCH_3GPLL 10
CLK_MCH_BCLK 10
CLK_PCIE_LOM# 28
CLK_MCH_BCLK# 10
CLK_PCIE_MINI2 34
CLK_CPU_ITP# 7
CLK_PCIE_MINI1# 34
CLK_SDATA34
CLK_SCLK34
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Clock Generator
6 66Thursday, March 01, 2007
Compal Electronics, Inc.
Place crystal within500 mils of CK410
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
200 100 33.3
*
*
ITP_EN
1
0
PIN 37
Pin 5/6 as SRC_10
Pin 5/6 as CPU_ITP
*
PGMODE
1
0
PIN 9
VTT_PWRGD#/PD
CKPWRGD/PD#
FCTSEL1 PIN43 PIN44 PIN47 PIN48
1=DIS
0=UMA DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
TME
1
0
PIN 32
Normal Operation
Trusted Mode Enabled
0=UMA1=Disc. GRFX down
Populate R697,R833 for G72MVPopulate R286 for G86MV.R833,R286 place overlap
R311 33_0402_5%~D
1 2
R272 33_0402_5%~D
1 2
R4400_0402_5%~D
@1 2
C79
90.
047U
_040
2_16
V4Z~
D
1
2
C7753.3P_0402_50V8C~D @
1
2
R303 33_0402_5%~D
1 2
R301 10K_0402_5%~D
1 2
R29510K_0402_5%~D
@
1 2
C7813.3P_0402_50V8C~D@
1
2
R306 33_0402_5%~D
1 2
L87BLM21PG600SN1D_0805~D
1 2
R280 33_0402_5%~D
12
R288 33_0402_5%~D
1 2
R307 33_0402_5%~D
1 2C7793.3P_0402_50V8C~D@
1
2
R315 10K_0402_5%~D
1 2
C47
40.
1U_0
402_
16V4
Z~D
1
2
R419 475_0402_1%~D
1 2
C7763.3P_0402_50V8C~D @
1
2
R314 8.2K_0402_5%~D
1 2
R281 33_0402_5%~D
1 2
R286 33_0402_5%~D 2@ 1 2
C99
4.7U
_060
3_6.
3V4Z
~D
1
2
R299 33_0402_5%~D
1 2
R270 33_0402_5%~D
1 2
R313 33_0402_5%~D
1 2
R275 15_0402_5%~D
1 2
C47
60.
1U_0
402_
16V4
Z~D
1
2
C7803.3P_0402_50V8C~D@
1
2
C48327P_0402_50V8J~D
12
G
D S
Q342N7002W-7-F_SOT323-3~D
2
1 3
C48
20.
1U_0
402_
16V4
Z~D
1
2
R310 10K_0402_5%~D 1 2
C47
90.
047U
_040
2_16
V4Z~
D
1
2C47
84.
7U_0
603_
6.3V
4Z~D
1
2
C47
10.
1U_0
402_
16V4
Z~D
1
2
R596 33_0402_5%~D
12
C18
90.
047U
_040
2_16
V4Z~
D
1
2
C7783.3P_0402_50V8C~D@
1
2
R297 10K_0402_5%~D 1 2
SLG8LP550
U28
SLG8LP550_QFN72~D
VDD_SRC1VDD_SRC49
VDD_SRC65
VDD_PCI30VDD_PCI36
VDD_4840
VDD_CPU12
VDD_REF18
USB_48MHz/FSLA41
FSL_B/TEST_MODE45
XTAL_OUT19
XTAL_IN20
VSS_PCI31
PCICLK2/TME32
REF_0/FSL_C/TEST_SEL23
SMBDAT17
SMBCLK16
PCICLK_F0/ITP_EN37
PGMODE9
CPU_STP# 24
CPU_1 11
CPU_1# 10
CPU_ITP/SRC_10 6
PCICLK333
PCICLK4/FCT_SEL34
CPU_0# 13
CPU_0 14
PCI_STP# 25
VSS_A 8
VDD_A 7
VSS_PCI35
CPU_ITP#/SRC_10# 5
VSS_REF21
VSS_CPU15
VSS_SRC4
VSS_4842
VSS_SRC68
DOT_96/27M43
DOT_96#/27M_SS44
CKPWRGD/PD#39
REF_122 SRC_7 66
SRC_7# 67
SRC_8 70
SRC_8# 69
SRC_9 3
SRC_9# 2
SRC_1#/SATA# 51
LCD_CLK/SRC_0 47
SRC_2 52
SRC_4 58
SRC_1/SATA 50
CLKREQ_4# 57
SRC_2# 53
SRC_5# 61
SRC_4# 59
SRC_5 60
LCD_CLK#/SRC_0# 48
SRC_3# 56
SRC_3 55
SRC_6 63
SRC_6# 64
CLKREQ_6# 62
CLKREQ_8# 71
CLKREQ_9# 72
CLKREQ_1# 46
CLKREQ_5# 29
CLKREQ_3# 28
CLKREQ_2# 26
CLKREQ_7# 38
VDD_SRC54
PCICLK127
THRM_PAD73
THRM_PAD76
THRM_PAD74THRM_PAD75
C47
30.
1U_0
402_
16V4
Z~D
1
2
R274 33_0402_5%~D
1 2
X114.31818MHz_20P_1BX14318CC1A~D
12
R39110K_0402_5%~D@
12
R273 15_0402_5%~D
12
C77
43.
3P_0
402_
50V8
C~D
1
2
C47
50.
1U_0
402_
16V4
Z~D
1
2
R267 33_0402_5%~D
1 2
C47
70.
1U_0
402_
16V4
Z~D
1
2
R293 33_0402_5%~D
1 2
R285 15_0402_5%~D
1 2
R279 33_0402_5%~D
1 2
R759
2.2_0603_5%~D
1 2
R302 33_0402_5%~D
1 2
R294 33_0402_5%~D
1 2
R287 33_0402_5%~D
1 2
R283 10K_0402_5%~D 1 2
C48
010
U_0
805_
10V4
Z~D
1
2
R435
0_0402_5%~D
@1 2
R32910K_0402_5%~D@
12
C7773.3P_0402_50V8C~D@
1
2C
708
3.3P
_040
2_50
V8C
~D
1
2
R29010K_0402_5%~D
12
R268 33_0402_5%~D
1 2
R168 33_0402_5%~D
1 2
R760
1_0603_5%~D 1 2
C7853.3P_0402_50V8C~D@
1
2
R298
10K_0402_5%~D
@ 1 2
R31910K_0402_5%~D
@
12
R282 15_0402_5%~D
12
C47
210
U_0
805_
10V4
Z~D
1
2
R31810K_0402_5%~D
12
R284 15_0402_5%~D
1 2
R309 2.2K_0402_5%~D
1 2
R758 2.2_0603_5%~D 1 2
R30410K_0402_5%~D
12
R289 33_0402_5%~D
1 2
R833 147_0402_1%~D1@ 1 2
R26
62.
2K_0
402_
5%~D
12
R333 15_0402_5%~D
1 2
G
D S
Q352N7002W-7-F_SOT323-3~D
2
1 3
R69784.5_0402_1%~D
1@
12
L28BLM21PG600SN1D_0805~D
1 2
R277 33_0402_5%~D
12
C48
10.
1U_0
402_
16V4
Z~D
1
2
R26
52.
2K_0
402_
5%~D
12
R291 33_0402_5%~D 12
R2710_0402_5%~D1 2
R269 33_0402_5%~D
1 2
C48433P_0402_50V8J~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ITP_TRST#
ITP_TCK
ITP_DBRESET#
H_THERMTRIP#
H_RESET#
H_INIT#
CLK_CPU_BCLK
H_HIT#
H_LOCK#
ITP_TRST#
H_INTR
H_ADS#
CLK_CPU_ITP
H_DRDY#
H_RS#1
ITP_BPM#3
H_BR0#
H_RESET#
ITP_TCK
H_SMI#
ITP_DBRESET#
H_STPCLK#
H_DEFER#
CLK_CPU_BCLK#
ITP_DBRESET#
H_ADSTB#1
EC_CPU_PROCHOT#
H_FERR#
ITP_BPM#0ITP_BPM#1
H_RS#2
H_RESET#
ITP_TDO
H_TRDY#
H_NMI
ITP_BPM#4
H_BNR#
H_HITM#
CLK_CPU_ITP#
H_A20M#
H_IGNNE#
H_RS#0
H_DBSY#
ITP_TDO
H_IERR#
ITP_BPM#2
H_BPRI#
ITP_BPM#5
H_A#27
H_REQ#1
H_A#18
H_A#15
H_A#10
H_A#13
H_REQ#0
H_REQ#3
H_A#32
H_A#21
H_A#14
H_A#30
H_A#35
H_A#3
H_A#17
H_A#22
H_A#25H_A#26
H_A#19
H_A#31
H_A#33
H_A#9
H_A#28
H_A#20
H_A#23
H_A#29
H_REQ#2
H_ADSTB#0
H_A#7
H_A#24
H_A#4
H_A#8
H_A#12
H_A#5
H_A#16
H_REQ#4
H_A#34
H_A#11
H_A#6
H_THERMTRIP#
H_THERMDA
H_THERMDC
ITP_TMS
ITP_TMS
ITP_TDI
ITP_TDI
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_LOCK# 10
CLK_CPU_BCLK 6
H_THERMDA 18
H_INIT# 22
H_BNR# 10
H_IGNNE#22
H_A20M#22
H_DEFER# 10
H_SMI#22
H_RS#0 10
H_ADSTB#110
H_NMI22
H_TRDY# 10
H_BPRI# 10
H_DRDY# 10
H_HITM# 10
CLK_CPU_BCLK# 6
H_HIT# 10
H_FERR#22
CLK_CPU_ITP6
H_STPCLK#22
H_RS#2 10
ITP_DBRESET# 23,38
H_ADS# 10
H_RESET# 10
H_THERMTRIP# 18H_INTR22
H_RS#1 10
CLK_CPU_ITP#6
H_BR0# 10
H_DBSY# 10
H_REQ#210H_REQ#310
H_REQ#010
H_ADSTB#010
H_A#[3..35]10
H_REQ#410
H_REQ#110
H_THERMDC 18
EC_CPU_PROCHOT# 39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Merom Processor(1/2)
7 66Thursday, March 01, 2007
Compal Electronics, Inc.
This shall place near CPU
Place near JITP
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil
R32551_0402_5%~D
T48 PAD~D
R331649_0402_1%~D
1 2
R32122.6_0402_1%~D
1 2
C486
0.1U_0402_16V4Z~D
@
1
2
ADDR GROUP 0
ADDR GROUP 1
CONTROL
XDP/ITP SIGNALS
THERMAL
ICH
H CLK
RESERVED
JCPUA
TYCO_1-1674770-2_Merom~D
A[3]#J4A[4]#L5A[5]#L4A[6]#K5A[7]#M3A[8]#N2A[9]#J1A[10]#N3A[11]#P5A[12]#P2A[13]#L2A[14]#P4A[15]#P1A[16]#R1ADSTB[0]#M1
REQ[0]#K3REQ[1]#H2REQ[2]#K2REQ[3]#J3REQ[4]#L1
A[17]#Y2A[18]#U5A[19]#R3A[20]#W6A[21]#U4A[22]#Y5A[23]#U1A[24]#R4A[25]#T5A[26]#T3A[27]#W2A[28]#W5A[29]#Y4A[30]#U2A[31]#V4A[32]#W3A[33]#AA4A[34]#AB2A[35]#AA3ADSTB[1]#V1
A20M#A6FERR#A5IGNNE#C4
STPCLK#D5
SMI#A3
LINT0C6LINT1B4
RSVD[01]M4RSVD[02]N5RSVD[03]T2RSVD[04]V3RSVD[05]B2RSVD[06]C3RSVD[07]D2RSVD[08]D22RSVD[09]D3RSVD[10]F6
ADS# H1BNR# E2BPRI# G5
DEFER# H5DRDY# F21DBSY# E1
BR0# F1
IERR# D20INIT# B3
LOCK# H4
RESET# C1RS[0]# F3RS[1]# F4RS[2]# G3
HIT# G6HITM# E4
BPM[0]# AD4BPM[1]# AD3BPM[2]# AD1BPM[3]# AC4PRDY# AC2PREQ# AC1
TCK AC5TDI AA6
TDO AB3TMS AB5
TRDY# G2
TRST# AB6DBR# C20
PROCHOT# D21
THERMTRIP# C7
THERMDA A24THERMDC B25
BCLK[0] A22BCLK[1] A21
R320
56_0402_5%~D
12
R32839_0402_1%~D
T51 PAD~D
T49 PAD~DT50 PAD~D
R324150_0402_5%~D 1 2
R330150_0402_5%~D
JITP
MOLEX_52435-2891_28P~D@
TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13
BPM4#15
BPM3#17
BPM2#19
BPM1#21
BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128
GND114
GND216
GND318
GND420
GND522
GN
D6
29G
ND
730
C485
0.1U_0402_16V4Z~D
@
1
2
R33227_0402_1%~D
JCPUD
TYCO_1-1674770-2_Merom~D
VSS[001]A4VSS[002]A8VSS[003]A11VSS[004]A14VSS[005]A16VSS[006]A19VSS[007]A23VSS[008]AF2VSS[009]B6VSS[010]B8VSS[011]B11VSS[012]B13VSS[013]B16VSS[014]B19VSS[015]B21VSS[016]B24VSS[017]C5VSS[018]C8VSS[019]C11VSS[020]C14VSS[021]C16VSS[022]C19VSS[023]C2VSS[024]C22VSS[025]C25VSS[026]D1VSS[027]D4VSS[028]D8VSS[029]D11VSS[030]D13VSS[031]D16VSS[032]D19VSS[033]D23VSS[034]D26VSS[035]E3VSS[036]E6VSS[037]E8VSS[038]E11VSS[039]E14VSS[040]E16VSS[041]E19VSS[042]E21VSS[043]E24VSS[044]F5VSS[045]F8VSS[046]F11VSS[047]F13VSS[048]F16VSS[049]F19VSS[050]F2VSS[051]F22VSS[052]F25VSS[053]G4VSS[054]G1VSS[055]G23VSS[056]G26VSS[057]H3VSS[058]H6VSS[059]H21VSS[060]H24VSS[061]J2VSS[062]J5VSS[063]J22VSS[064]J25VSS[065]K1VSS[066]K4VSS[067]K23
VSS[082] P6VSS[083] P21VSS[084] P24VSS[085] R2VSS[086] R5VSS[087] R22VSS[088] R25VSS[089] T1VSS[090] T4VSS[091] T23VSS[092] T26VSS[093] U3VSS[094] U6VSS[095] U21VSS[096] U24VSS[097] V2VSS[098] V5VSS[099] V22VSS[100] V25VSS[101] W1VSS[102] W4VSS[103] W23VSS[104] W26VSS[105] Y3VSS[106] Y6VSS[107] Y21VSS[108] Y24VSS[109] AA2VSS[110] AA5VSS[111] AA8VSS[112] AA11VSS[113] AA14VSS[114] AA16
VSS[068]K26VSS[069]L3VSS[070]L6VSS[071]L21VSS[072]L24VSS[073]M2VSS[074]M5VSS[075]M22VSS[076]M25VSS[077]N1VSS[078]N4VSS[079]N23VSS[080]N26VSS[081]P3
VSS[115] AA19VSS[116] AA22VSS[117] AA25VSS[118] AB1VSS[119] AB4VSS[120] AB8VSS[121] AB11VSS[122] AB13VSS[123] AB16VSS[124] AB19VSS[125] AB23VSS[126] AB26VSS[127] AC3VSS[128] AC6VSS[129] AC8VSS[130] AC11VSS[131] AC14VSS[132] AC16VSS[133] AC19VSS[134] AC21VSS[135] AC24VSS[136] AD2VSS[137] AD5VSS[138] AD8VSS[139] AD11VSS[140] AD13VSS[141] AD16VSS[142] AD19VSS[143] AD22VSS[144] AD25VSS[145] AE1VSS[146] AE4VSS[147] AE8VSS[148] AE11VSS[149] AE14VSS[150] AE16VSS[151] AE19VSS[152] AE23VSS[153] AE26VSS[154] A2VSS[155] AF6VSS[156] AF8VSS[157] AF11VSS[158] AF13VSS[159] AF16VSS[160] AF19VSS[161] AF21VSS[162] A25VSS[163] AF25
R32651_0402_1%~D
C4172200P_0402_50V7K~D
1
2
T47 PAD~D
R32756_0402_5%~D 1 2
T52 PAD~D
R32356_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
CPU_MCH_BSEL2CPU_MCH_BSEL1
H_D#5
H_D#23
H_D#15
H_D#11H_D#10
H_D#1
H_D#19
H_D#0
H_D#9
H_D#31
H_D#21
H_DSTBN#1
TEST2
H_D#29
H_D#25
H_D#14
H_D#6
H_DSTBP#0H_DSTBN#0
H_D#3
H_D#26
H_D#13
CPU_MCH_BSEL0
H_D#7
H_D#4
H_D#30
H_D#27
H_D#20
TEST1
H_DINV#1
H_D#18
H_D#12
TEST4
H_D#8
H_D#24
H_D#2
H_D#16
H_DINV#0
H_D#17
H_D#22
H_DSTBP#1
H_D#28
H_D#32
H_DSTBP#2
H_D#60
H_DINV#2
H_D#61
H_D#36
H_D#48
H_D#57
H_D#34
COMP3
COMP1
H_D#33
H_DINV#3
H_D#52
H_DPWR#
H_DSTBN#2
H_DSTBP#3
H_DPSLP#
H_D#59
H_D#46
H_D#55
H_D#53
H_D#40H_D#39
H_PSI#
H_DSTBN#3
H_D#51
H_D#42
COMP0
H_D#58
H_D#49
H_D#45
H_CPUSLP#
H_D#47
H_D#37
H_D#63
H_D#43
H_PWRGOOD
H_D#62
H_D#54
H_D#44
H_D#41
H_D#56
H_D#50
H_D#38
COMP2
H_DPRSTP#
H_D#35
VID4
VID1
VSSSENSE
VID3
VID0
VID2
VID6
VCCSENSE
VID5TEST3
TEST5
TEST1TEST2
TEST6
TEST6
TEST3TEST5
TEST4
+1.05V_VCCP
V_CPU_GTLREF
+VCC_CORE +VCC_CORE
+1.05V_VCCP
+1.5V_RUN
+VCC_CORE
V_CPU_GTLREF
H_D#[0..63]10
H_DINV#2 10
H_DINV#3 10
H_DSTBN#3 10
H_DSTBN#2 10H_DSTBP#2 10
H_DSTBP#3 10
VCCSENSE 48
VSSSENSE 48
VID0 48VID1 48VID2 48VID3 48VID4 48VID5 48VID6 48
H_DPSLP# 22
H_PWRGOOD 22H_CPUSLP# 10
H_DPWR# 10
H_DPRSTP# 10,22,48
H_PSI# 48CPU_MCH_BSEL16,10CPU_MCH_BSEL26,10
H_DSTBP#110
CPU_MCH_BSEL06,10
H_DSTBN#110
H_DINV#010
H_DSTBN#010
H_DINV#110
H_DSTBP#010
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Merom Processor(2/2)
8 66Thursday, March 01, 2007
Compal Electronics, Inc.Layout close CPU PIN AD2655 ohm, 0.5 inch (max)
Place R342 and R343 near CPU
Route VCCSENSE and VSSSENSE trace at27.4 ohms, 7 mils spacing and 1 inch (max)
Length match within 25 mils, Z0=27.4 ohm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB was 270uF
FSB
533
For the purpose of testability, route these signalsthrough a ground referenced Z0 = 55ohm trace thatends in a via that is near a GND via and isaccessible through an oscilloscope connection.
Place C490 close to theCPU_TEST4 pin. Make sureCPU_TEST4 routing isreference to GND and awayfrom other noisy signal.
BCLK BSEL2 BSEL1 BSEL0
667
800
133
166
200
0 0 1
110
1 00
Resistor placed within 0.5" ofCPU pin.Trace should be at least25 mils away from any othertoggling signal. COMP0, COMP2trace should be 27.4 ohm.COMP1, COMP3 should be 55ohm.
R338
27.4_0402_1%~D
12
DATA GRP 0
DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
JCPUB
TYCO_1-1674770-2_Merom~D
D[0]#E22D[1]#F24D[2]#E26D[3]#G22D[4]#F23D[5]#G25D[6]#E25D[7]#E23D[8]#K24D[9]#G24D[10]#J24D[11]#J23D[12]#H22D[13]#F26D[14]#K22D[15]#H23DSTBN[0]#J26DSTBP[0]#H26DINV[0]#H25
D[16]#N22D[17]#K25D[18]#P26D[19]#R23D[20]#L23D[21]#M24D[22]#L22D[23]#M23D[24]#P25D[25]#P23D[26]#P22D[27]#T24D[28]#R24D[29]#L25D[30]#T25D[31]#N25DSTBN[1]#L26DSTBP[1]#M26DINV[1]#N24
GTLREFAD26
TSET1C23TEST2D25
BSEL[0]B22BSEL[1]B23BSEL[2]C21
D[32]# Y22D[33]# AB24D[34]# V24D[35]# V26D[36]# V23D[37]# T22D[38]# U25D[39]# U23D[40]# Y25D[41]# W22D[42]# Y23D[43]# W24D[44]# W25D[45]# AA23D[46]# AA24D[47]# AB25
DSTBN[2]# Y26DSTBP[2]# AA26
DINV[2]# U22
D[48]# AE24D[49]# AD24D[50]# AA21D[51]# AB22D[52]# AB21D[53]# AC26D[54]# AD20D[55]# AE22D[56]# AF23D[57]# AC25D[58]# AE21D[59]# AD21D[60]# AC22D[61]# AD23D[62]# AF22D[63]# AC23
DSTBN[3]# AE25DSTBP[3]# AF24
DINV[3]# AC20
COMP[0] R26COMP[1] U26COMP[2] AA1COMP[3] Y1
DPRSTP# E5DPSLP# B5DPWR# D24
SLP# D7PSI# AE6
PWRGOOD D6
TEST3C24TEST4AF26TEST5AF1TEST6A26
R341
1K_0402_1%~D
12
+
C487
220U_D
2_4VY
_R15M
~D
1
2
R337
54.9_0402_1%~D
12
JCPUC
TYCO_1-1674770-2_Merom~D
VCC[001]A7VCC[002]A9VCC[003]A10VCC[004]A12VCC[005]A13VCC[006]A15VCC[007]A17VCC[008]A18VCC[009]A20VCC[010]B7VCC[011]B9VCC[012]B10VCC[013]B12VCC[014]B14VCC[015]B15VCC[016]B17VCC[017]B18VCC[018]B20VCC[019]C9VCC[020]C10VCC[021]C12VCC[022]C13VCC[023]C15VCC[024]C17VCC[025]C18VCC[026]D9VCC[027]D10VCC[028]D12VCC[029]D14VCC[030]D15VCC[031]D17VCC[032]D18VCC[033]E7VCC[034]E9VCC[035]E10VCC[036]E12VCC[037]E13VCC[038]E15VCC[039]E17VCC[040]E18VCC[041]E20VCC[042]F7VCC[043]F9VCC[044]F10VCC[045]F12VCC[046]F14VCC[047]F15VCC[048]F17VCC[049]F18VCC[050]F20VCC[051]AA7VCC[052]AA9VCC[053]AA10VCC[054]AA12VCC[055]AA13VCC[056]AA15VCC[057]AA17VCC[058]AA18VCC[059]AA20VCC[060]AB9VCC[061]AC10VCC[062]AB10VCC[063]AB12VCC[064]AB14VCC[065]AB15VCC[066]AB17VCC[067]AB18
VCC[068] AB20VCC[069] AB7VCC[070] AC7VCC[071] AC9VCC[072] AC12VCC[073] AC13VCC[074] AC15VCC[075] AC17VCC[076] AC18VCC[077] AD7VCC[078] AD9VCC[079] AD10VCC[080] AD12VCC[081] AD14VCC[082] AD15VCC[083] AD17VCC[084] AD18VCC[085] AE9VCC[086] AE10VCC[087] AE12VCC[088] AE13VCC[089] AE15VCC[090] AE17VCC[091] AE18VCC[092] AE20VCC[093] AF9VCC[094] AF10VCC[095] AF12VCC[096] AF14VCC[097] AF15VCC[098] AF17VCC[099] AF18VCC[100] AF20
VCCP[01] G21VCCP[02] V6VCCP[03] J6VCCP[04] K6VCCP[05] M6VCCP[06] J21VCCP[07] K21VCCP[08] M21VCCP[09] N21VCCP[10] N6VCCP[11] R21VCCP[12] R6VCCP[13] T21VCCP[14] T6VCCP[15] V21VCCP[16] W21
VCCA[1] B26
VID[0] AD6VID[1] AF5VID[2] AE5VID[3] AF4VID[4] AE3VID[5] AF3VID[6] AE2
VCCSENSE AF7
VSSSENSE AE7
VCCA[2] C26
R344
2K_0402_1%~D
12
R340
27.4_0402_1%~D
12
R342
100_0402_1%~D
1 2
R39
40_
0402
_5%
~D
@
12
C489
10U_0805_10V4Z~D
1
2
C488
0.01U_0402_16V7K~D
1
2
T30PAD~D
C49
00.
1U_0
402_
16V4
Z~D
@1
2
R33
61K
_040
2_5%
~D@
12
R343
100_0402_1%~D
1 2
R33
51K
_040
2_5%
~D @
12
T31PAD~D
R339
54.9_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE +VCC_CORE
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
CPU Bypass
9 66Monday, February 26, 2007
Compal Electronics, Inc.
10uF 0805 X6S -> 85 degree C
High Frequence Decoupling
ESR <= 1.5m ohmCapacitor > 1980uF
Near VCORE regulator.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
Place these insidesocket cavity on L8(North sidePrimary)
Place these insidesocket cavity on L8(Sorth sidePrimary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
North Side Secondary
BITs WI97837
C3120.1U_0402_10V7K~D
1
2
C22710U_0805_4VAM~D
1
2
C22910U_0805_4VAM~D
1
2
C5410U_0805_4VAM~D
1
2
C33210U_0805_4VAM~D
1
2
C2930.1U_0402_10V7K~D
1
2
C22210U_0805_4VAM~D
1
2
C5210U_0805_4VAM~D
1
2
C6410U_0805_4VAM~D
1
2
C36310U_0805_4VAM~D
1
2
C6610U_0805_4VAM~D
1
2
C33310U_0805_4VAM~D
1
2
+
C33
822
0U_X
_2VM
_R7M
~D@
1
2
C5010U_0805_4VAM~D
1
2
C8700.1U_0402_10V7K~D@
1
2
C2640.1U_0402_10V7K~D
1
2
C33110U_0805_4VAM~D
1
2
C5110U_0805_4VAM~D
1
2
+
C17
922
0U_X
_2VM
_R7M
~D
1
2
C5310U_0805_4VAM~D
1
2
C2500.1U_0402_10V7K~D
1
2
C3100.1U_0402_10V7K~D
1
2
C22510U_0805_4VAM~D
1
2
C8710.1U_0402_10V7K~D@
1
2
C6810U_0805_4VAM~D
1
2
C22310U_0805_4VAM~D
1
2
+
C17
722
0U_X
_2VM
_R7M
~D
1
2
C18510U_0805_4VAM~D
1
2
C5510U_0805_4VAM~D
1
2
C8720.1U_0402_10V7K~D@
1
2
C6510U_0805_4VAM~D
1
2
C33510U_0805_4VAM~D
1
2
+
C17
822
0U_X
_2VM
_R7M
~D@
1
2
C22810U_0805_4VAM~D
1
2
C2560.1U_0402_10V7K~D
1
2
C8730.1U_0402_10V7K~D@
1
2
C33010U_0805_4VAM~D
1
2
+
C36
622
0U_X
_2VM
_R7M
~D
1
2
C19010U_0805_4VAM~D
1
2
C33610U_0805_4VAM~D
1
2
C22410U_0805_4VAM~D
1
2
C36410U_0805_4VAM~D
1
2
C33410U_0805_4VAM~D
1
2
+
C36
522
0U_X
_2VM
_R7M
~D
1
2
C6710U_0805_4VAM~D
1
2
C32910U_0805_4VAM~D
1
2
C6910U_0805_4VAM~D
1
2
C22610U_0805_4VAM~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_EXTTS#0
PM_EXTTS#1
THERMTRIP_MCH#
H_DSTBP#1
H_DINV#1
H_DEFER#
H_A#30
H_A#8
H_D#57
H_D#53
H_D#40
H_D#35
H_D#17
H_HITM#
H_A#17
H_A#3
H_SCOMP
H_D#56
H_D#51
H_D#43
H_D#16H_D#15
H_DBSY#
H_A#32
H_A#16
H_A#7
H_D#58
H_D#54
H_ADSTB#0
H_A#27
H_A#19
H_D#24
H_D#2
H_SWNG
H_LOCK#
H_A#21
H_RESET#
H_D#61
H_D#10
H_D#8
H_DSTBP#3
H_TRDY#
H_ADSTB#1
H_A#25
H_A#5
H_D#55
H_D#41
H_D#20H_D#19
H_D#5
H_DINV#2
H_A#33
H_A#12
H_A#10H_A#9
H_D#60
H_D#47
H_D#1
H_VREF
H_DSTBN#2
H_DRDY#
CLK_MCH_BCLK#
H_BNR#
H_A#18
H_A#11
H_A#6
H_D#63
H_D#48
H_D#36
H_D#32
H_D#13
H_RS#2
H_RS#0
H_D#59
H_D#49
H_D#39
H_D#34
H_D#23
H_D#9
H_D#0
H_REQ#3
H_DSTBP#2
H_BR0#
H_A#34
H_A#4
H_SWNG
H_D#46
H_D#27
H_D#18
H_D#12
H_DSTBN#0
H_HIT#
H_A#20
H_A#14
H_SCOMP#
H_D#30
H_D#25
H_DINV#3
H_BPRI#
H_A#29
H_A#22
H_A#15
H_D#38
H_D#33
H_D#31
H_D#26
H_REQ#2
H_D#21
H_D#14
H_D#4
H_DSTBN#3
H_DINV#0
H_A#35
H_A#28
H_CPUSLP#
H_RCOMP
H_D#52
H_D#37
H_D#3
H_RS#1
H_DSTBP#0
H_DSTBN#1
H_A#26
H_A#24H_A#23
H_D#62
H_D#22
H_D#7H_D#6
H_VREF
H_REQ#1
H_DPWR#
CLK_MCH_BCLK
H_A#31
H_D#50
H_D#28
H_REQ#4
H_REQ#0
H_ADS#
H_A#13
H_D#45H_D#44
H_D#42
H_D#29
H_D#11
V_DDR_MCH_REF
M_ODT2
DDR_CS0_DIMMA#
CL_RST0#
M_CLK_DDR1
PM_BMBUSY#
SMRCOMP_VOH
DDR_CKE0_DIMMA
M_CLK_DDR2
M_CLK_DDR0
CFG9
MCH_ICH_SYNC#
ICH_CL_PWROK
DDR_CKE1_DIMMA
H_DPRSTP#
SMRCOMP#SMRCOMP
M_CLK_DDR#3
SMRCOMP_VOH
CL_VREF
CL_DATA0
M_ODT1M_ODT0
DDR_CS1_DIMMA#
DDR_CKE2_DIMMB
M_CLK_DDR#1M_CLK_DDR#0
SMRCOMP_VOL
DPRSLPVR
CL_CLK0
CFG16
CFG5
CLK_MCH_3GPLL
SMRCOMP_VOL
M_CLK_DDR3
CLK_3GPLLREQ#
DDR_CS3_DIMMB#
PLTRST1#_R
CFG20
DDR_CKE3_DIMMB
PM_EXTTS#1PM_EXTTS#0
M_ODT3
THERMTRIP_MCH#
M_CLK_DDR#2
CLK_MCH_3GPLL#
DDR_CS2_DIMMB#
ICH_PWRGD
CFG19
DMI_MRX_ITX_N0
DMI_MRX_ITX_N2DMI_MRX_ITX_N1
DMI_MRX_ITX_N3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N3DMI_MTX_IRX_N2DMI_MTX_IRX_N1
DMI_MTX_IRX_P0
DMI_MTX_IRX_P2DMI_MTX_IRX_P1
DMI_MTX_IRX_P3
DMI_MRX_ITX_P0DMI_MRX_ITX_P1DMI_MRX_ITX_P2DMI_MRX_ITX_P3
PLTRST1#PLTRST1#_R
+1.05V_VCCP
+1.05V_VCCP+1.05V_VCCP
+3.3V_RUN
+1.05V_VCCP
+1.25V_RUN
+1.8V_SUS
+1.8V_SUS
V_DDR_MCH_REF
H_A#[3..35] 7
H_ADSTB#1 7H_ADSTB#0 7
H_TRDY# 7
H_HIT# 7
H_LOCK# 7
H_DEFER# 7
H_BPRI# 7H_BR0# 7
H_DPWR# 8H_DRDY# 7
H_DBSY# 7
CLK_MCH_BCLK# 6CLK_MCH_BCLK 6
H_BNR# 7
H_ADS# 7
H_DINV#1 8H_DINV#0 8
H_DINV#2 8H_DINV#3 8
H_HITM# 7
H_D#[0..63]8
H_RS#1 7H_RS#2 7
H_RS#0 7
H_DSTBP#1 8H_DSTBP#0 8
H_DSTBP#3 8H_DSTBP#2 8
H_REQ#0 7H_REQ#1 7H_REQ#2 7H_REQ#3 7H_REQ#4 7
H_DSTBN#0 8
H_DSTBN#2 8H_DSTBN#1 8
H_DSTBN#3 8
H_RESET#7H_CPUSLP#8
CL_DATA023
DDR_CKE2_DIMMB17
M_ODT317
DDR_CKE3_DIMMB17
DPRSLPVR 23,48
DDR_CKE1_DIMMA16
CFG16 12
M_CLK_DDR217
CPU_MCH_BSEL1 6,8
CFG9 12
M_CLK_DDR#116
M_CLK_DDR317
CFG20 12
CFG5 12
M_CLK_DDR116
THERMTRIP_MCH# 18
M_ODT016
CLK_MCH_3GPLL#6
M_CLK_DDR#016
CLK_3GPLLREQ#6
CPU_MCH_BSEL2 6,8
PM_EXTTS#0 16
M_CLK_DDR016
PM_BMBUSY# 23
CL_RST0#23
M_CLK_DDR#217
CLK_MCH_3GPLL6
ICH_PWRGD 23,42
DDR_CS3_DIMMB#17
DDR_CKE0_DIMMA16
MCH_ICH_SYNC#23
M_ODT116
DDR_CS0_DIMMA#16
CL_CLK023
H_DPRSTP# 8,22,48
PM_EXTTS#1 17
DDR_CS1_DIMMA#16
M_CLK_DDR#317
M_ODT217
CFG19 12
DDR_CS2_DIMMB#17
CPU_MCH_BSEL0 6,8
ICH_CL_PWROK23,39
DMI_MRX_ITX_N023
DMI_MRX_ITX_N223DMI_MRX_ITX_N123
DMI_MRX_ITX_N323
DMI_MTX_IRX_N323DMI_MTX_IRX_N223DMI_MTX_IRX_N123DMI_MTX_IRX_N023
DMI_MTX_IRX_P323
DMI_MTX_IRX_P123DMI_MTX_IRX_P223
DMI_MTX_IRX_P023
DMI_MRX_ITX_P223DMI_MRX_ITX_P323
DMI_MRX_ITX_P123DMI_MRX_ITX_P023
SB_NB_PCIE_RST# 21
PLTRST1# 21
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(1 of 6)
10 66Thursday, March 01, 2007
Compal Electronics, Inc.
Layout Note:H_RCOMP trace widthand spacing is 10/20
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
R35410K_0402_5%~D
12
T71 PAD~D
R34620_0402_1%~D
1 2
T42PAD~D
C496
0.1U_0402_16V4Z~D
1
2
T68 PAD~D
R774 0_0402_5%~D 12
T69 PAD~D
T67 PAD~D
R3631K_0402_1%~D
12
C497
0.1U_0402_16V4Z~D
1
2
R347
54.9_0402_1%~D
12
RSVDCFG
PMNC
DDR MUXING
CLK
DMI
GRAPHICS VID
MEMISC
U29B
LE88CLPM A0 QM21_FCBGA1299~D
RSVD1 P36RSVD2 P37RSVD3 R35RSVD4 N35RSVD5 AR12RSVD6 AR13RSVD7 AM12RSVD8 AN13RSVD9 J12
RSVD10 AR37RSVD11 AM36RSVD12 AL36RSVD13 AM37RSVD14 D20
TEST_1A37
RSVD20 H10RSVD21 B51RSVD22 BJ20RSVD23 BK22RSVD24 BF19RSVD25 BH20RSVD26 BK18RSVD27 BJ18RSVD28 BF23RSVD29 BG23RSVD30 BC23RSVD31 BD24RSVD32 BH39RSVD33 AW20RSVD34 BK20RSVD35 C48RSVD36 D47RSVD37 B44RSVD38 C44RSVD39 A35RSVD40 B37RSVD41 B36RSVD42 B34RSVD43 C34
TEST_2R32
CFG_0 P27CFG_1 N27CFG_2 N24CFG_3 C21CFG_4 C23CFG_5 F23CFG_6 N23CFG_7 G23CFG_8 J20CFG_9 C20
CFG_10 R24CFG_11 L23CFG_12 J23CFG_13 E23CFG_14 E20CFG_15 K23CFG_16 M20CFG_17 M24CFG_18 L32CFG_19 N33CFG_20 L35
PM_BM_BUSY# G41PM_DPRSTP# L39
PM_EXT_TS#_0 L36PM_EXT_TS#_1 J36
PWROK AW49RSTIN# AV20
THERMTRIP# N20DPRSLPVR G36
NC_1 BJ51NC_2 BK51NC_3 BK50NC_4 BL50NC_5 BL49NC_6 BL3NC_7 BL2NC_8 BK1NC_9 BJ1
NC_10 E1NC_11 A5NC_12 C51NC_13 B50NC_14 A50NC_15 A49NC_16 BK2
SM_CK_0AV29SM_CK_1BB23SM_CK_3BA25SM_CK_4AV23
SM_CK#_0AW30SM_CK#_1BA23SM_CK#_3AW25SM_CK#_4AW23
SM_CKE_0BE29SM_CKE_1AY32SM_CKE_3BD39SM_CKE_4BG37
SM_CS#_0BG20SM_CS#_1BK16SM_CS#_2BG16SM_CS#_3BE13
SM_ODT_0BH18SM_ODT_1BJ15SM_ODT_2BJ14SM_ODT_3BE16
SM_RCOMPBL15SM_RCOMP#BK14
SM_RCOMP_VOHBK31SM_RCOMP_VOLBL31
SM_VREF_0AR49SM_VREF_1AW4
DPLL_REF_CLKB42DPLL_REF_CLK#C42DPLL_REF_SSCLKH48DPLL_REF_SSCLK#H47
PEG_CLK#K45 PEG_CLKK44
DMI_RXN_0AN47DMI_RXN_1AJ38DMI_RXN_2AN42DMI_RXN_3AN46
DMI_RXP_0AM47DMI_RXP_1AJ39DMI_RXP_2AN41DMI_RXP_3AN45
DMI_TXN_0AJ46DMI_TXN_1AJ41DMI_TXN_2AM40DMI_TXN_3AM44
DMI_TXP_0AJ47DMI_TXP_1AJ42DMI_TXP_2AM39DMI_TXP_3AM43
GFX_VID_0E35GFX_VID_1A39GFX_VID_2C38GFX_VID_3B39
GFX_VR_ENE36
CL_CLKAM49CL_DATAAK50CL_PWROKAT43CL_RST#AN49CL_VREFAM50
SDVO_CTRL_CLKH35SDVO_CTRL_DATAK36CLK_REQ#G39ICH_SYNC#G40
T66 PAD~D
C49
80.
01U
_040
2_16
V7K~
D
1
2
R351392_0402_1~D
12
R362
100_0402_1%~D
12
T64 PAD~D
C49
52.
2U_0
603_
6.3V
6K~D
1
2
R34520_0402_1%~D
1 2
T46PAD~D
T75 PAD~D
R348
54.9_0402_1%~D
12
R3593.01K_0402_1%~D
12
C49
92.
2U_0
603_
6.3V
6K~D
1
2
R36100_0402_5%~D
1 2
T70 PAD~D
T44PAD~D
R35856_0402_5%~D
1 2
T73 PAD~DT72 PAD~D
T45PAD~D
HOST
U29A
LE88CLPM A0 QM21_FCBGA1299~D
H_D#_0E2H_D#_1G2H_D#_2G7H_D#_3M6H_D#_4H7H_D#_5H3H_D#_6G4H_D#_7F3H_D#_8N8H_D#_9H2H_D#_10M10H_D#_11N12H_D#_12N9H_D#_13H5H_D#_14P13H_D#_15K9H_D#_16M2H_D#_17W10H_D#_18Y8H_D#_19V4H_D#_20M3H_D#_21J1H_D#_22N5H_D#_23N3H_D#_24W6H_D#_25W9H_D#_26N2H_D#_27Y7H_D#_28Y9H_D#_29P4H_D#_30W3H_D#_31N1H_D#_32AD12H_D#_33AE3H_D#_34AD9H_D#_35AC9H_D#_36AC7H_D#_37AC14H_D#_38AD11H_D#_39AC11H_D#_40AB2H_D#_41AD7H_D#_42AB1H_D#_43Y3H_D#_44AC6H_D#_45AE2H_D#_46AC5H_D#_47AG3H_D#_48AJ9H_D#_49AH8H_D#_50AJ14H_D#_51AE9H_D#_52AE11H_D#_53AH12H_D#_54AJ5H_D#_55AH5H_D#_56AJ6H_D#_57AE7H_D#_58AJ7H_D#_59AJ2H_D#_60AE5H_D#_61AJ3H_D#_62AH2H_D#_63AH13
H_SWINGB3H_RCOMPC2
H_SCOMPW1H_SCOMP#W2
H_CPURST#B6H_CPUSLP#E5
H_AVREFB9H_DVREFA9
H_A#_3 J13H_A#_4 B11H_A#_5 C11H_A#_6 M11H_A#_7 C15H_A#_8 F16H_A#_9 L13
H_A#_10 G17H_A#_11 C14H_A#_12 K16H_A#_13 B13H_A#_14 L16H_A#_15 J17H_A#_16 B14H_A#_17 K19H_A#_18 P15H_A#_19 R17H_A#_20 B16H_A#_21 H20H_A#_22 L19H_A#_23 D17H_A#_24 M17H_A#_25 N16H_A#_26 J19H_A#_27 B18H_A#_28 E19H_A#_29 B17H_A#_30 B15H_A#_31 E17H_A#_32 C18H_A#_33 A19H_A#_34 B19H_A#_35 N19
H_ADS# G12H_ADSTB#_0 H17H_ADSTB#_1 G20
H_BNR# C8H_BPRI# E8
H_BREQ# F12H_DEFER# D6
H_DBSY# C10HPLL_CLK AM5
HPLL_CLK# AM7H_DPWR# H8H_DRDY# K7
H_HIT# E4H_HITM# C6H_LOCK# G10H_TRDY# B7
H_DINV#_0 K5H_DINV#_1 L2H_DINV#_2 AD13H_DINV#_3 AE13
H_DSTBN#_0 M7H_DSTBN#_1 K3H_DSTBN#_2 AD2H_DSTBN#_3 AH11
H_DSTBP#_0 L7H_DSTBP#_1 K2H_DSTBP#_2 AC2H_DSTBP#_3 AJ10
H_REQ#_0 M14H_REQ#_1 E13H_REQ#_2 A11H_REQ#_3 H13H_REQ#_4 B12
H_RS#_0 E12H_RS#_1 D7H_RS#_2 D8
T63 PAD~D
T43PAD~D
R35720K_0402_5%~D
12
C49
20.
1U_0
402_
16V4
Z~D
1
2
C4930.1U_0402_16V4Z~D
1
2
T74 PAD~D
R3491K_0402_1%~D
12
R3531K_0402_1%~D
12
R355
1K_0402_1%~D
12
R5890_0402_5%~D@
12
R361
2K_0402_1%~D
12
T65 PAD~D
C49
10.
1U_0
402_
16V4
Z~D
1
2
C49
40.
01U
_040
2_16
V7K~
D
1
2
R350
24.9_0402_1%~D
12
R5830_0402_5%~D
12
R356
221_0402_1%~D
12
R35210K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_WE#
SB_RCVEN#SA_RCVEN#
DDR_A_BS1DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA1
DDR_A_DQS#3
DDR_A_DQS6
DDR_A_MA7
DDR_A_DM4
DDR_A_DQS#0
DDR_A_DM3
DDR_A_DM0
DDR_A_DQS#4
DDR_A_MA13
DDR_A_RAS#
DDR_A_MA2
DDR_A_DQS2
DDR_A_MA8
DDR_A_MA12
DDR_A_MA0
DDR_A_DQS0
DDR_A_DQS7
DDR_A_DM6
DDR_A_DQS#1
DDR_A_DQS#5
DDR_A_DM7
DDR_A_MA11
DDR_A_DQS#7
DDR_A_DQS#2
DDR_A_DQS4
DDR_A_MA5DDR_A_MA4
DDR_A_DQS1
DDR_A_MA3
DDR_A_MA9
DDR_A_BS2
DDR_A_DM2
DDR_A_DM5
DDR_A_MA6
DDR_A_MA10
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DM1
DDR_A_DQS3
DDR_A_D53
DDR_A_D47
DDR_A_D41
DDR_A_D31
DDR_A_D18
DDR_A_D61
DDR_A_D30
DDR_A_D25DDR_A_D24
DDR_A_D39
DDR_A_D37
DDR_A_D17
DDR_A_D20
DDR_A_D13
DDR_A_D11
DDR_A_D9
DDR_A_D51
DDR_A_D5
DDR_A_D26
DDR_A_D8
DDR_A_D60
DDR_A_D57
DDR_A_D48
DDR_A_D12
DDR_A_D35
DDR_A_D33
DDR_A_D40
DDR_A_D32
DDR_A_D7
DDR_A_D62
DDR_A_D58
DDR_A_D46
DDR_A_D43
DDR_A_D3
DDR_A_D23
DDR_A_D16
DDR_A_D6
DDR_A_D54
DDR_A_D42
DDR_A_D36
DDR_A_D34
DDR_A_D52
DDR_A_D45DDR_A_D44
DDR_A_D19
DDR_A_D10
DDR_A_D4
DDR_A_D21
DDR_A_D0
DDR_A_D22
DDR_A_D56DDR_A_D55
DDR_A_D28
DDR_A_D14
DDR_A_D63
DDR_A_D50
DDR_A_D38
DDR_A_D29
DDR_A_D27
DDR_A_D15
DDR_A_D59
DDR_A_D49
DDR_A_D2DDR_A_D1 DDR_B_BS1
DDR_B_BS0
DDR_B_CAS#
DDR_B_BS2
DDR_B_DM7
DDR_B_DQS2
DDR_B_DQS#7
DDR_B_DM2
DDR_B_MA10
DDR_B_DQS#5
DDR_B_DQS#0
DDR_B_DM5
DDR_B_MA6
DDR_B_MA12
DDR_B_DQS#4
DDR_B_DM1
DDR_B_MA3
DDR_B_DQS#6
DDR_B_DQS4
DDR_B_MA2
DDR_B_DQS5
DDR_B_DM0
DDR_B_MA9
DDR_B_DQS#3
DDR_B_DM6
DDR_B_MA1DDR_B_MA0
DDR_B_DQS#1
DDR_B_DM3
DDR_B_MA8
DDR_B_DQS1
DDR_B_RAS#
DDR_B_MA11
DDR_B_DQS3
DDR_B_MA13
DDR_B_DQS6
DDR_B_MA7
DDR_B_MA4
DDR_B_DM4
DDR_B_MA5
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0
DDR_B_D35
DDR_B_D11
DDR_B_D39
DDR_B_D1
DDR_B_D40
DDR_B_D36
DDR_B_D22
DDR_B_D59
DDR_B_D51
DDR_B_D8
DDR_B_D21
DDR_B_D44
DDR_B_D2
DDR_B_D4
DDR_B_D15
DDR_B_D31
DDR_B_D48
DDR_B_D41DDR_B_D42
DDR_B_D17
DDR_B_D47
DDR_B_D19
DDR_B_D45
DDR_B_D50
DDR_B_D61
DDR_B_D7
DDR_B_D58
DDR_B_D10
DDR_B_D56
DDR_B_D49
DDR_B_D26
DDR_B_D53
DDR_B_D0
DDR_B_D43
DDR_B_D14
DDR_B_D9
DDR_B_D23
DDR_B_D46
DDR_B_D12
DDR_B_D63
DDR_B_D38
DDR_B_D57
DDR_B_D27
DDR_B_D34
DDR_B_D29
DDR_B_D54
DDR_B_D25
DDR_B_D55
DDR_B_D13
DDR_B_D18
DDR_B_D52
DDR_B_D30
DDR_B_D24
DDR_B_D37
DDR_B_D60
DDR_B_D62
DDR_B_D5
DDR_B_D20
DDR_B_D32
DDR_B_D28
DDR_B_D6
DDR_B_D33
DDR_B_D16
DDR_B_D3
DDR_A_MA14 DDR_B_MA14
DDR_B_D[0..63] 17DDR_A_D[0..63] 16
DDR_B_BS217
DDR_B_DQS[0..7]17
DDR_B_CAS#17DDR_B_RAS#17
DDR_B_MA[0..14]17
DDR_B_WE#17
DDR_B_DM[0..7]17
DDR_B_BS017DDR_B_BS117
DDR_A_WE#16
DDR_A_BS016
DDR_A_DQS#[0..7]16
DDR_A_BS116
DDR_A_MA[0..14]16
DDR_A_BS216
DDR_A_RAS#16
DDR_A_DQS[0..7]16
DDR_A_CAS#16
DDR_B_DQS#[0..7]17
DDR_A_DM[0..7]16
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(2 of 6)
11 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
T11
DDR SYSTEM MEMORY B
U29E
LE88CLPM A0 QM21_FCBGA1299~D
SB_DQ_0 AP49SB_DQ_1 AR51SB_DQ_2 AW50SB_DQ_3 AW51SB_DQ_4 AN51SB_DQ_5 AN50SB_DQ_6 AV50SB_DQ_7 AV49SB_DQ_8 BA50SB_DQ_9 BB50
SB_DQ_10 BA49SB_DQ_11 BE50SB_DQ_12 BA51SB_DQ_13 AY49SB_DQ_14 BF50SB_DQ_15 BF49SB_DQ_16 BJ50SB_DQ_17 BJ44SB_DQ_18 BJ43SB_DQ_19 BL43SB_DQ_20 BK47SB_DQ_21 BK49SB_DQ_22 BK43SB_DQ_23 BK42SB_DQ_24 BJ41SB_DQ_25 BL41SB_DQ_26 BJ37SB_DQ_27 BJ36SB_DQ_28 BK41SB_DQ_29 BJ40SB_DQ_30 BL35SB_DQ_31 BK37SB_DQ_32 BK13SB_DQ_33 BE11SB_DQ_34 BK11SB_DQ_35 BC11SB_DQ_36 BC13SB_DQ_37 BE12SB_DQ_38 BC12SB_DQ_39 BG12SB_DQ_40 BJ10SB_DQ_41 BL9SB_DQ_42 BK5SB_DQ_43 BL5SB_DQ_44 BK9SB_DQ_45 BK10SB_DQ_46 BJ8SB_DQ_47 BJ6SB_DQ_48 BF4SB_DQ_49 BH5SB_DQ_50 BG1SB_DQ_51 BC2SB_DQ_52 BK3SB_DQ_53 BE4SB_DQ_54 BD3SB_DQ_55 BJ2SB_DQ_56 BA3SB_DQ_57 BB3SB_DQ_58 AR1SB_DQ_59 AT3SB_DQ_60 AY2SB_DQ_61 AY3SB_DQ_62 AU2SB_DQ_63 AT2
SB_BS_0AY17SB_BS_1BG18SB_BS_2BG36
SB_CAS#BE17
SB_DM_0AR50SB_DM_1BD49SB_DM_2BK45SB_DM_3BL39SB_DM_4BH12SB_DM_5BJ7SB_DM_6BF3SB_DM_7AW2
SB_DQS_0AT50SB_DQS_1BD50SB_DQS_2BK46SB_DQS_3BK39SB_DQS_4BJ12SB_DQS_5BL7SB_DQS_6BE2SB_DQS_7AV2
SB_DQS#_0AU50SB_DQS#_1BC50SB_DQS#_2BL45SB_DQS#_3BK38SB_DQS#_4BK12SB_DQS#_5BK7SB_DQS#_6BF2SB_DQS#_7AV3
SB_MA_0BC18SB_MA_1BG28SB_MA_2BG25SB_MA_3AW17SB_MA_4BF25SB_MA_5BE25SB_MA_6BA29SB_MA_7BC28SB_MA_8AY28SB_MA_9BD37SB_MA_10BG17SB_MA_11BE37SB_MA_12BA39SB_MA_13BG13
SB_RAS#AV16
SB_RCVEN#AY18
SB_WE#BC17
SB_MA_14BE24
T10
DDR SYSTEM MEMORY A
U29D
LE88CLPM A0 QM21_FCBGA1299~D
SA_DQ_0 AR43SA_DQ_1 AW44SA_DQ_2 BA45SA_DQ_3 AY46SA_DQ_4 AR41SA_DQ_5 AR45SA_DQ_6 AT42SA_DQ_7 AW47SA_DQ_8 BB45SA_DQ_9 BF48
SA_DQ_10 BG47SA_DQ_11 BJ45SA_DQ_12 BB47SA_DQ_13 BG50SA_DQ_14 BH49SA_DQ_15 BE45SA_DQ_16 AW43SA_DQ_17 BE44SA_DQ_18 BG42SA_DQ_19 BE40SA_DQ_20 BF44SA_DQ_21 BH45SA_DQ_22 BG40SA_DQ_23 BF40SA_DQ_24 AR40SA_DQ_25 AW40SA_DQ_26 AT39SA_DQ_27 AW36SA_DQ_28 AW41SA_DQ_29 AY41SA_DQ_30 AV38SA_DQ_31 AT38SA_DQ_32 AV13SA_DQ_33 AT13SA_DQ_34 AW11SA_DQ_35 AV11SA_DQ_36 AU15SA_DQ_37 AT11SA_DQ_38 BA13SA_DQ_39 BA11SA_DQ_40 BE10SA_DQ_41 BD10SA_DQ_42 BD8SA_DQ_43 AY9SA_DQ_44 BG10SA_DQ_45 AW9SA_DQ_46 BD7SA_DQ_47 BB9SA_DQ_48 BB5SA_DQ_49 AY7SA_DQ_50 AT5SA_DQ_51 AT7SA_DQ_52 AY6SA_DQ_53 BB7SA_DQ_54 AR5SA_DQ_55 AR8SA_DQ_56 AR9SA_DQ_57 AN3SA_DQ_58 AM8SA_DQ_59 AN10SA_DQ_60 AT9SA_DQ_61 AN9SA_DQ_62 AM9SA_DQ_63 AN11
SA_BS_0BB19SA_BS_1BK19SA_BS_2BF29
SA_CAS#BL17
SA_DM_0AT45SA_DM_1BD44SA_DM_2BD42SA_DM_3AW38SA_DM_4AW13SA_DM_5BG8SA_DM_6AY5SA_DM_7AN6
SA_DQS_0AT46SA_DQS_1BE48SA_DQS_2BB43SA_DQS_3BC37SA_DQS_4BB16SA_DQS_5BH6SA_DQS_6BB2SA_DQS_7AP3
SA_DQS#_0AT47SA_DQS#_1BD47SA_DQS#_2BC41SA_DQS#_3BA37SA_DQS#_4BA16SA_DQS#_5BH7SA_DQS#_6BC1SA_DQS#_7AP2
SA_MA_0BJ19SA_MA_1BD20SA_MA_2BK27SA_MA_3BH28SA_MA_4BL24SA_MA_5BK28SA_MA_6BJ27SA_MA_7BJ25SA_MA_8BL28SA_MA_9BA28SA_MA_10BC19SA_MA_11BE28SA_MA_12BG30SA_MA_13BJ16
SA_RAS#BE18
SA_RCVEN#AY20
SA_WE#BA19
SA_MA_14BJ29
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_MTX_GRX_C_P3
PEG_MTX_GRX_C_P5
PEG_MTX_GRX_C_P6
PEG_MTX_GRX_C_P7
PEG_MTX_GRX_C_P8
PEG_MTX_GRX_C_P9
PEG_MTX_GRX_C_P10
PEG_MTX_GRX_C_P11
PEG_MTX_GRX_C_P12PEG_MTX_GRX_C_N12
PEG_MTX_GRX_C_N13PEG_MTX_GRX_C_P13
PEG_MTX_GRX_C_P14PEG_MTX_GRX_C_N14
PEG_MTX_GRX_C_P15PEG_MTX_GRX_C_N15
PEG_MTX_GRX_P1
PEG_MTX_GRX_P2
PEG_MTX_GRX_P3
PEG_MTX_GRX_P5
PEG_MTX_GRX_P6
PEG_MTX_GRX_P7
PEG_MTX_GRX_P8
PEG_MTX_GRX_P9
PEG_MTX_GRX_P10
PEG_MTX_GRX_P11
PEG_MTX_GRX_N12PEG_MTX_GRX_P12
PEG_MTX_GRX_N13PEG_MTX_GRX_P13
PEG_MTX_GRX_P14
PEG_MTX_GRX_P15
PEG_MTX_GRX_N14
PEG_MTX_GRX_N15
PEG_MTX_GRX_P[0..15]
PEG_MTX_GRX_N[0..15]
PEG_MTX_GRX_C_P1
PEG_MTX_GRX_C_P2
PEG_MTX_GRX_C_P0
PEG_MTX_GRX_C_P4 PEG_MTX_GRX_P4
PEG_MTX_GRX_C_N12
PEG_MTX_GRX_C_P1
PEG_MTX_GRX_C_P8
PEG_MTX_GRX_C_P11
PEG_MTX_GRX_C_P2
PEG_MTX_GRX_C_N14
PEG_MTX_GRX_C_N3
PEG_MRX_GTX_P6
PEGCOMP
PEG_MRX_GTX_P5
PEG_MTX_GRX_C_N15
PEG_MRX_GTX_P9
PEG_MTX_GRX_C_N10
PEG_MTX_GRX_C_N1
PEG_MRX_GTX_P2
PEG_MTX_GRX_C_N7
PEG_MTX_GRX_C_P14
PEG_MTX_GRX_C_N4
PEG_MTX_GRX_C_P5
PEG_MTX_GRX_C_N8
PEG_MTX_GRX_C_P0
PEG_MRX_GTX_P15
PEG_MTX_GRX_C_N5
PEG_MTX_GRX_C_P10
PEG_MTX_GRX_C_N11
PEG_MTX_GRX_P0
PEG_MRX_GTX_P8
PEG_MTX_GRX_C_P4
PEG_MRX_GTX_P7
PEG_MRX_GTX_P14
PEG_MTX_GRX_C_N2
PEG_MTX_GRX_C_N13
PEG_MTX_GRX_C_N6
PEG_MTX_GRX_C_N9
PEG_MTX_GRX_C_P12
PEG_MTX_GRX_C_N0
PEG_MRX_GTX_P0
PEG_MRX_GTX_P3PEG_MRX_GTX_P4
PEG_MRX_GTX_P10
PEG_MTX_GRX_C_P15
PEG_MTX_GRX_C_P6
PEG_MRX_GTX_P11
PEG_MTX_GRX_C_P7
PEG_MTX_GRX_C_P9
PEG_MRX_GTX_P1
PEG_MRX_GTX_P13PEG_MRX_GTX_P12
PEG_MTX_GRX_C_P3
PEG_MTX_GRX_C_P13
PEG_MRX_GTX_N1
PEG_MRX_GTX_N5
PEG_MRX_GTX_N15
PEG_MRX_GTX_N9
PEG_MRX_GTX_N2
PEG_MRX_GTX_N11
PEG_MRX_GTX_N14
PEG_MRX_GTX_N3
PEG_MRX_GTX_N12
PEG_MRX_GTX_N0
PEG_MRX_GTX_N7
PEG_MRX_GTX_N4
PEG_MRX_GTX_N8
PEG_MRX_GTX_N13
PEG_MRX_GTX_N10
PEG_MRX_GTX_N6
PEG_MTX_GRX_C_N11
PEG_MTX_GRX_N0
PEG_MTX_GRX_N1
PEG_MTX_GRX_C_N9
PEG_MTX_GRX_C_N10
PEG_MTX_GRX_C_N4
PEG_MTX_GRX_N3
PEG_MTX_GRX_C_N6
PEG_MTX_GRX_C_N8
PEG_MTX_GRX_N5
PEG_MTX_GRX_N8
PEG_MTX_GRX_N4
PEG_MTX_GRX_C_N5
PEG_MTX_GRX_N11
PEG_MTX_GRX_C_N3
PEG_MTX_GRX_C_N7
PEG_MTX_GRX_C_N1
PEG_MTX_GRX_N7
PEG_MTX_GRX_N10
PEG_MTX_GRX_C_N0
PEG_MTX_GRX_N6
PEG_MTX_GRX_N9
PEG_MTX_GRX_N2PEG_MTX_GRX_C_N2
+3.3V_RUN
+VCC_PEG
CFG510
CFG1910
CFG910
CFG2010
CFG1610
PEG_MRX_GTX_N[0..15] 52
PEG_MRX_GTX_P[0..15] 52
PEG_MTX_GRX_N[0..15] 52
PEG_MTX_GRX_P[0..15] 52
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(3 of 6)
12 66Thursday, March 01, 2007
Compal Electronics, Inc.
CFG[18:19] have internal pulldown
Low = DMI x 2High = DMI x 4 (Default)
CFG[3:17] have internal pullup
Low = Reverse LaneCFG9High = Normal Operation (Default)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Strap Pin Table
CFG16
CFG19
CFG5 DMI X2 Select
PCI ExpressGraphic Lane
FSB DynamicODT
Low=Dynamic ODT DisableHigh=Dynamic ODT Enable(default)
DMI LaneReversal
Low=Normal (default)High=Lane Reversed
CFG20
High=SDVO and PCIEx1 are operatingsimultaneously via PEG port
Low=Only SDVO or PCIEx1 isoperational (defaults)
SDVO/PCIEConcurrentOperation
SDVO_CRTL_DATALow=No SDVO Device Present(default)
High=SDVO Device Present
R368 4.02K_0402_1%~D@1 2
C523 0.1U_0402_10V7K~D 1 2
C518 0.1U_0402_10V7K~D 1 2
C503 0.1U_0402_10V7K~D 1 2
C528 0.1U_0402_10V7K~D 1 2
C506 0.1U_0402_10V7K~D 1 2
R374 4.02K_0402_1%~D@1 2
C515 0.1U_0402_10V7K~D 1 2
R372 4.02K_0402_1%~D@ 1 2
C512 0.1U_0402_10V7K~D 1 2
C520 0.1U_0402_10V7K~D 1 2
C500 0.1U_0402_10V7K~D 1 2
C531 0.1U_0402_10V7K~D 1 2
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
U29C
LE88CLPM A0 QM21_FCBGA1299~D
L_BKLT_CTRLJ40L_BKLT_ENH39L_CTRL_CLKE39L_CTRL_DATAE40L_DDC_CLKC37L_DDC_DATAD35L_VDD_ENK40
LVDS_IBGL41LVDS_VBGL43LVDS_VREFHN41LVDS_VREFLN40
LVDSA_CLK#D46LVDSA_CLKC45LVDSB_CLK#D44LVDSB_CLKE42
LVDSA_DATA#_0G51LVDSA_DATA#_1E51LVDSA_DATA#_2F49
LVDSA_DATA_0G50LVDSA_DATA_1E50LVDSA_DATA_2F48
LVDSB_DATA#_0G44LVDSB_DATA#_1B47LVDSB_DATA#_2B45
LVDSB_DATA_0E44LVDSB_DATA_1A47LVDSB_DATA_2A45
TVA_DACE27TVB_DACG27TVC_DACK27
TVA_RTNF27TVB_RTNJ27TVC_RTNL27
TV_DCONSEL_0M35TV_DCONSEL_1P33
CRT_BLUEH32CRT_BLUE#G32CRT_GREENK29CRT_GREEN#J29CRT_REDF29CRT_RED#E29
CRT_DDC_CLKK33CRT_DDC_DATAG35CRT_HSYNCF33
CRT_TVO_IREFC32
CRT_VSYNCE33
PEG_COMPI N43PEG_COMPO M43
PEG_RX#_0 J51PEG_RX#_1 L51PEG_RX#_2 N47PEG_RX#_3 T45PEG_RX#_4 T50PEG_RX#_5 U40PEG_RX#_6 Y44PEG_RX#_7 Y40PEG_RX#_8 AB51PEG_RX#_9 W49
PEG_RX#_10 AD44PEG_RX#_11 AD40PEG_RX#_12 AG46PEG_RX#_13 AH49PEG_RX#_14 AG45PEG_RX#_15 AG41
PEG_RX_0 J50PEG_RX_1 L50PEG_RX_2 M47PEG_RX_3 U44PEG_RX_4 T49PEG_RX_5 T41PEG_RX_6 W45PEG_RX_7 W41PEG_RX_8 AB50PEG_RX_9 Y48
PEG_RX_10 AC45PEG_RX_11 AC41PEG_RX_12 AH47PEG_RX_13 AG49PEG_RX_14 AH45PEG_RX_15 AG42
PEG_TX#_0 N45PEG_TX#_1 U39PEG_TX#_2 U47PEG_TX#_3 N51PEG_TX#_4 R50PEG_TX#_5 T42PEG_TX#_6 Y43PEG_TX#_7 W46PEG_TX#_8 W38PEG_TX#_9 AD39
PEG_TX#_10 AC46PEG_TX#_11 AC49PEG_TX#_12 AC42PEG_TX#_13 AH39PEG_TX#_14 AE49PEG_TX#_15 AH44
PEG_TX_0 M45PEG_TX_1 T38PEG_TX_2 T46PEG_TX_3 N50PEG_TX_4 R51PEG_TX_5 U43PEG_TX_6 W42PEG_TX_7 Y47PEG_TX_8 Y39PEG_TX_9 AC38
PEG_TX_10 AD47PEG_TX_11 AC50PEG_TX_12 AD43PEG_TX_13 AG39PEG_TX_14 AE50PEG_TX_15 AH43
C502 0.1U_0402_10V7K~D 1 2
C501 0.1U_0402_10V7K~D 1 2
C530 0.1U_0402_10V7K~D 1 2
C519 0.1U_0402_10V7K~D 1 2
C522 0.1U_0402_10V7K~D 1 2
C514 0.1U_0402_10V7K~D 1 2
C526 0.1U_0402_10V7K~D 1 2
R36624.9_0402_1%~D
12
C511 0.1U_0402_10V7K~D 1 2
C513 0.1U_0402_10V7K~D 1 2
C510 0.1U_0402_10V7K~D 1 2
R365 4.02K_0402_1%~D@1 2
C527 0.1U_0402_10V7K~D 1 2
C508 0.1U_0402_10V7K~D 1 2
C517 0.1U_0402_10V7K~D 1 2
C509 0.1U_0402_10V7K~D 1 2
C507 0.1U_0402_10V7K~D 1 2
C529 0.1U_0402_10V7K~D 1 2
R373 4.02K_0402_1%~D@1 2
C525 0.1U_0402_10V7K~D 1 2C524 0.1U_0402_10V7K~D 1 2
C516 0.1U_0402_10V7K~D 1 2
C521 0.1U_0402_10V7K~D 1 2
C505 0.1U_0402_10V7K~D 1 2C504 0.1U_0402_10V7K~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VCCP
+1.25V_RUN
+1.25V_RUN_AXD
+1.25V_RUN
+1.25V_RUN
+1.8V_SM_CK
+VCC_RXR_DMI
+VCC_PEG
+1.25V_RUN_HPLL
+1.25V_RUN_HPLL+1.25V_RUN
+1.25V_RUN_MPLL+1.25V_RUN
+1.25V_RUN_MPLL
+3.3V_RUN
+VCC_PEG
+1.05V_VCCP
+1.25V_RUN_PEGPLL
+1.25V_RUN_PEGPLL+1.25V_RUN
+1.25V_RUN_PEGPLL
+1.25V_RUN
+1.25V_RUN
+1.5V_RUN
+1.25V_RUN+1.8V_SUS +1.8V_SM_CK
+3.3V_RUN
+1.25V_RUN
+1.05V_VCCP
+1.05V_VCCP
+VCC_RXR_DMI+VCCA_SM
+VCCA_SM_CK
+3.3V_RUN
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(4 of 6)
13 66Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
45mA Max.45mA Max.
CRB 270uF
Place caps closeto VCC_AXF (PinA21, B21, B23)
R416
1_0603_5%~D
12
C589
1U_0603_10V4Z~D
1
2
L32BLM18PG181SN1_0603~D
12
C55
710
U_0
805_
4VAM
~D
1
2
C552
1U_0603_10V4Z~D
1
2
C591
0.1U_0402_16V4Z~D
1
2
R4080_0603_5%~D
1 2
C53
70.
47U
_040
2_10
V4Z~
D
1
2
C554
0.1U_0402_16V4Z~D
1
2
C560
4.7U_0603_6.3V6M
~D
1
2
L38
BLM18AG121SN1D_0603~D 12
C57
222
U_0
805_
6.3V
AM~D
1
2
C584
0.1U_0402_16V4Z~D
1
2
D16RB751V_SOD323~D
2 1
C544
2.2U_0603_6.3V6K~D
1
2
L33
BLM18AG121SN1D_0603~D 12
C58
210
U_0
805_
4VAM
~D
1
2
C575
22U_0805_6.3VAM~D
1
2
C574
0.1U_0402_16V4Z~D
1
2
C563
0.1U_0402_16V4Z~D
1
2
L34BLM18PG181SN1_0603~D
12
C566
1U_0603_10V4Z~D
1
2
C590
10U_0805_4VAM
~D
1
2
C597
0.1U_0402_16V4Z~D
1
2
+
C535
220U_D
2_4VY
_R15M
~D
1
2
C551
22U_0805_6.3V6M
~D
1
2
C578
0.47U_0402_10V4Z~D
1
2
C577
0.47U_0402_10V4Z~D
1
2
C56710U_0805_4VAM~D
12
L35BLM21PG221SN1D_0805~D
1 2
C59
322
U_0
805_
6.3V
6M~D
1
2
C549
10U_0805_4VAM
~D
1
2
C561
22U_0805_6.3V6M
~D
1
2
R406
0_0805_5%~D
1 2
C565
1U_0603_10V4Z~D
1
2
C576
0.47U_0402_10V4Z~D
1
2
C562
22U_0805_6.3V6M
~D
1
2
+C548
220U_D
2_4VY
_R15M
~D
1
2
C542
4.7U_0603_6.3V6M
~D 1
2
+
C55
810
0U_D
2E_6
.3VM
_R18
M~D
1
2
C568
0.1U_0402_16V4Z~D
1
2
L37
BLM18AG121SN1D_0603~D 12
C564
22U_0805_6.3V6M
~D
1
2
C58
30.
022U
_040
2_16
V7K~
D
1
2
R41710_0603_5%~D
1 2
C543
4.7U_0603_6.3V6M
~D
1
2
C592
0.1U_0402_16V4Z~D
1
2
C571
0.1U_0402_16V4Z~D
1
2
C64
20.
1U_0
402_
16V4
Z~D
1
2
R409
1_0402_5%~D
C5730.1U_0402_16V4Z~D
1
2
C59410U_0805_4VAM~D
12
C559
1U_0603_10V4Z~D
1
2
C550
0.1U_0402_16V4Z~D
1
2
+
C55
622
0U_D
2_4V
Y_R
15M
~D
1
2
L41
BLM18AG121SN1D_0603~D
12
POWER
CRT
PLL
LVDS
PEG
SM
VTT
AXD
AXF
CLK
VTTLF
LVDS
TV/CRT
TV
DMI
PEG
U29H
LE88CLPM A0 QM21_FCBGA1299~D
VCCSYNC J32
VCCA_CRT_DAC_1 A33VCCA_CRT_DAC_2 B33
VCCA_DAC_BG A30
VSSA_DAC_BG B32
VCCA_DPLLA B49
VCCA_DPLLB H49
VCCA_HPLL AL2
VCCA_LVDS A41
VSSA_LVDS B41
VCCA_MPLL AM2
VCCA_PEG_BG K50VSSA_PEG_BG K49
VCCA_PEG_PLL U51
VCCA_SM_1 AW18VCCA_SM_2 AV19VCCA_SM_3 AU19VCCA_SM_4 AU18VCCA_SM_5 AU17VCCA_SM_7 AT22VCCA_SM_8 AT21VCCA_SM_9 AT19
VCCA_SM_10 AT18VCCA_SM_11 AT17
VCCA_SM_NCTF_1 AR17VCCA_SM_NCTF_2 AR16
VCCA_SM_CK_1 BC29VCCA_SM_CK_2 BB29
VCCA_TVA_DAC_1 C25VCCA_TVA_DAC_2 B25VCCA_TVB_DAC_1 C27VCCA_TVB_DAC_2 B27VCCA_TVC_DAC_1 B28VCCA_TVC_DAC_2 A28
VCCD_CRT M32VCCD_TVDAC L29
VCCD_QDAC N28
VCCD_HPLL AN2
VCCD_PEG_PLL U48
VCCD_LVDS_1 J41VCCD_LVDS_2 H42
VTT_1U13VTT_2U12VTT_3U11VTT_4U9VTT_5U8VTT_6U7VTT_7U5VTT_8U3VTT_9U2VTT_10U1VTT_11T13VTT_12T11VTT_13T10VTT_14T9VTT_15T7VTT_16T6VTT_17T5VTT_18T3VTT_19T2VTT_20R3VTT_21R2VTT_22R1
VCC_AXD_1AT23VCC_AXD_2AU28VCC_AXD_3AU24VCC_AXD_4AT29VCC_AXD_5AT25
VCC_AXF_1B23VCC_AXF_2B21VCC_AXF_3A21
VCC_DMIAJ50
VCC_SM_CK_1BK24VCC_SM_CK_2BK23VCC_SM_CK_3BJ24VCC_SM_CK_4BJ23
VCC_TX_LVDSA43
VCC_HV_1C40VCC_HV_2B40
VCC_PEG_1AD51VCC_PEG_2W50VCC_PEG_3W51VCC_PEG_4V49VCC_PEG_5V50
VCC_RXR_DMI_1AH50VCC_RXR_DMI_2AH51
VTTLF1A7VTTLF2F2VTTLF3AH1
VCC_AXD_6AT30
VCC_AXD_NCTFAR29
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF7
VCCSM_LF3
VCCSM_LF6VCCSM_LF5
VCCSM_LF1VCCSM_LF2
VCCSM_LF4
+1.8V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(5 of 6)
14 66Monday, February 26, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note: 370 mils from edge
Layout Note: Inside GMCH cavity.
Layout Note: Inside GMCH cavity.
Layout Note: Placeclose to GMCH edge.
Layout Note: Place C901 whereLVDS and DDR2 taps.
Layout Note: Place on the edge
C625
0.47U_0402_10V4Z~D
1
2
C619
0.1U_0402_10V7K~D
1
2
C623
0.22U_0402_10V4Z~D
1
2
C603
22U_0805_6.3VAM
~D
1
2
C622
0.1U_0402_10V7K~D
1
2
POWER
U29F
LE88CLPM A0 QM21_FCBGA1299~D
VCC_NCTF_1AB33VCC_NCTF_2AB36VCC_NCTF_3AB37VCC_NCTF_4AC33VCC_NCTF_5AC35VCC_NCTF_6AC36VCC_NCTF_7AD35VCC_NCTF_8AD36VCC_NCTF_9AF33VCC_NCTF_10AF36VCC_NCTF_11AH33VCC_NCTF_12AH35VCC_NCTF_13AH36VCC_NCTF_14AH37VCC_NCTF_15AJ33VCC_NCTF_16AJ35VCC_NCTF_17AK33VCC_NCTF_18AK35VCC_NCTF_19AK36VCC_NCTF_20AK37VCC_NCTF_21AD33VCC_NCTF_22AJ36VCC_NCTF_23AM35VCC_NCTF_24AL33VCC_NCTF_25AL35VCC_NCTF_26AA33VCC_NCTF_27AA35VCC_NCTF_28AA36VCC_NCTF_29AP35VCC_NCTF_30AP36VCC_NCTF_31AR35VCC_NCTF_32AR36VCC_NCTF_33Y32VCC_NCTF_34Y33VCC_NCTF_35Y35VCC_NCTF_36Y36VCC_NCTF_37Y37VCC_NCTF_38T30VCC_NCTF_39T34VCC_NCTF_40T35VCC_NCTF_41U29VCC_NCTF_42U31VCC_NCTF_43U32VCC_NCTF_44U33VCC_NCTF_45U35VCC_NCTF_46U36VCC_NCTF_47V32VCC_NCTF_48V33VCC_NCTF_49V36VCC_NCTF_50V37
VCC_AXM_1 AT33VCC_AXM_2 AT31VCC_AXM_3 AK29VCC_AXM_4 AK24
VCC_AXM_5 AJ26VCC_AXM_6 AK23
VCC_AXM_7 AJ23
VCC_AXM_NCTF_1AL24VCC_AXM_NCTF_2AL26VCC_AXM_NCTF_3AL28VCC_AXM_NCTF_4AM26VCC_AXM_NCTF_5AM28VCC_AXM_NCTF_6AM29VCC_AXM_NCTF_7AM31VCC_AXM_NCTF_8AM32VCC_AXM_NCTF_9AM33VCC_AXM_NCTF_10AP29VCC_AXM_NCTF_11AP31VCC_AXM_NCTF_12AP32VCC_AXM_NCTF_13AP33VCC_AXM_NCTF_14AL29VCC_AXM_NCTF_15AL31VCC_AXM_NCTF_16AL32
VSS_NCTF_1 T27VSS_NCTF_2 T37VSS_NCTF_3 U24VSS_NCTF_4 U28VSS_NCTF_5 V31VSS_NCTF_6 V35VSS_NCTF_7 AA19VSS_NCTF_8 AB17VSS_NCTF_9 AB35
VSS_NCTF_10 AD19VSS_NCTF_11 AD37VSS_NCTF_12 AF17VSS_NCTF_13 AF35VSS_NCTF_14 AK17VSS_NCTF_15 AM17VSS_NCTF_16 AM24VSS_NCTF_17 AP26VSS_NCTF_18 AP28VSS_NCTF_19 AR15VSS_NCTF_20 AR19VSS_NCTF_21 AR28
VSS_SCB1 A3VSS_SCB2 B2VSS_SCB3 C1VSS_SCB4 BL1VSS_SCB5 BL51
VCC_AXM_NCTF_17AR31VCC_AXM_NCTF_18AR32VCC_AXM_NCTF_19AR33
VSS_SCB6 A51
C620
0.1U_0402_10V7K~D
1
2
R42010_0603_5%~D
1 2
POWER
VCC CORE
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
U29G
LE88CLPM A0 QM21_FCBGA1299~D
VCC_1AT35VCC_2AT34VCC_3AH28VCC_4AC32VCC_5AC31VCC_6AK32VCC_7AJ31VCC_8AJ28VCC_9AH32VCC_10AH31VCC_11AH29VCC_12AF32
VCC_13R30
VCC_SM_LF7 AT6VCC_SM_LF6 AW8VCC_SM_LF5 BD4VCC_SM_LF4 BD17VCC_SM_LF3 BE39VCC_SM_LF2 BC39VCC_SM_LF1 AW45
VCC_AXG_NCTF_83 Y31VCC_AXG_NCTF_82 V29
VCC_SM_1AU32VCC_SM_2AU33VCC_SM_3AU35VCC_SM_4AV33VCC_SM_5AW33VCC_SM_6AW35VCC_SM_7AY35VCC_SM_8BA32VCC_SM_9BA33VCC_SM_10BA35VCC_SM_11BB33VCC_SM_12BC32VCC_SM_13BC33VCC_SM_14BC35VCC_SM_15BD32VCC_SM_16BD35VCC_SM_17BE32VCC_SM_18BE33VCC_SM_19BE35VCC_SM_20BF33VCC_SM_21BF34VCC_SM_22BG32VCC_SM_23BG33VCC_SM_24BG35VCC_SM_25BH32VCC_SM_26BH34VCC_SM_27BH35VCC_SM_28BJ32VCC_SM_29BJ33VCC_SM_30BJ34VCC_SM_31BK32VCC_SM_32BK33VCC_SM_33BK34VCC_SM_34BK35VCC_SM_35BL33VCC_SM_36AU30
VCC_AXG_31AH26VCC_AXG_32AD31VCC_AXG_33AJ20VCC_AXG_34AN14
VCC_AXG_1R20VCC_AXG_2T14VCC_AXG_3W13VCC_AXG_4W14VCC_AXG_5Y12VCC_AXG_6AA20VCC_AXG_7AA23VCC_AXG_8AA26VCC_AXG_9AA28VCC_AXG_10AB21VCC_AXG_11AB24VCC_AXG_12AB29VCC_AXG_13AC20VCC_AXG_14AC21VCC_AXG_15AC23VCC_AXG_16AC24VCC_AXG_17AC26VCC_AXG_18AC28VCC_AXG_19AC29VCC_AXG_20AD20VCC_AXG_21AD23VCC_AXG_22AD24VCC_AXG_23AD28VCC_AXG_24AF21VCC_AXG_25AF26VCC_AXG_26AA31VCC_AXG_27AH20VCC_AXG_28AH21VCC_AXG_29AH23VCC_AXG_30AH24
VCC_AXG_NCTF_1 T17VCC_AXG_NCTF_2 T18VCC_AXG_NCTF_3 T19VCC_AXG_NCTF_4 T21VCC_AXG_NCTF_5 T22VCC_AXG_NCTF_6 T23VCC_AXG_NCTF_7 T25VCC_AXG_NCTF_8 U15VCC_AXG_NCTF_9 U16
VCC_AXG_NCTF_10 U17VCC_AXG_NCTF_11 U19VCC_AXG_NCTF_12 U20VCC_AXG_NCTF_13 U21VCC_AXG_NCTF_14 U23VCC_AXG_NCTF_15 U26VCC_AXG_NCTF_16 V16VCC_AXG_NCTF_17 V17VCC_AXG_NCTF_18 V19VCC_AXG_NCTF_19 V20VCC_AXG_NCTF_20 V21VCC_AXG_NCTF_21 V23VCC_AXG_NCTF_22 V24VCC_AXG_NCTF_23 Y15VCC_AXG_NCTF_24 Y16VCC_AXG_NCTF_25 Y17VCC_AXG_NCTF_26 Y19VCC_AXG_NCTF_27 Y20VCC_AXG_NCTF_28 Y21VCC_AXG_NCTF_29 Y23VCC_AXG_NCTF_30 Y24VCC_AXG_NCTF_31 Y26VCC_AXG_NCTF_32 Y28VCC_AXG_NCTF_33 Y29VCC_AXG_NCTF_34 AA16VCC_AXG_NCTF_35 AA17VCC_AXG_NCTF_36 AB16VCC_AXG_NCTF_37 AB19VCC_AXG_NCTF_38 AC16VCC_AXG_NCTF_39 AC17VCC_AXG_NCTF_40 AC19VCC_AXG_NCTF_41 AD15VCC_AXG_NCTF_42 AD16VCC_AXG_NCTF_43 AD17VCC_AXG_NCTF_44 AF16VCC_AXG_NCTF_45 AF19VCC_AXG_NCTF_46 AH15VCC_AXG_NCTF_47 AH16VCC_AXG_NCTF_48 AH17VCC_AXG_NCTF_49 AH19VCC_AXG_NCTF_50 AJ16VCC_AXG_NCTF_51 AJ17VCC_AXG_NCTF_52 AJ19VCC_AXG_NCTF_53 AK16VCC_AXG_NCTF_54 AK19VCC_AXG_NCTF_55 AL16VCC_AXG_NCTF_56 AL17VCC_AXG_NCTF_57 AL19VCC_AXG_NCTF_58 AL20VCC_AXG_NCTF_59 AL21VCC_AXG_NCTF_60 AL23VCC_AXG_NCTF_61 AM15VCC_AXG_NCTF_62 AM16VCC_AXG_NCTF_63 AM19VCC_AXG_NCTF_64 AM20VCC_AXG_NCTF_65 AM21VCC_AXG_NCTF_66 AM23VCC_AXG_NCTF_67 AP15VCC_AXG_NCTF_68 AP16VCC_AXG_NCTF_69 AP17VCC_AXG_NCTF_70 AP19VCC_AXG_NCTF_71 AP20VCC_AXG_NCTF_72 AP21VCC_AXG_NCTF_73 AP23VCC_AXG_NCTF_74 AP24VCC_AXG_NCTF_75 AR20VCC_AXG_NCTF_76 AR21VCC_AXG_NCTF_77 AR23VCC_AXG_NCTF_78 AR24VCC_AXG_NCTF_79 AR26VCC_AXG_NCTF_80 V26VCC_AXG_NCTF_81 V28
C613
0.22U_0402_10V4Z~D
1
2
C618
0.1U_0402_10V7K~D
1
2
+
C605
330U_D
2E_2.5VM
~D
1
2
C615
22U_0805_6.3V6M
~D
1
2
C614
0.1U_0402_10V7K~D
1
2
C617
0.22U_0402_10V4Z~D
1
2
C621
0.1U_0402_10V7K~D
1
2
C608
0.1U_0402_10V7K~D
1
2
C604
0.22U_0402_10V4Z~D
1
2
C616
0.22U_0402_10V4Z~D
1
2
C624
0.22U_0402_10V4Z~D
1
2
+
C602
220U_D
2_4VY
_R15M
~D
1
2
C606
22U_0805_6.3V6M
~D
1
2
C627
1U_0402_6.3V4Z~D
1
2
C607
22U_0805_6.3V6M
~D
1
2
D17
BAT54CW_SOT323~D
3
2
1
C626
1U_0402_6.3V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Crestline(6 of 6)
15 66Monday, February 26, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
VSS
U29I
LE88CLPM A0 QM21_FCBGA1299~D
VSS_1A13VSS_2A15VSS_3A17VSS_4A24VSS_5AA21VSS_6AA24VSS_7AA29VSS_8AB20VSS_9AB23VSS_10AB26VSS_11AB28VSS_12AB31VSS_13AC10VSS_14AC13VSS_15AC3VSS_16AC39VSS_17AC43VSS_18AC47VSS_19AD1VSS_20AD21VSS_21AD26VSS_22AD29VSS_23AD3VSS_24AD41VSS_25AD45VSS_26AD49VSS_27AD5VSS_28AD50VSS_29AD8VSS_30AE10VSS_31AE14VSS_32AE6VSS_33AF20VSS_34AF23VSS_35AF24VSS_36AF31VSS_37AG2VSS_38AG38VSS_39AG43VSS_40AG47VSS_41AG50VSS_42AH3VSS_43AH40VSS_44AH41VSS_45AH7VSS_46AH9VSS_47AJ11VSS_48AJ13VSS_49AJ21VSS_50AJ24VSS_51AJ29VSS_52AJ32VSS_53AJ43VSS_54AJ45VSS_55AJ49VSS_56AK20VSS_57AK21VSS_58AK26VSS_59AK28VSS_60AK31VSS_61AK51VSS_62AL1VSS_63AM11VSS_64AM13VSS_65AM3VSS_66AM4VSS_67AM41VSS_68AM45VSS_69AN1VSS_70AN38VSS_71AN39VSS_72AN43VSS_73AN5VSS_74AN7VSS_75AP4VSS_76AP48VSS_77AP50VSS_78AR11VSS_79AR2VSS_80AR39VSS_81AR44VSS_82AR47VSS_83AR7VSS_84AT10VSS_85AT14VSS_86AT41VSS_87AT49VSS_88AU1VSS_89AU23VSS_90AU29VSS_91AU3VSS_92AU36VSS_93AU49VSS_94AU51VSS_95AV39VSS_96AV48VSS_97AW1VSS_98AW12VSS_99AW16
VSS_100 AW24VSS_101 AW29VSS_102 AW32VSS_103 AW5VSS_104 AW7VSS_105 AY10VSS_106 AY24VSS_107 AY37VSS_108 AY42VSS_109 AY43VSS_110 AY45VSS_111 AY47VSS_112 AY50VSS_113 B10VSS_114 B20VSS_115 B24VSS_116 B29VSS_117 B30VSS_118 B35VSS_119 B38VSS_120 B43VSS_121 B46VSS_122 B5VSS_123 B8VSS_124 BA1VSS_125 BA17VSS_126 BA18VSS_127 BA2VSS_128 BA24VSS_129 BB12VSS_130 BB25VSS_131 BB40VSS_132 BB44VSS_133 BB49VSS_134 BB8VSS_135 BC16VSS_136 BC24VSS_137 BC25VSS_138 BC36VSS_139 BC40VSS_140 BC51VSS_141 BD13VSS_142 BD2VSS_143 BD28VSS_144 BD45VSS_145 BD48VSS_146 BD5VSS_147 BE1VSS_148 BE19VSS_149 BE23VSS_150 BE30VSS_151 BE42VSS_152 BE51VSS_153 BE8VSS_154 BF12VSS_155 BF16VSS_156 BF36VSS_157 BG19VSS_158 BG2VSS_159 BG24VSS_160 BG29VSS_161 BG39VSS_162 BG48VSS_163 BG5VSS_164 BG51VSS_165 BH17VSS_166 BH30VSS_167 BH44VSS_168 BH46VSS_169 BH8VSS_170 BJ11VSS_171 BJ13VSS_172 BJ38VSS_173 BJ4VSS_174 BJ42VSS_175 BJ46VSS_176 BK15VSS_177 BK17VSS_178 BK25VSS_179 BK29VSS_180 BK36VSS_181 BK40VSS_182 BK44VSS_183 BK6VSS_184 BK8VSS_185 BL11VSS_186 BL13VSS_187 BL19VSS_188 BL22VSS_189 BL37VSS_190 BL47VSS_191 C12VSS_192 C16VSS_193 C19VSS_194 C28VSS_195 C29VSS_196 C33VSS_197 C36VSS_198 C41
VSS
U29J
LE88CLPM A0 QM21_FCBGA1299~D
VSS_199C46VSS_200C50VSS_201C7VSS_202D13VSS_203D24VSS_204D3VSS_205D32VSS_206D39VSS_207D45VSS_208D49VSS_209E10VSS_210E16VSS_211E24VSS_212E28VSS_213E32VSS_214E47VSS_215F19VSS_216F36VSS_217F4VSS_218F40VSS_219F50VSS_220G1VSS_221G13VSS_222G16VSS_223G19VSS_224G24VSS_225G28VSS_226G29VSS_227G33VSS_228G42VSS_229G45VSS_230G48VSS_231G8VSS_232H24VSS_233H28VSS_234H4VSS_235H45VSS_236J11VSS_237J16VSS_238J2VSS_239J24VSS_240J28VSS_241J33VSS_242J35VSS_243J39
VSS_245K12VSS_246K47VSS_247K8VSS_248L1VSS_249L17VSS_250L20VSS_251L24VSS_252L28VSS_253L3VSS_254L33VSS_255L49VSS_256M28VSS_257M42VSS_258M46VSS_259M49VSS_260M5VSS_261M50VSS_262M9VSS_263N11VSS_264N14VSS_265N17VSS_266N29VSS_267N32VSS_268N36VSS_269N39VSS_270N44VSS_271N49VSS_272N7VSS_273P19VSS_274P2VSS_275P23VSS_276P3VSS_277P50VSS_278R49VSS_279T39VSS_280T43VSS_281T47VSS_282U41VSS_283U45VSS_284U50VSS_285V2VSS_286V3
VSS_287 W11VSS_288 W39VSS_289 W43VSS_290 W47VSS_291 W5VSS_292 W7VSS_293 Y13VSS_294 Y2VSS_295 Y41VSS_296 Y45VSS_297 Y49VSS_298 Y5VSS_299 Y50VSS_300 Y11VSS_301 P29VSS_302 T29VSS_303 T31VSS_304 T33VSS_305 R28
VSS_306 AA32VSS_307 AB32VSS_308 AD32VSS_309 AF28VSS_310 AF29VSS_311 AT27VSS_312 AV25VSS_313 H50
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D0
DDR_A_D3
DDR_A_D23DDR_A_D22
DDR_A_D32
DDR_A_D60
DDR_A_D52
DDR_A_D58
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS1DDR_A_RAS#
DDR_A_D15
DDR_A_D18DDR_A_D19
DDR_A_D28
DDR_A_D38
DDR_A_D44
DDR_A_D50
DDR_A_D53
DDR_A_D63
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS0
DDR_A_BS2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS1
DDR_A_MA6
DDR_A_MA2
M_ODT0
M_ODT1
M_ODT0DDR_A_MA13
DDR_A_MA7
DDR_A_DM0
PM_EXTTS#0
DDR_CS0_DIMMA#DDR_A_RAS#
DDR_A_D46
DDR_A_D34
DDR_A_D37DDR_A_D36
DDR_A_D26
M_ODT1DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_MA10DDR_A_BS0
DDR_A_WE#DDR_A_CAS#
DDR_A_BS2
DDR_A_MA12
DDR_A_MA8
DDR_A_MA9
DDR_A_MA5
DDR_A_MA1DDR_A_MA3
DDR_A_D7
DDR_A_D4DDR_A_D6
DDR_A_D1
DDR_A_D5
DDR_A_D2
DDR_A_D14DDR_A_D11DDR_A_D10
DDR_A_D21DDR_A_D20DDR_A_D16
DDR_A_D17
DDR_A_D29DDR_A_D24DDR_A_D25
DDR_A_D31DDR_A_D27
DDR_A_D30
DDR_A_D35
DDR_A_D33
DDR_A_D39
DDR_A_D45DDR_A_D40DDR_A_D41
DDR_A_D43 DDR_A_D47DDR_A_D42
DDR_A_D49 DDR_A_D48
DDR_A_D55DDR_A_D54DDR_A_D51
DDR_A_D56DDR_A_D61DDR_A_D57
DDR_A_D59DDR_A_D62
DDR_A_D8DDR_A_D13
DDR_A_D9
DDR_A_D12
MEM_SCLKMEM_SDATA
DDR_A_MA14
DDR_CKE1_DIMMA
DDR_A_MA14
+1.8V_SUS +1.8V_SUS
+0.9V_DDR_VTT
+3.3V_RUN
+0.9V_DDR_VTT
+1.8V_SUS
V_DDR_MCH_REF
DDR_A_D[0..63]11
DDR_A_DQS[0..7]11
DDR_A_MA[0..14]11
DDR_A_DM[0..7]11
M_CLK_DDR0 10
M_CLK_DDR1 10
M_CLK_DDR#0 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10
DDR_CS0_DIMMA# 10
DDR_CKE0_DIMMA10
DDR_CS1_DIMMA#10
DDR_A_DQS#[0..7]11
M_ODT0 10
M_ODT110
DDR_A_BS1 11
DDR_A_WE#11DDR_A_RAS# 11
DDR_A_CAS#11
DDR_A_BS011
DDR_A_BS211
PM_EXTTS#0 10
MEM_SCLK17,23MEM_SDATA17,23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
DDRII-SODIMM SLOT1
16 66Thursday, March 01, 2007
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
RESERVEDIMMA
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON TOP SIDE
C437
2.2U_0603_6.3V6K~D
1
2
C139
0.1U_0402_16V4Z~D
1
2
C115
2.2U_0603_6.3V6K~D
1
2
C105
0.1U_0402_16V4Z~D
1
2
RN10
56_0404_4P2R_5%~D
1423
C119
0.1U_0402_16V4Z~D
1
2
C138
0.1U_0402_16V4Z~D
1
2
RN7
56_0404_4P2R_5%~D
1 42 3
C109
0.1U_0402_16V4Z~D
1
2
C117
2.2U_0603_6.3V6K~D
1
2
RN9
56_0404_4P2R_5%~D
1 42 3
C116
2.2U_0603_6.3V6K~D
1
2
C136
0.1U_0402_16V4Z~D
1
2
C131
0.1U_0402_16V4Z~D
1
2
RN4
56_0404_4P2R_5%~D
1 42 3
RN6
56_0404_4P2R_5%~D
1423
C106
0.1U_0402_16V4Z~D
1
2C141
0.1U_0402_16V4Z~D
1
2
RN8
56_0404_4P2R_5%~D
1423
C108
0.1U_0402_16V4Z~D
1
2
RN13
56_0404_4P2R_5%~D
1423
C118
0.1U_0402_16V4Z~D
1
2
JDIM2
TYCO_1470815-2~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C140
0.1U_0402_16V4Z~D
1
2 C110
0.1U_0402_16V4Z~D
1
2C107
0.1U_0402_16V4Z~D
1
2
C112
0.1U_0402_16V4Z~D
1
2
RN11
56_0404_4P2R_5%~D
1423
RN5
56_0404_4P2R_5%~D
1423
C114
2.2U_0603_6.3V6K~D
1
2
C137
0.1U_0402_16V4Z~D
1
2
RN12
56_0404_4P2R_5%~D
1423
C104
0.1U_0402_16V4Z~D
1
2 C707
0.1U_0402_16V4Z~D
1
2
C132
2.2U_0603_6.3V6K~D
1
2
C130
0.1U_0402_16V4Z~D
1
2
RN3
56_0404_4P2R_5%~D
1 42 3
R22356_0402_5%~D
12
C133
2.2U_0603_6.3V6K~D
1
2
RN1
56_0404_4P2R_5%~D
1 42 3
RN2
56_0404_4P2R_5%~D
1 42 3
R127 10K_0402_5%~D
1 2R122 10K_0402_5%~D
1 2
C113
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_DQS#5
DDR_B_D55
DDR_B_D7
DDR_B_D62
DDR_B_D52
DDR_B_BS1
DDR_CKE3_DIMMB
DDR_B_D23
M_ODT3
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D6
DDR_B_D59
DDR_B_RAS#
DDR_B_MA4
DDR_B_DM2
DDR_B_MA9
DDR_B_DQS6
DDR_B_DM5
DDR_B_MA1
DDR_B_DQS#1
DDR_B_DQS#3
DDR_CKE2_DIMMB
DDR_B_D16
DDR_B_D8
DDR_B_D44
DDR_B_D38
M_ODT2
DDR_B_D31
DDR_B_D10
DDR_B_DM1
DDR_B_D34
V_DDR_MCH_REF
DDR_B_D54
DDR_B_DM4
DDR_B_MA0
DDR_B_DM0
DDR_B_DQS#4
DDR_B_CAS#
DDR_B_MA3
DDR_B_BS2
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D15
DDR_B_DQS0
DDR_B_D63
DDR_B_D50
DDR_B_MA7
DDR_B_DQS2
DDR_B_D0
DDR_B_DM6
DDR_B_MA2
DDR_B_MA10
DDR_B_DM3
DDR_B_DQS#2
DDR_B_MA13
DDR_B_D3DDR_B_D2
DDR_B_MA5
DDR_B_D19
DDR_B_DQS#0
DDR_B_DQS#7
DDR_B_DQS#6
DDR_CS2_DIMMB#
DDR_B_D9
DDR_B_D51
DDR_B_D37
DDR_B_MA11
DDR_B_D14
DDR_B_DQS7
DDR_B_D47
DDR_B_D58
DDR_B_DM7
DDR_B_MA6
DDR_B_MA12
DDR_B_D11
DDR_B_MA8
PM_EXTTS#1
DDR_B_MA7
M_ODT2
DDR_B_RAS#DDR_CS2_DIMMB#
DDR_B_MA0
DDR_B_MA6
DDR_B_BS1
DDR_B_MA11DDR_B_MA14
DDR_B_MA4
DDR_B_MA13
DDR_B_MA2
DDR_B_D45
DDR_B_D39DDR_B_D35
DDR_B_D30DDR_B_D27
DDR_B_D22DDR_B_D18
DDR_B_D21
DDR_B_D4DDR_B_D1DDR_B_D5
DDR_CKE2_DIMMBDDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
M_ODT3DDR_CS3_DIMMB#
DDR_B_D13DDR_B_D12
DDR_B_D20DDR_B_D17
DDR_B_D24 DDR_B_D28DDR_B_D25
DDR_B_D26
DDR_B_D29
DDR_B_D33DDR_B_D32DDR_B_D36
DDR_B_D40DDR_B_D41
DDR_B_D43DDR_B_D46DDR_B_D42
DDR_B_D53
DDR_B_D61DDR_B_D56DDR_B_D60
DDR_B_D57
MEM_SCLKMEM_SDATA
M_CLK_DDR2M_CLK_DDR#2
M_CLK_DDR#3M_CLK_DDR3
DDR_B_MA14
DDR_CKE3_DIMMB
DDR_B_D49 DDR_B_D48
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+1.8V_SUS+1.8V_SUS V_DDR_MCH_REF
DDR_B_D[0..63]11
DDR_B_DQS[0..7]11
DDR_B_MA[0..14]11
DDR_B_DM[0..7]11
DDR_B_DQS#[0..7]11
DDR_B_CAS#11
M_ODT310
DDR_CKE3_DIMMB 10
DDR_B_WE#11
DDR_CKE2_DIMMB10
DDR_B_BS011 DDR_B_RAS# 11DDR_B_BS1 11
DDR_B_BS211
M_ODT2 10DDR_CS3_DIMMB#10
DDR_CS2_DIMMB# 10
MEM_SCLK16,23MEM_SDATA16,23
PM_EXTTS#1 10
M_CLK_DDR2 10M_CLK_DDR#2 10
M_CLK_DDR3 10M_CLK_DDR#3 10
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
DDRII-SODIMM SLOT2
17 66Thursday, March 01, 2007
Compal Electronics, Inc.
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM2
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMBSTANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON BOTTOM SIDE
R241
10K_0402_5%~D
12
C447
2.2U_0603_6.3V6K~D
1
2
RN22
56_0404_4P2R_5%~D
1423
C433
0.1U_0402_16V4Z~D
1
2
C431
0.1U_0402_16V4Z~D
1
2
C413
0.1U_0402_16V4Z~D
1
2
JDIM1
TYCO_1565917-4~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C411
2.2U_0603_6.3V6K~D
1
2
C414
0.1U_0402_16V4Z~D
1
2
C451
0.1U_0402_16V4Z~D
1
2 C410
0.1U_0402_16V4Z~D
1
2C454
0.1U_0402_16V4Z~D
1
2
RN15
56_0404_4P2R_5%~D
1423
C436
0.1U_0402_16V4Z~D
1
2
RN21
56_0404_4P2R_5%~D
1423
R31256_0402_5%~D
12
RN24
56_0404_4P2R_5%~D
1 42 3
C456
0.1U_0402_16V4Z~D
1
2
R24310K_0402_5%~D
12
C405
0.1U_0402_16V4Z~D
1
2
C438
2.2U_0603_6.3V6K~D
1
2
RN26
56_0404_4P2R_5%~D
1 42 3
C429
2.2U_0603_6.3V6K~D
1
2
RN18
56_0404_4P2R_5%~D
1 42 3
RN19
56_0404_4P2R_5%~D
1423
C406
0.1U_0402_16V4Z~D
1
2
RN25
56_0404_4P2R_5%~D
1 42 3
C407
0.1U_0402_16V4Z~D
1
2
C440
2.2U_0603_6.3V6K~D
1
2
RN17
56_0404_4P2R_5%~D
1 42 3
C439
2.2U_0603_6.3V6K~D
1
2
C455
0.1U_0402_16V4Z~D
1
2 C408
0.1U_0402_16V4Z~D
1
2C452
0.1U_0402_16V4Z~D
1
2 C450
0.1U_0402_16V4Z~D
1
2C453
0.1U_0402_16V4Z~D
1
2
RN20
56_0404_4P2R_5%~D
1423
RN14
56_0404_4P2R_5%~D
1423
RN23
56_0404_4P2R_5%~D
1 42 3
C412
2.2U_0603_6.3V6K~D
1
2
C434
0.1U_0402_16V4Z~D
1
2
RN16
56_0404_4P2R_5%~D
1423
C409
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THERMATRIP1#
THERMATRIP2#
FAN1_TACH_FB
LDO_SET
+3V_LDOIN
+FAN1_VOUT
MDC_RST_DIS#SIO_GFX_PWR
THERMATRIP2#
+3VSUS_THRM
THERMATRIP1#
+FAN1_VOUT
REM_DIODE1_PREM_DIODE1_N
REM_DIODE4_NREM_DIODE4_P
VGA_THERMDP
AUDIO_AVDD_ON
5V_CAL_SIO#
THERMATRIP3#
THERMATRIP3#
THERM_B3
LDO_SET
VGA_THERMDN
ATF_INT#
MDC_RST_DIS#
SIO_GFX_PWR
5V_CAL_SIO#
VCP2
VCP2
VGA_THERMDNVGA_THERMDP
REM_DIODE3_NREM_DIODE3_P
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+2.5V_RUN
+5V_RUN
+RTC_CELL
+3.3V_RUN
+3.3V_SUS
+RTC_CELL
+3.3V_SUS+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_SUS+3.3V_RUN
+2.5V_RUN
+3.3V_SUS
+3.3V_SUS
+5V_SUS
+3.3V_SUSFAN1_TACH 39
ATF_INT# 38
THERMTRIP_SIO
THERMTRIP_MCH#10
H_THERMTRIP#7
THERM_STP# 45
2.5V_RUN_PWRGD 42
THRM_SMBDAT39,49THRM_SMBCLK39,49
H_THERMDA7
H_THERMDC7
SUSPWROK42POWER_SW# 39,40
ICH_PWRGD#42
MDC_RST_DIS#33
ACAV_IN 39,49,50
THERMTRIP_VGA#52
VGA_THERMDP 53
VGA_THERMDN 53
AUDIO_AVDD_ON27
PWR_MON 48
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
FAN & Thermal Sensor
18 66Thursday, March 01, 2007
Compal Electronics, Inc.
FAN1 Control and Tachometer
Place under CPU
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place C634 close to theGuardian pins as possible
Place C633 close to the Q40 as possible
SMBUS ADDRESS : 2F
Diode circuit at DP4/DN4 is used for skin tempsensor (placed optimally between CPU, MCH and GPU).
Voltage marginingcircuit for LDO output. For Vmargin, stuffRa=31.6K and Rb=30K. Rb=1K for production
Ra
Rb
VSET =Tp-70
21
VSET=R436+R438
R438x 3.3V
=> Tp = 88.2 C
=0.865V
Discrete
Place Capacitor close to Guardian Chip
This thermistor circuit is located nearTop side DDR connector.
Place C649 close to theGuardian pins as possible.
REM_DIODE3_N, REM_DIODE3_P routing together.Trace width / Spacing = 10 / 10 mil
Q41 Place near thebottom SODIMM
C418 close to Guardian andC904 close to diode Q19.
Place C650close to Q41
Place C636 close to the Guardian pins as possible
EB
CQ19MMST3904-7-F_SOT323-3~D
2
31
EB
CQ41MMST3904-7-F_SOT323-3~D
2
31
C706470P_0402_50V7K~D
1
2
R438118K_0402_1%~D
12
C64
60.
1U_0
402_
16V4
Z~D
1
2
C64
31U
_060
3_10
V4Z~
D
1
2
R4252.2K_0402_5%~D 1 2
R4140_0402_5%~D
12
JFAN1
MOLEX_53398-0371~D
112233
C6280.1U_0402_16V4Z~D
1
2
C6390.1U_0402_16V4Z~D
1
2
C64
710
U_0
805_
10V4
Z~D
1
2
R441
1K_0402_1%~D
12
C9042200P_0402_50V7K~D@
1
2
C64
510
U_0
805_
10V4
Z~D
1
2
R194
10K_0402_5%~D
@1 2
R43110K_0402_5%~D
@ 12
R436332K_0402_1%~D
12
R7712.21K_0603_1%~D
12
C418
2200P_0402_50V7K~D
1
2
R4238.2K_0402_5%~D
12
R429 1K_0402_5%~D
1 2
R439
0_1210_5%~D
12
R43010K_0402_5%~D
12
EB
CQ76MMST3904-7-F_SOT323-3~D2@
2
31
C6440.1U_0402_16V4Z~D
1
2
D19RB751S40T1_SOD523-2~D
@
21
C1002200P_0402_50V7K~D
1
2
U31
EMC4001_QFN48~D
DP3 45DN3 44
VCP1 43
ACAVAIL_CLR 4
VDD_5V 5
FAN_OUT7
SMDATA11SMBCLK12
VSS34
GPIO110GPIO213
3V_SUS35
3V_PWROK#16
THERMTRIP1#17
THERMTRIP2#18
THERMTRIP3#19
ATF_INT# 20RTC_PWR3V21
GPIO314GPIO415
VSUS_PWRGD23
SYS_SHDN# 24
LDO_SHDN#/ADDR 27
LDO_SET 28
LDO_OUT 32
LDO_IN 30
LDO_OUT 31
LDO_IN 29
XEN26
THERMTRIP_SIO 25
LDO_POK 33
GPIO6/FAN_DAC236
FAN_DAC139
DN240 DP241
DN137 DP138
POWER_SW# 3
VSET42
VCP2 46
VDD_5V 6
VDD_3V 9
DN4 47DP4 48
DN5 1DP5 2
GPIO522
FAN_OUT8
PAD_GND49
C7502200P_0402_50V7K~D
1
2
R4338.2K_0402_5%~D
12
R42410K_0402_5%~D
12
EB
C
Q38MMST3904-7-F_SOT323-3~D
2
31
R1868.2K_0402_5%~D
12
C6320.1U_0402_16V4Z~D
1
2
C6342200P_0402_50V7K~D
1
2
C6370.1U_0402_16V4Z~D
1
2
R772
10K_0603_1%_TSM1A103F34D3RZ~D
12
R4268.2K_0402_5%~D
12
C6502200P_0402_50V7K~D@
1
2
C64
010
U_0
805_
10V4
Z~D
1@
1
2
C6410.1U_0402_16V4Z~D@
1
2
R432 1K_0402_5%~D
1 2
C6492200P_0402_50V7K~D
1
2
C2030.1U_0402_16V4Z~D2@
1
2
C6332200P_0402_50V7K~D
@
1
2
C636470P_0402_50V7K~D
1
2
EB
C
Q39MMST3904-7-F_SOT323-3~D
2
31
C63
80.
1U_0
402_
16V4
Z~D
1
2
R9610K_0402_5%~D
12
R428
49.9_0603_1%~D
1 2
R485
31.6K_0402_1%
~D
@12
EB
C
Q40MMST3904-7-F_SOT323-3~D
2
31
R196
10K_0402_5%~D
@1 2
R77310K_0402_5%~D
12
R43
71K
_040
2_5%
~D
12
G
D
S
Q1022N7002W-7-F_SOT323-3~D
2
13
R434
7.5K_0402_5%~D
12
R1872.2K_0402_5%~D2@
12
R4272.2K_0402_5%~D
1 2
C63
0
22U
_080
5_6.
3VAM
~D
1
2
C6480.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
LCD_DDCCLKLCD_DDCDATA
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_BCLK+
LCD_B0+LCD_B0-
LCD_B2-
LCD_B1-
LCD_B2+
LCD_BCLK-
LCD_B1+
LAMP_STAT#
I2CH_SDA
LCD_SMBCLK
LCD_SMBDAT
I2CH_SCL
+3.3V_RUN
+LCDVDD
+3.3V_RUN
+INV_PWR_SRC+PWR_SRC
+INV_PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD+15V_ALW
+15V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
LCD_SMBDAT 39LCD_SMBCLK 39
RUN_ON37,39,41,42,51
LCD_TST 38
LCD_DDCCLK 52LCD_DDCDATA 52
LCD_A0- 53LCD_A0+ 53
LCD_A1- 53LCD_A1+ 53
LCD_A2- 53LCD_A2+ 53
LCD_ACLK- 53LCD_ACLK+ 53
LCD_B0- 53LCD_B0+ 53
LCD_B1- 53LCD_B1+ 53
LCD_B2- 53LCD_B2+ 53
LCD_BCLK- 53LCD_BCLK+ 53
BIA_PWM 52
ENVDD52
LCD_VCC_TEST_EN39
I2CH_SCL 52
I2CH_SDA 52
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Internal LVDS
19 66Thursday, March 01, 2007
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Populate R155 and de-pop R156for discrete because itdoesn't support DPST
G
D S
Q122N7002W-7-F_SOT323-3~D
@
2
1 3
R26470_0402_5%~D
12
R15510K_0402_5%~D
12
C45
0.1U_0402_16V4Z~D
1
2
G
D S
Q132N7002W-7-F_SOT323-3~D
@
2
1 3
R23100K_0402_5%~D
12
R153
100K_0402_5%~D
1 2
T28 PAD~D
S
GD
Q11SI3456BDV-T1-E3_TSOP6~D
3
6
24 5
1
C17
310
00P_
0402
_50V
7K~D
1
2
C440.1U_0402_16V4Z~D
1
2
G
D
S
Q8
2N70
02W
-7-F
_SO
T323
-3~D
2
13
C1760.1U_0402_16V4Z~D
1
2
G
D S
Q252N7002W-7-F_SOT323-3~D
2
1 3
R25100K_0402_5%~D@
12
R5270_0402_5%~D
@1 2
Q7DDTC124EUA-7-F_SOT323-3~D
I2
O1
G3
C42
70.
1U_0
603_
50V4
Z~D
1
2
C42
0.1U
_040
2_16
V4Z~
D
1
2
Q24FDS4435BZ_SO8~D
4
78
65
123
JLVDS
IPEX_20330-044E-11F~D
TXUCLKUT- 44
GND1 42
TXUOUT2+ 40
TXUOUT1- 38
GND3 36
TXUOUT0+ 34
TXLCLKOUT- 32
GND5 30
TXLOUT2+ 28
TXLOUT1- 26
GND7 24
TXLOUT0+ 22
PANEL_I2C_DAT 19GND9 18
GND10 16
LCDVDD2 14
LCDPWR_SRC 12
LCDPWR_SRC 10
+5V_ALWF 3
PBAT_SMBCLK 6
GND13 4
FPBACK 8
TXUCLKUT+ 43
TXUOUT2- 41
GND2 39
TXUOUT1+ 37
TXUOUT0- 35
GND4 33
TXLCLKOUT+ 31
TXLOUT2- 29
GND6 27
TXLOUT1+ 25
TXLOUT0- 23
GND8 21PANEL_I2C_CLK 20
VEDID 17
LCDVDD1 15
PNL_SLFTST 13
LCDPWR_SRC 11
GND11 9
LAMP_START 2
PBAT_SMBDAT 5
GND12 7
GND14 1
MGND145MGND246MGND347MGND448MGND549MGND650MGND751
NC56NC57
MGND1054MGND1155
MGND852MGND953
R154200K_0402_5%~D
12
C46
322
00P_
0402
_50V
7K~D
1
2
C1800.1U_0603_50V4Z~D
1
2
R156 0_0402_5%~D@1 2
G
D
S
Q9
2N70
02W
-7-F
_SO
T323
-3~D
2
13
R24100K_0402_5%~D
12
C30
0.1U
_060
3_50
V4Z~
D
1
2
C1740.1U_0603_50V4Z~D
1
2
D24
BAT54CW_SOT323~D
3
2
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2
CRT_GRN
CRT_BLU
CLK_DDC2
M_ID2#
JVGA_HSBLUE
RED
GREEN
JVGA_VS
CRT_RED
+3.3V_RUN
+5V_RUN_SYNC
+5V_RUN
+5V_RUN_SYNC
+5V_RUN
CRT_VCC
CRT_RED36,52
CRT_VSYNC52
CLK_DDC236,52
CRT_GRN36,52
CRT_BLU36,52
CRT_HSYNC52
DAT_DDC236,52
VSYNC_R 36
HSYNC_R 36
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
CRT
20 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1
Evaluate Package
A2
A1 K2
DA204U
U15
SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
D6SDM10U45-7_SOD523-2~D
2 1
R14610_0402_5%~D
1 2
L1BLM18AG121SN1D_0603~D
1 2
R14
215
0_04
02_1
%~D
12
R22.2K_0402_5%~D
12
L9BLM18BB750SN1D_0603~D
1 2
C14710P_0402_50V8J~D@
1
2
L2BLM18AG121SN1D_0603~D
1 2
F30.
12A
_48V
_NA
NO
SM
DC
012F
~D
@
12
C14810P_0402_50V8J~D@
1
2
C14910P_0402_50V8J~D@
1
2
R14
315
0_04
02_1
%~D
12
C71
210
P_0
402_
50V8
J~D
@
1
2
C4
10P
_040
2_50
V8J~
D
1
2
C71
910
P_0
402_
50V8
J~D
@
1
2
C1600.1U_0402_16V4Z~D
1
2
C16
1
22P
_040
2_50
V8J~
D
@
1
2
R13810_0402_5%~D
1 2
R5
1K_0
402_
5%~D
@
12
D8
SD
M10
U45
-7_S
OD
523-
2~D
21
L11BLM18BB750SN1D_0603~D
1 2
D9DA204U_SOT323~D@
2 31
R59
30_0402_1%~D
1 2
R14
115
0_04
02_1
%~D
12
D11DA204U_SOT323~D@
2 31
C16
2
22P
_040
2_50
V8J~
D
@
1
2
T5 PAD~D
U14SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
L10BLM18BB750SN1D_0603~D
1 2
JCRT
SUYIN_070915FR015S201CU~D
611
17
1228
1339
144
1015
5
1617
R3
1K_0
402_
5%~D
@1
2R144
1K_0402_5%~D 1 2
C5
10P
_040
2_50
V8J~
D
1
2
R7920_1206_5%~D
12
C16
5
22P
_040
2_50
V8J~
D
@
1
2
R60
30_0402_1%~D
1 2
C15
10.
01U
_040
2_16
V7K~
D
1
2
R13
72.
2K_0
402_
5%~D
12
D10DA204U_SOT323~D@
2 31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK
_IC
H_T
ER
M
PCI_PIRQD#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
ICH_GPIO2_PIRQE#
PCI_REQ0#
PCI_REQ1#
ICH_SPI_CS1#PCI_GNT0#
PCI_RST#
PLTRST1#
PLTRST2#
PLTRST3#
PCI_PIRQD#
PCI_AD29
PCI_AD27
PCI_AD15
PCI_AD2
PCI_AD6
PCI_AD0
PCI_AD12
PCI_AD28
PCI_AD23
PCI_AD30
PCI_AD20
PCI_AD5
PCI_AD22
PCI_AD19
PCI_AD16
PCI_AD9
PCI_AD4
PCI_AD10
PCI_PIRQC#
PCI_AD25
PCI_AD17
PCI_AD14
PCI_AD11
PCI_PIRQA#
PCI_AD24
PCI_AD18
PCI_AD8
PCI_AD3
PCI_AD1
PCI_AD31
PCI_AD26
PCI_AD21
PCI_AD7
PCI_PIRQB#
PCI_AD13PCI_PCIRST#
CLK_PCI_ICH
PCI_DEVSEL#
PCI_GNT0#
PCI_STOP#
PCI_PAR
PCI_C_BE0#
PCI_PLTRST#
PCI_PCIRST#
PCI_C_BE1#
PCI_PLTRST#
ICH_GPIO2_PIRQE#
PCI_PERR#
PCI_C_BE3#
CLK_PCI_ICH
PCI_C_BE2#
PCI_FRAME#
PCI_SERR#PCI_PLOCK#
PCI_REQ1#
PCI_REQ0#
ICH_PME#
PCI_TRDY#
PCI_IRDY#
PCI_GNT1#
SB_LOM_PCIE_RST#
SB_WWAN_PCIE_RST#
PCI_GNT3#
SB_LOM_PCIE_RST#
SB_WWAN_PCIE_RST#
PCI_GNT3#
SB_NB_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_NB_PCIE_RST#
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# 30,35
PCI_PAR 30,35
PCI_SERR# 30,35
PCI_IRDY# 30,35,36
PCI_PERR# 30,35
PCI_C_BE3# 30,35
PCI_FRAME# 30,35,36
PCI_C_BE2# 30,35
PCI_DEVSEL# 30,35
PCI_TRDY# 30,35
PCI_C_BE0# 30,35
PCI_STOP# 30,35
PCI_AD[0..31]30,35
ICH_PME# 38CLK_PCI_ICH 6
PCI_PLOCK# 35
PCI_RST# 30,31,35
PLTRST1# 10
PLTRST2# 38,39
PLTRST3# 28,34
ICH_SPI_CS1#23
PCI_REQ0# 36PCI_GNT0# 35,36
PCI_REQ1# 30PCI_GNT1# 30
PCI_PIRQA#35
PCI_PIRQD#30
SB_LOM_PCIE_RST# 28
SB_WWAN_PCIE_RST# 34
SB_NB_PCIE_RST# 10SB_WLAN_PCIE_RST# 34
PCIE_MCARD2_DET# 34
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
ICH8(1/4)
21 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PCI
PCI_GNT0# SPI_CS1#
1
0
1
Boot BIOS Strap
LPC
SPI
Place closely pin U19.A9
* 0
1
1
Boot BIOS Location
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BIOS should not enable the internalGPIO pull up resistor
Low = A16 swap override enabled.High = Default.PCI_GNT3#
A16 away override strap.
T1 PAD~D
Interrupt I/F
PCI
U32B
ICH8M_BGA676~D
AD0D20AD1E19AD2D19AD3A20AD4D17AD5A21AD6A19AD7C19AD8A18AD9B16AD10A12AD11E16AD12A14AD13G16AD14A15AD15B6AD16C11AD17A9AD18D11AD19B12AD20C12AD21D10AD22C7AD23F13AD24E11AD25E13AD26E12AD27D8AD28A6AD29E8AD30D6AD31A3
PIRQA#F9PIRQB#B5PIRQC#C5PIRQD#A10
REQ0# A4GNT0# D7
REQ1#/GPIO50 E18GNT1#/GPIO51 C18REQ2#/GPIO52 B19GNT2#/GPIO53 F18REQ3#/GPIO54 A11GNT3#/GPIO55 C10
C/BE0# C17C/BE1# E15C/BE2# F16C/BE3# E17
IRDY# C8PAR D9
PCIRST# G6DEVSEL# D16
PERR# A7PLOCK# B7
SERR# F10STOP# C16TRDY# C9
FRAME# A17
PLTRST# AG24
PME# G7PCICLK B10
PIRQE#/GPIO2 F8PIRQF#/GPIO3 G11PIRQG#/GPIO4 F12PIRQH#/GPIO5 B3
R461 20K_0402_5%~D 1 2
R458 8.2K_0402_5%~D
1 2
R447 8.2K_0402_5%~D
1 2
U33A
74VHC08MTCX_NL_TSSOP14~D
IN11
IN22 OUT 3
P14
G7
C6510.1U_0402_16V4Z~D
R446 8.2K_0402_5%~D
1 2
R459 8.2K_0402_5%~D
1 2
R631 20K_0402_5%~D
1 2
R449 8.2K_0402_5%~D
1 2
R444 8.2K_0402_5%~D1 2
R464
10_0402_5%~D@
12
R451 8.2K_0402_5%~D
1 2
R445 8.2K_0402_5%~D
1 2
T2 PAD~D
U33B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
R448 8.2K_0402_5%~D
1 2
R601 20K_0402_5%~D 1 2
R4771K_0402_5%~D@
12
R443 8.2K_0402_5%~D1 2
R452 8.2K_0402_5%~D
1 2
R442 8.2K_0402_5%~D1 2
R462
1K_0402_5%~D
12
R463
1K_0402_5%~D@
12
R460 20K_0402_5%~D 1 2
U33D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
R453 8.2K_0402_5%~D
1 2
R450 8.2K_0402_5%~D
1 2
R454 8.2K_0402_5%~D
1 2
U33C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
C652
8.2P_0402_50V8J~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#
ICH_AZ_SYNC
ICH_AZ_RST#
ICH_AZ_SDOUT
ICH_AZ_BITCLK
IDE_IRQ
SIO_A20GATE
SIO_RCIN#
PSATA_IRX_DTX_P0_C
CLK_PCIE_SATA#
SATA_ACT#_R
ICH_AZ_MDC_SDIN1
ICH_AZ_BITCLK
ICH_INTVRMEN
ICH_RTCRST#
SATA_TX0-_N0
ICH_AZ_RST#
CLK_PCIE_SATA
ICH_RTCX2
ICH_RTCX1
ICH_AZ_SYNC
ICH_INTVRMEN
ICH_AZ_CODEC_SDIN0
SATA_TX0+_P0
PSATA_IRX_DTX_N0_C
ICH_AZ_SDOUT
THRMTRIP_ICH#
H_DPRSTP#
INTRUDER#
LAN100_SLP
IDE_DD8
IDE_IRQ
IDE_DD10
IDE_DD5
IDE_DDACK#
IDE_DD1
H_INTR
IDE_DD0
IDE_DCS1#
H_INIT#
H_IGNNE#
LPC_LFRAME#
LPC_LAD0
IDE_DIORDY
IDE_DA2
H_A20M#
LPC_LAD2
IDE_DD2
H_SMI#
IDE_DIOW#
IDE_DD9
IDE_DD6
SIO_A20GATE
LPC_LAD1
IDE_DD3
SIO_RCIN#
IDE_DIOR#
IDE_DA1
IDE_DD11
H_STPCLK#
LPC_LAD3
IDE_DDREQ
IDE_DD14IDE_DD13
IDE_DA0
H_NMI
H_PWRGOOD
IDE_DD12
IDE_DD7
IDE_DD4
H_FERR#
IDE_DCS3#
IDE_DD15
ICH_TP8
LPC_LDRQ1#LPC_LDRQ0#
LAN100_SLP
H_DPSLP#
ICH_AZ_SDOUT
+RTC_CELL
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN
+1.05V_VCCP
+1.5V_RUN_PCIE_ICH
+RTC_CELL +RTC_CELL
+3.3V_RUN
IDE_DDACK# 25
IDE_DIOR# 25IDE_DIOW# 25
ICH_AZ_MDC_SDIN133
CLK_PCIE_SATA6
H_INTR 7H_INIT# 7
H_DPSLP# 8
H_SMI# 7
H_IGNNE# 7
H_A20M# 7
H_NMI 7
H_STPCLK# 7
IDE_IRQ 25
SIO_RCIN# 39
IDE_DIORDY 25
IDE_DCS1# 25
ICH_AZ_CODEC_SDIN026
IDE_DCS3# 25
CLK_PCIE_SATA#6
ICH_AZ_CODEC_RST#26
ICH_AZ_CODEC_SYNC26
ICH_AZ_CODEC_SDOUT26
ICH_AZ_MDC_SYNC33
ICH_AZ_MDC_RST#33
ICH_AZ_MDC_SDOUT33
SIO_A20GATE 39
H_PWRGOOD 8
IDE_DA0 25IDE_DA1 25IDE_DA2 25
LPC_LAD0 28,38,39LPC_LAD1 28,38,39LPC_LAD2 28,38,39LPC_LAD3 28,38,39
ICH_AZ_MDC_BITCLK33
ICH_AZ_CODEC_BITCLK26
LPC_LFRAME# 28,38,39
H_FERR# 7
H_DPRSTP# 8,10,48
IDE_DD[0..15] 25
IDE_DDREQ 25
SATA_ACT#_R43
LPC_LDRQ0# 38LPC_LDRQ1# 38
PSATA_ITX_DRX_P025
PSATA_IRX_DTX_N0_C25PSATA_IRX_DTX_P0_C25
PSATA_ITX_DRX_N025
ICH_RSVD 23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
ICH8(2/4)
22 66Thursday, March 01, 2007
Compal Electronics, Inc.
Package9.6X4.06 mm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U19
Within 500 mils
XOR Chain Entrance Strap
DescriptionICH RSVD HDA SDOUT
RSVD
Enter XOR Chain
Normal Operation (Default)
Set PCIE port config bit 1
0 0
0
0
1
1
1 1
ICH8M Internal VR Enable Strap(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
Low = Internal VR DisabledHigh = Internal VR Enabled(Default)
ICH_INTVRMEN ICH_LAN100_SLP Low = Internal VR DisabledHigh = Internal VR Enabled(Default)
ICH8M LAN100 SLP Strap(Internal VR for VccLAN1.05 and VccCL1.05)
R4780_0402_1%
@
12
C65315P_0402_50V8J~D
12
R47
456
_040
2_1%
~D
@
12
R471 1M_0402_5%~D
1 2
R496
33_0402_5%~D
1 2
R481 33_0402_5%~D
1 2
R494 33_0402_5%~D 1 2
C658 3900P_0402_50V7K~D12
R472332K_0402_1%~D
12
R475332K_0402_1%~D
12
R465
10K_0402_5%~D
12
C65627P_0402_50V8J~D
12
RTC
LPC
CPU
LAN / GLAN
IHDA
SATA
IDE
U32A
ICH8M_BGA676~D
RTCX1AG25RTCX2AF24
RTCRST#AF23
INTRUDER#AD22
INTVRMENAF25LAN100_SLPAD21
GLAN_CLKB24
LAN_RSTSYNCD22
LAN_RXD0C21LAN_RXD1B21LAN_RXD2C22
LAN_TXD_0D21LAN_TXD_1E20LAN_TXD_2C20
GLAN_DOCK#/GPIO13AH21
GLAN_COMPID25GLAN_COMPOC25
HDA_BIT_CLKAJ16HDA_SYNCAJ15
HDA_RST#AE14
HDA_SDIN0AJ17HDA_SDIN1AH17HDA_SDIN2AH15HDA_SDIN3AD13
HDA_SDOUTAE13
HDA_DOCK_EN#/GPIO33AE10HDA_DOCK_RST#/GPIO34AG14
SATALED#AF10
SATA0RXNAF6SATA0RXPAF5SATA0TXNAH5SATA0TXPAH6
SATA1RXNAG3SATA1RXPAG4SATA1TXNAJ4SATA1TXPAJ3
SATA2RXNAF2SATA2RXPAF1SATA2TXNAE4SATA2TXPAE3
SATA_CLKNAB7SATA_CLKPAC6
SATARBIAS#AG1SATARBIASAG2
FWH0/LAD0 E5FWH1/LAD1 F5FWH2/LAD2 G8FWH3/LAD3 F6
FWH4/LFRAME# C4
LDRQ0# G9LDRQ1#/GPIO23 E6
A20GATE AF13A20M# AG26
DPRSTP# AF26DPSLP# AE26
FERR# AD24
CPUPWRGD/GPIO49 AG29
IGNNE# AF27
INIT# AE24
RCIN# AH14INTR AC20
NMI AD23SMI# AG28
STPCLK# AA24
THRMTRIP# AE27
TP8 AA23
DD0 V1DD1 U2DD2 V3DD3 T1DD4 V4DD5 T5DD6 AB2DD7 T6DD8 T3DD9 R2
DD10 T4DD11 V6DD12 V5DD13 U1DD14 V2DD15 U6
DA0 AA4DA1 AA1DA2 AB3
DCS1# Y6DCS3# Y5
DIOR# W4DIOW# W3
DDACK# Y2IDEIRQ Y3IORDY Y1
DDREQ W5R491 24.9_0402_1%~D
1 2
R3851K_0402_5%~D@
12
C47
0
0.1U
_040
2_16
V4Z~
D
1
2
R493 33_0402_5%~D 1 2
C659 3900P_0402_50V7K~D12
R487 33_0402_5%~D 1 2
R470 20K_0402_5%~D
1 2
C65415P_0402_50V8J~D
12
T12PAD~D
R466
10K_0402_5%~D
12
R495 33_0402_5%~D
1 2
C6551U_0603_10V4Z~D
1 2
Y432.768K_12.5P_1TJS125DJ4A420P~D
14
23
C660
27P_0402_50V8J~D
1
2
R467
10M_0402_5%~D
12
R48256_0402_5%~D
12
R490 8.2K_0402_5%~D
1 2
R484 33_0402_5%~D
1 2
R48024.9_0402_1%~D
1 2
R4760_0402_5%~D@
12
R468
56_0402_5%~D
12
CMOS_CLR @SHORT PADS~D
11 2 2
R3861K_0402_5%~D@
12
R483 33_0402_5%~D 1 2
R47
356
_040
2_1%
~D
@
12
R469
0_0402_5%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A AUSBRBIAS
ICH_EC_SPI_CLKICH_SPI_CS0#ICH_SPI_CS1#
CLK_ICH_48M
CLK_ICH_14M
H_STP_CPU#
ICH_CL_PWROK
CLK_ICH_14M
ICH_SMBDATA
SIO_PWRBTN#
SIO_SLP_S3#
ICH_SMBCLK
DPRSLPVR
SPKR
ICH_PWRGD
SIO_EXT_SMI#
ICH_SUSCLK
DPRSLPVR
CLKRUN#
SIO_SLP_S5#
MCH_ICH_SYNC#
H_STP_PCI#
IRQ_SERIRQ
ICH_CL_RST1#
IDE_RST_MOD
ICH_RI#
ICH_PCIE_WAKE#
SATA_CLKREQ#
ICH_RSVD
CL_CLK0
CLK_PWRGD
CL_VREF0_ICH
ICH_BATLOW#
RSV_THRM#
ICH_TP7
ITP_DBRESET#
CLK_ICH_48M
IMVP_PWRGD
CL_DATA0
PM_BMBUSY#
USB_OC9#
USB_OC7#USB_OC8#
USB_OC5#
USB_OC2_3#
DMI_MRX_ITX_P3
DMI_MTX_IRX_P2
USBP5+
DMI_MRX_ITX_N3
DMI_MRX_ITX_P1
DMI_IRCOMP
USBP5-
DMI_MTX_IRX_N2
DMI_MTX_IRX_P0
USBP7+
DMI_MTX_IRX_P1
USBP8-
USBP4+
USBP1-
DMI_MRX_ITX_P0
USBP9+
USBP7-
USBP8+
DMI_MRX_ITX_P2
DMI_MRX_ITX_N1
USBP9-
USBP6+USBP6-
USBP1+
DMI_MTX_IRX_P3
USBP4-
CLK_PCIE_ICH#
USBP3+
USBP2+
USBP0-USBP0+
DMI_MTX_IRX_N1
USBP2-
DMI_MTX_IRX_N3
USBP3-
CLK_PCIE_ICH
DMI_MRX_ITX_N2
DMI_MRX_ITX_N0
DMI_MTX_IRX_N0
USB_OC0_1#
PCIE_IRX_WLANTX_P2PCIE_IRX_WLANTX_N2
PCIE_ITX_WLANRX_P2PCIE_ITX_WLANRX_N2
PCIE_IRX_WANTX_P1PCIE_IRX_WANTX_N1
PCIE_ITX_WANRX_P1PCIE_ITX_WANRX_N1
USB_OC6#
USB_OC7#
USB_OC2_3#USB_OC0_1#
USB_OC4#USB_OC5#
USB_OC8#USB_OC9#
USB_OC6#
USB_OC4#
ICH_CL_PWROK
ICH_PWRGD
ICH_SMBDATA
ICH_SMBCLK
MEM_SDATA
MEM_SCLK
ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1
ICH_RI#
ICH_PCIE_WAKE#
CL_VREF0_ICH
CL_RST0#
SIO_EXT_SMI#
CLKRUN#
RSVD_GPIO39
RSVD_GPIO48
RSV_THRM#
IRQ_SERIRQ
MCH_ICH_SYNC#
SPKR
RSVD_GPIO39RSVD_GPIO48
RSVD_GPIO27
ICH_EC_SPI_DOICH_EC_SPI_DIN
IMVP_PWRGD
ICH_RSMRST#
ICH_RSMRST#
PCIE_RX6+/GLAN_RX+GLAN_TXN_CGLAN_TXP_C
PCIE_RX6-/GLAN_RX-
ICH_SMLINK1ICH_SMLINK0
ICH_LAN_RST#
EC_ME_ALERT
EC_ME_ALERT
PLTRST_DELAY#
SIO_EXT_SCI#
SIO_EXT_SCI#
LOM_ICH_SMBALERT#
LOM_ICH_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
ICH_LAN_RST#
+3.3V_SUS
+1.5V_RUN_PCIE_ICH
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
USBP4+ 31USBP5- 40
USBP3+ 32
USBP5+ 40
USBP4- 31
USBP3- 32USBP2+ 32USBP2- 32
CLK_PCIE_ICH# 6CLK_PCIE_ICH 6
USBP6+ 30USBP6- 30
USBP1+ 32USBP1- 32
DMI_MTX_IRX_N0 10
DMI_MTX_IRX_N1 10
DMI_MTX_IRX_N2 10
DMI_MTX_IRX_N3 10
DMI_MTX_IRX_P0 10DMI_MRX_ITX_N0 10DMI_MRX_ITX_P0 10
DMI_MTX_IRX_P1 10DMI_MRX_ITX_N1 10DMI_MRX_ITX_P1 10
DMI_MTX_IRX_P2 10DMI_MRX_ITX_N2 10DMI_MRX_ITX_P2 10
DMI_MTX_IRX_P3 10DMI_MRX_ITX_N3 10DMI_MRX_ITX_P3 10
USBP0- 32USBP0+ 32
ICH_EC_SPI_CLK39ICH_SPI_CS0#39ICH_SPI_CS1#21
USBP7+ 40USBP7- 40
MCH_ICH_SYNC#10
ICH_SMBCLK28,34
H_STP_PCI#6
ICH_SMBDATA28,34
CL_CLK0 10
ICH_PWRGD 10,42
CLK_ICH_48M 6
SIO_PWRBTN# 39
CLK_ICH_14M 6
ICH_CL_PWROK 10,39
SIO_SLP_S5# 39
H_STP_CPU#6
DPRSLPVR 10,48
CLK_PWRGD 6
SIO_SLP_S3# 39
CL_DATA0 10
SATA_CLKREQ#6
IMVP_PWRGD39,42,48
ITP_DBRESET#7,38
SPKR26
PM_BMBUSY#10
IRQ_SERIRQ28,30,38,39
IDE_RST_MOD25
SIO_EXT_SMI#39
CLKRUN#30,38,39
ICH_PCIE_WAKE#38
PCIE_ITX_WLANRX_N2_C34PCIE_IRX_WLANTX_P234PCIE_IRX_WLANTX_N234
PCIE_IRX_WANTX_P134PCIE_IRX_WANTX_N134
PCIE_ITX_WLANRX_P2_C34
PCIE_ITX_WANRX_P1_C34PCIE_ITX_WANRX_N1_C34
CL_RST0# 10
USBP8+ 36USBP8- 36
USBP9+ 34USBP9- 34
USB_OC0_1#32
USB_OC2_3#32
MEM_SCLK 16,17
MEM_SDATA 16,17
ICH_RSVD22
ICH_EC_SPI_DO39ICH_EC_SPI_DIN39
ICH_RSMRST# 39
PCIE_RX6-/GLAN_RX-28
PCIE_TX6-/GLAN_TX-28PCIE_RX6+/GLAN_RX+28
PCIE_TX6+/GLAN_TX+28
PLTRST_DELAY#52
SIO_EXT_SCI#39
LOM_SMB_ALERT#28,39
USB_IDE#25
SIO_EXT_WAKE#38
USB_MCARD1_DET#34PCIE_MCARD1_DET#34
USB_MCARD2_DET#34
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
ICH8(3/4)
23 66Thursday, March 01, 2007
Compal Electronics, Inc.
Place closely pin U19.B2
Place closely pin U19.AC1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Within 500 mils
Within 500 mils
----->Blue Tooth----->Card Bus
----->Smart Card
----->Rear Left----->Side Bottom----->Side Top
----->Rear Right
----->Biometric
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
Low = Default
High = No Reboot
SPKR
No Reboot Strap
----->Dock----->WWAN
Option to " Disable "clkrun. Pulling itdownwill keep the clksrunning.
GIGA LAN --->
R530 15_0402_5%~D
1 2
R520
10_0402_5%~D@
12
C664 0.1U_0402_10V7K~D
1 2
R807 10K_0402_5%~D
1 2
R523 10K_0402_5%~D
1 2
RP1
10K_1206_8P4R_5%~D
1 82 73 64 5
C87
747
P_0
402_
50V8
J~D
@
1
2
C87
447
P_0
402_
50V8
J~D
@
1
2
R510
10_0402_5%~D@
12
R500
8.2K_0402_5%
~D
12
R502 10K_0402_5%~D@
12
R506 10K_0402_5%~D 1 2
R514 10K_0402_5%~D@1 2
R834 10K_0402_5%~D
1 2
T86 PAD~D
R50810_0402_5%~D@
12
R819 0_0603_5%~D
1 2
T24PAD~D
R497 10K_0402_5%~D
12
R499 2.2K_0402_5%~D
1 2
C87
847
P_0
402_
50V8
J~D
@
1
2
T13 PAD~D
R817 0_0603_5%~D
1 2
R5058.2K_0402_5%~D
12
R411 2.2K_0402_5%~D@1 2
R503 10K_0402_5%~D@
1 2
R529 24.9_0402_1%~D 1 2
R820 4.7K_0603_5%~D 1 2
R504 10K_0402_5%~D
12
R498 2.2K_0402_5%~D1 2
R501 100K_0402_5%~D
1 2
R818 0_0603_5%~D
1 2
R509 10K_0402_5%~D
1 2
R518 8.2K_0402_5%~D
12
R5193.24K_0402_1%~D
12
R528 10K_0402_5%~D
1 2R521 1K_0402_5%~D
1 2
R531 15_0402_5%~D
1 2R532 15_0402_5%~D
1 2
T14PAD~D
R512 10K_0402_5%~D
1 2
C87
647
P_0
402_
50V8
J~D
@
1
2
C669 0.1U_0402_10V7K~D
1 2
C666 0.1U_0402_10V7K~D
1 2
G
D S
Q212N7002W-7-F_SOT323-3~D
2
1 3
R27
82.
2K_0
402_
5%~D
12
C668 0.1U_0402_10V7K~D
1 2
C670 0.1U_0402_10V7K~D
1 2
R524 10K_0402_5%~D@1 2
PCI - Express
Direct Media Interface
SPI
USB
U32D
ICH8M_BGA676~D
PERN1P27PERP1P26PETN1N29PETP1N28
PERN2M27PERP2M26PETN2L29PETP2L28
PERN3K27PERP3K26PETN3J29PETP3J28
PERN4H27PERP4H26PETN4G29PETP4G28
PERN5F27PERP5F26PETN5E29PETP5E28
PERN6/GLAN_RXND27PERP6/GLAN_RXPD26PETN6/GLAN_TXNC29PETP6/GLAN_TXPC28
SPI_CLKC23SPI_CS0#B23SPI_CS1#E22
SPI_MOSID23SPI_MISOF21
OC0#AJ19OC1#/GPIO40AG16OC2#/GPIO41AG15OC3#/GPIO42AE15OC4#/GPIO43AF15OC5#/GPIO29AG17OC6#/GPIO30AD12OC7#/GPIO31AJ18OC8#AD14OC9#AH18
DMI0RXN V27DMI0RXP V26DMI0TXN U29DMI0TXP U28
DMI1RXN Y27DMI1RXP Y26DMI1TXN W29DMI1TXP W28
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA29DMI2TXP AA28
DMI3RXN AD27DMI3RXP AD26DMI3TXN AC29DMI3TXP AC28
DMI_CLKN T26DMI_CLKP T25
DMI_ZCOMP Y23DMI_IRCOMP Y24
USBP0N G3USBP0P G2USBP1N H5USBP1P H4USBP2N H2USBP2P H1USBP3N J3USBP3P J2USBP4N K5USBP4P K4USBP5N K2USBP5P K1USBP6N L3USBP6P L2USBP7N M5USBP7P M4USBP8N M2USBP8P M1USBP9N N3USBP9P N2
USBRBIAS# F2USBRBIAS F3
G
D S
Q272N7002W-7-F_SOT323-3~D
2
1 3
R42 1M_0402_1%~D
1 2
C667 0.1U_0402_10V7K~D
1 2
SMB
SYS / GPIO
GPIO
MISC
Controller Link
Power MGT
clocks
SATA
GPIO
U32C
ICH8M_BGA676~D
SMBCLKAJ26SMBDATAAD19LINKALERT#AG21SMLINK0AC17SMLINK1AE19
RI#AF17
SUS_STAT#/LPCPD#F4SYS_RESET#AD15
BMBUSY#/GPIO0AG12
SMBALERT#/GPIO11AG22
STP_PCI#/GPIO15AE20STP_CPU#/GPIO25AG18
CLKRUN#/GPIO32AH11
WAKE#AE17SERIRQAF12THRM#AC13
VRMPWRGDAJ20
TP7AJ22
TACH1/GPIO1AJ8TACH2/GPIO6AJ9TACH3/GPIO7AH9GPIO8AE16GPIO12AC19TACH0/GPIO17AG8GPIO18AH12GPIO20AE11SCLOCK/GPIO22AG10QRT_STATE0/GPIO27AH25QRT_STATE1/GPIO28AD16SATACLKREQ#/GPIO35AG13SLOAD/GPIO38AF9SDATAOUT0/GPIO39AJ11SDATAOUT1/GPIO48AD10
SPKRAD9
MCH_SYNC#AJ13
TP3AJ21
SATA0GP/GPIO21 AJ12SATA1GP/GPIO19 AJ10SATA2GP/GPIO36 AF11SATA3GP/GPIO37 AG11
CLK14 AG9CLK48 G5
SUSCLK D3
SLP_S3# AG23SLP_S4# AF21SLP_S5# AD18
S4_STATE#/GPIO26 AH27
PWROK AE23
DPRSLPVR/GPIO16 AJ14
BATLOW# AE21
PWRBTN# C2
LAN_RST# AH20
RSMRST# AG27
CK_PWRGD E1
CLPWROK E3
SLP_M# AJ25
CL_CLK0 F23CL_CLK1 AE18
CL_DATA0 F22CL_DATA1 AF19
CL_VREF0 D24CL_VREF1 AH23
CL_RST# AJ23
MEM_LED/GPIO24 AJ27ME_EC_ALERT/GPIO10 AJ24EC_ME_ALERT/GPIO14 AF22
WOL_EN/GPIO9 AG19
C66
20.
1U_0
402_
16V4
Z~D
1
2
RP2
10K_1206_8P4R_5%~D
1 82 73 64 5
R115 1K_0402_5%~D@1 2
R8160_0603_5%~D
1 2
R515 10K_0402_5%~D 1 2
T15PAD~D
R690 8.2K_0402_5%~D
1 2
R793 0_0402_5%~D@1 2
R763 15_0402_5%~D
1 2
R99
2.2K
_040
2_5%
~D
12
C663
4.7P_0402_50V8C~D@
1
2
C87
547
P_0
402_
50V8
J~D
@
1
2
R52
245
3_04
02_1
%~D
12
R533 22.6_0402_1%~D
1 2
R516 10K_0402_5%~D 1 2
C661
4.7P_0402_50V8C~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSATAPLLR
ICH_V5REF_SUSICH_V5REF_RUN
TP_VCCLAN1.05_INT_ICH2
ICH_V5REF_SUS
+1.5V_RUN_PCIE_ICH
ICH_V5REF_RUN
TP_VCCLAN1.05_INT_ICH1
TP_VCCSUS1.05_INT_ICH1TP_VCCSUS1.05_INT_ICH2
VCCSUS1_5_ICH_2
VCCSUS1_5_ICH_1
VCCCL1_05_ICH
+1.05V_VCCP+3.3V_RUN+5V_RUN
+3.3V_SUS+5V_SUS
+1.25V_RUN+1.05V_VCCP
+1.5V_RUN_PCIE_ICH+1.5V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+RTC_CELL
+1.5V_RUN+1.5V_RUN_SATAPLL
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.5V_RUN_PCIE_ICH
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
ICH8(4/4)
24 66Monday, February 26, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place Cap as closeto A24 as possible
C674
0.1U_0402_16V4Z~D
1
2
D21
RB751V_SOD323~D
21
L4510UH_LB2012T100MR_20%_0805~D
1 2
D34
MMBD4148-7-F_SOT23-3~D
1
3
2
C68
110
U_0
805_
4VAM
~D
1
2
C690
1U_0603_10V4Z~D
1
2
C704
0.1U_0402_16V4Z~D
1
2
C689
10U_0805_4VAM
~D
1
2
T21PAD~D
C686
0.1U_0402_16V4Z~D
1
2
D20
RB751V_SOD323~D 2
1
T22PAD~D
C6961U_0603_10V4Z~D
1
2
CORE
VCCP_CORE
IDE
PCI
VCCPSUS
VCCPUSB
GLAN POWER
USB CORE
ATX
ARX
VCCA3GP
U32F
ICH8M_BGA676~D
VCCRTCAD25
V5REF[1]A16V5REF[2]T7
V5REF_SUSG4
VCC1_5_B[01]AA25VCC1_5_B[02]AA26VCC1_5_B[03]AA27VCC1_5_B[04]AB27VCC1_5_B[05]AB28VCC1_5_B[06]AB29VCC1_5_B[07]D28VCC1_5_B[08]D29VCC1_5_B[09]E25VCC1_5_B[10]E26VCC1_5_B[11]E27VCC1_5_B[12]F24VCC1_5_B[13]F25VCC1_5_B[14]G24VCC1_5_B[15]H23VCC1_5_B[16]H24VCC1_5_B[17]J23VCC1_5_B[18]J24VCC1_5_B[19]K24VCC1_5_B[20]K25VCC1_5_B[21]L23VCC1_5_B[22]L24VCC1_5_B[23]L25VCC1_5_B[24]M24VCC1_5_B[25]M25VCC1_5_B[26]N23VCC1_5_B[27]N24VCC1_5_B[28]N25VCC1_5_B[29]P24VCC1_5_B[30]P25VCC1_5_B[31]R24VCC1_5_B[32]R25VCC1_5_B[33]R26VCC1_5_B[34]R27VCC1_5_B[35]T23VCC1_5_B[36]T24VCC1_5_B[37]T27VCC1_5_B[38]T28VCC1_5_B[39]T29VCC1_5_B[40]U24VCC1_5_B[41]U25VCC1_5_B[42]V23VCC1_5_B[43]V24VCC1_5_B[44]V25VCC1_5_B[45]W25VCC1_5_B[46]Y25
VCCSATAPLLAJ6
VCC1_5_A[01]AE7VCC1_5_A[02]AF7VCC1_5_A[03]AG7VCC1_5_A[04]AH7VCC1_5_A[05]AJ7
VCC1_5_A[06]AC1VCC1_5_A[07]AC2VCC1_5_A[08]AC3VCC1_5_A[09]AC4VCC1_5_A[10]AC5
VCC1_5_A[11]AC10VCC1_5_A[12]AC9
VCC1_5_A[13]AA5VCC1_5_A[14]AA6
VCC1_5_A[15]G12VCC1_5_A[16]G17VCC1_5_A[17]H7
VCC1_5_A[18]AC7VCC1_5_A[19]AD7
VCCUSBPLLD1
VCC1_5_A[20]F1VCC1_5_A[21]L6VCC1_5_A[22]L7VCC1_5_A[23]M6VCC1_5_A[24]M7
VCC1_5_A[25]W23
VCCLAN1_05[1]F17VCCLAN1_05[2]G18
VCCLAN3_3[1]F19VCCLAN3_3[2]G20
VCCGLANPLLA24
VCCGLAN1_5[1]A26VCCGLAN1_5[2]A27VCCGLAN1_5[3]B26VCCGLAN1_5[4]B27VCCGLAN1_5[5]B28
VCCGLAN3_3B25
VCC1_05[01] A13VCC1_05[02] B13VCC1_05[03] C13VCC1_05[04] C14VCC1_05[05] D14VCC1_05[06] E14VCC1_05[07] F14VCC1_05[08] G14VCC1_05[09] L11VCC1_05[10] L12VCC1_05[11] L14VCC1_05[12] L16VCC1_05[13] L17VCC1_05[14] L18VCC1_05[15] M11VCC1_05[16] M18VCC1_05[17] P11VCC1_05[18] P18VCC1_05[19] T11VCC1_05[20] T18VCC1_05[21] U11VCC1_05[22] U18VCC1_05[23] V11VCC1_05[24] V12VCC1_05[25] V14VCC1_05[26] V16VCC1_05[27] V17VCC1_05[28] V18
VCCDMIPLL R29
VCC_DMI[1] AE28VCC_DMI[2] AE29
V_CPU_IO[1] AC23V_CPU_IO[2] AC24
VCC3_3[01] AF29
VCC3_3[02] AD2
VCC3_3[03] AC8VCC3_3[04] AD8VCC3_3[05] AE8VCC3_3[06] AF8
VCC3_3[07] AA3VCC3_3[08] U7VCC3_3[09] V7VCC3_3[10] W1VCC3_3[11] W6VCC3_3[12] W7VCC3_3[13] Y7
VCC3_3[14] A8VCC3_3[15] B15VCC3_3[16] B18VCC3_3[17] B4VCC3_3[18] B9VCC3_3[19] C15VCC3_3[20] D13VCC3_3[21] D5VCC3_3[22] E10VCC3_3[23] E7VCC3_3[24] F11
VCCHDA AC12
VCCSUSHDA AD11
VCCSUS1_05[1] J6VCCSUS1_05[2] AF20
VCCSUS1_5[1] AC16
VCCSUS1_5[2] J7
VCCSUS3_3[01] C3
VCCSUS3_3[02] AC18VCCSUS3_3[03] AC21VCCSUS3_3[04] AC22VCCSUS3_3[05] AG20VCCSUS3_3[06] AH28
VCCSUS3_3[07] P6VCCSUS3_3[08] P7VCCSUS3_3[09] C1VCCSUS3_3[10] N7VCCSUS3_3[11] P1VCCSUS3_3[12] P2VCCSUS3_3[13] P3VCCSUS3_3[14] P4VCCSUS3_3[15] P5VCCSUS3_3[16] R1VCCSUS3_3[17] R3VCCSUS3_3[18] R5VCCSUS3_3[19] R6
VCCCL1_05 G22
VCCCL1_5 A22
VCCCL3_3[1] F20VCCCL3_3[2] G21
C202
0.1U_0402_16V4Z~D
1
2
R538 0_0603_5%~D
1 2
C6910.1U_0402_16V4Z~D
1
2
R534
100_0402_5%~D
12
R5351_0603_1%~D
12
C693
0.1U_0402_16V4Z~D
1
2
C700
0.1U_0402_16V4Z~D
1
2
R537
0_0603_5%~D
1 2
+
C67
6
220U
_D2_
4VY
_R15
M~D
1
2
C683
0.1U_0402_16V4Z~D
1
2
C671
0.1U_0402_16V4Z~D
1
2
T17PAD~D
C678
22U_0805_6.3V6M
~D
1
2
C699
0.1U_0402_16V4Z~D
1
2
U32E
ICH8M_BGA676~D
VSS[001]A23VSS[002]A5VSS[003]AA2VSS[004]AA7VSS[005]A25VSS[006]AB1VSS[007]AB24VSS[008]AC11VSS[009]AC14VSS[010]AC25VSS[011]AC26VSS[012]AC27VSS[013]AD17VSS[014]AD20VSS[015]AD28VSS[016]AD29VSS[017]AD3VSS[018]AD4VSS[019]AD6VSS[020]AE1VSS[021]AE12VSS[022]AE2VSS[023]AE22VSS[024]AD1VSS[025]AE25VSS[026]AE5VSS[027]AE6VSS[028]AE9VSS[029]AF14VSS[030]AF16VSS[031]AF18VSS[032]AF3VSS[033]AF4VSS[034]AG5VSS[035]AG6VSS[036]AH10VSS[037]AH13VSS[038]AH16VSS[039]AH19VSS[040]AH2VSS[041]AF28VSS[042]AH22VSS[043]AH24VSS[044]AH26VSS[045]AH3VSS[046]AH4VSS[047]AH8VSS[048]AJ5VSS[049]B11VSS[050]B14VSS[051]B17VSS[052]B2VSS[053]B20VSS[054]B22VSS[055]B8VSS[056]C24VSS[057]C26VSS[058]C27VSS[059]C6VSS[060]D12VSS[061]D15VSS[062]D18VSS[063]D2VSS[064]D4VSS[065]E21VSS[066]E24VSS[067]E4VSS[068]E9VSS[069]F15VSS[070]E23VSS[071]F28VSS[072]F29VSS[073]F7VSS[074]G1VSS[075]E2VSS[076]G10VSS[077]G13VSS[078]G19VSS[079]G23VSS[080]G25VSS[081]G26VSS[082]G27VSS[083]H25VSS[084]H28VSS[085]H29VSS[086]H3VSS[087]H6VSS[088]J1VSS[089]J25VSS[090]J26VSS[091]J27VSS[092]J4VSS[093]J5VSS[094]K23VSS[095]K28VSS[096]K29VSS[097]K3VSS[098]K6
VSS[099] K7VSS[100] L1VSS[101] L13VSS[102] L15VSS[103] L26VSS[104] L27VSS[105] L4VSS[106] L5VSS[107] M12VSS[108] M13VSS[109] M14VSS[110] M15VSS[111] M16VSS[112] M17VSS[113] M23VSS[114] M28VSS[115] M29VSS[116] M3VSS[117] N1VSS[118] N11VSS[119] N12VSS[120] N13VSS[121] N14VSS[122] N15VSS[123] N16VSS[124] N17VSS[125] N18VSS[126] N26VSS[127] N27VSS[128] N4VSS[129] N5VSS[130] N6VSS[131] P12VSS[132] P13VSS[133] P14VSS[134] P15VSS[135] P16VSS[136] P17VSS[137] P23VSS[138] P28VSS[139] P29VSS[140] R11VSS[141] R12VSS[142] R13VSS[143] R14VSS[144] R15VSS[145] R16VSS[146] R17VSS[147] R18VSS[148] R28VSS[149] R4VSS[150] T12VSS[151] T13VSS[152] T14VSS[153] T15VSS[154] T16VSS[155] T17VSS[156] T2VSS[157] U12VSS[158] U13VSS[159] U14VSS[160] U15VSS[161] U16VSS[162] U17VSS[163] U23VSS[164] U26VSS[165] U27VSS[166] U3VSS[167] U5VSS[168] V13VSS[169] V15VSS[170] V28VSS[171] V29VSS[172] W2VSS[173] W26VSS[174] W27VSS[175] Y28VSS[176] Y29VSS[177] Y4VSS[178] AB4VSS[179] AB23VSS[180] AB5VSS[181] AB6VSS[182] AD5VSS[183] U4VSS[184] W24
VSS_NCTF[01] A1VSS_NCTF[02] A2VSS_NCTF[03] A28VSS_NCTF[04] A29VSS_NCTF[05] AH1VSS_NCTF[06] AH29VSS_NCTF[07] AJ1VSS_NCTF[08] AJ2VSS_NCTF[09] AJ28VSS_NCTF[10] AJ29VSS_NCTF[11] B1VSS_NCTF[12] B29
C677
22U_0805_6.3V6M
~D
1
2
C672
0.1U_0402_16V4Z~D
1
2
C673
0.1U_0402_16V4Z~D
1
2
C7030.1U_0402_16V4Z~D
1
2
C68
80.
1U_0
402_
16V4
Z~D
1
2
C68
70.
1U_0
402_
16V4
Z~D
1
2
C682
22U_0805_6.3V6M
~D
1
2
T20
T23
R536
10_0402_5%~D
12
C695
0.1U_0402_16V4Z~D
1
2
T19
C702
0.022U_0402_16V7K~D
1
2
C200
1U_0603_10V4Z~D
1
2
C675
0.1U_0402_16V4Z~D
1
2
C698
0.1U_0402_16V4Z~D
1
2
R182
10_0805_5%~D
1 2
C694
0.1U_0402_16V4Z~D
1
2
C70
50.
1U_0
402_
16V4
Z~D
1
2
C692
0.1U_0402_16V4Z~D
1
2
C684
4.7U_0603_6.3V6M
~D
1
2
C679
2.2U_0603_6.3V6K~D
1
2
C685
0.1U_0402_16V4Z~D
1
2
C7094.7U_0603_6.3V6M~D
1
2
C68
00.
01U
_040
2_16
V7K~
D
1
2
T18PAD~D
L43
BLM21PG600SN1D_0805~D1 2
L44BLM18PG181SN1_0603~D
1 2
C701
0.022U_0402_16V7K~D
1
2
C6971U_0603_10V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_RST_MOD
IDE_DD12
IDE_DD8
IDE_IRQ
IDE_DD11
IDE_DD13
IDE_DD14
IDE_DDREQ
IDE_DCS1#
IDE_DD10
IDE_DD3
IDE_DD0
IDE_DIOR#
IDE_DA1
IDE_DA2
IDE_DD7
IDE_DD6
IDE_DD4
IDE_DA0
IDE_DD9
IDE_DD2
IDE_DIOW#
IDE_DD15
IDE_DCS3#
MOD_RST
IDE_DD5
CSEL2
IDE_DD1
MODPRES#
PSATA_IRX_DTX_P0
USB_IDE#
PSATA_IRX_DTX_N0
SC_USBP+
SC_USBP-
PSATA_ITX_DRX_P0PSATA_ITX_DRX_N0
IDE_DD[0..15]
IDE_DIORDY
IDE_DDACK#_R
MOD_EN
HDD_EN_5V
+3.3V_RUN
+3.3V_ALW
+5V_MOD
+5V_HDD +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_HDD
+5V_ALW+15V_ALW
+5V_HDD
+15V_ALW+5V_ALW
+5V_RUN
+3.3V_ALW2
+3.3V_ALW2
+5V_MOD
IDE_DCS1# 22IDE_DCS3#22
IDE_DD[0..15]22
IDE_DDREQ 22
IDE_IRQ 22
USB_IDE#23
IDE_RST_MOD23
MODPRES#38
SC_USBP+ 31
SC_USBP- 31
PSATA_ITX_DRX_P022PSATA_ITX_DRX_N022
PSATA_IRX_DTX_N0_C22
PSATA_IRX_DTX_P0_C22
IDE_DA022
IDE_DA122
IDE_DA222
IDE_DDACK# 22
IDE_DIOR#22
IDE_DIOW#22
IDE_DIORDY 22
HDDC_EN38
MODC_EN38
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
DVD MODULE
25 66Thursday, March 01, 2007
Compal Electronics, Inc.
1
3
6
2
DASP#
PDIAG#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Pleace near HD CONNMain SATA +5V Default
close SATA connector
Pleace near HD CONN
WF1F068N
1A
TOP VIEW
5
4
Open
+5V_HDD Source
HDD PWR
2
+5VMOD Source
C4623900P_0402_50V7K~D
12
JSATA
TYCO_1775191-1_RV~D
GND1 23GND2 24
GND1RX+2RX-3GND4TX-5TX+6GND7
3.3V83.3V93.3V10GND11GND12GND135V145V155V16GND17Reserved18GND1912V2012V2112V22
R21710K_0402_5%~D
1 2
R691100K_0402_5%~D
12
C46
510
U_0
805_
10V4
Z~D
@
1
2
C46
40.
1U_0
402_
10V7
K~D
@
1
2
R619100K_0402_5%~D
12
C81
310
U_0
805_
10V4
Z~D
1
2
C26
20.
1U_0
402_
16V4
Z~D
1
2
R62
910
0K_0
402_
5%~D
12
G
D
S
Q572N7002W-7-F_SOT323-3~D
2
13
C46
90.
1U_0
402_
16V4
Z~D
1
2
G
D
S
Q692N7002W-7-F_SOT323-3~D
2
13
S
GD Q48
SI3456BDV-T1-E3_TSOP6~D
3
624
51
G
D
S
Q502N7002W-7-F_SOT323-3~D
2
13
C81
810
U_0
805_
10V4
Z~D
1
2
C4613900P_0402_50V7K~D 12
S
GD Q56
SI3456BDV-T1-E3_TSOP6~D
3
624
51
R230100K_0402_5%~D
1 2
R627100K_0402_5%~D
12
R205470_0402_5%~D
1 2
R62
210
0K_0
402_
5%~D
12
R2064.7K_0402_5%~D
12
R618100K_0402_5%~D
12
R20956_0402_5%~D
1 2
R692100K_0402_5%~D
12
R392 0_0402_5%~D 1 2
G
D
S
Q682N7002W-7-F_SOT323-3~D
2
13
C81
20.
1U_0
603_
50V4
Z~D
1
2
C21
10.
01U
_040
2_16
V7K~
D
1
2
C46
60.
1U_0
402_
16V4
Z~D
@
1
2
PJP2003
PAD-OPEN 4x4m@
1 2
C60
10U
_080
5_10
V4Z~
D
1
2
R626
100K_0402_5%~D
12
C26
80.
1U_0
402_
16V4
Z~D
1
2
C81
70.
1U_0
603_
50V4
Z~D
1
2
C14
510
00P_
0402
_50V
7K~D
1
2
JMOD
TYCO_1770530-1~D
8.3
1 122
3 344
5 566
7 788
9 91010
11 111212
13 131414
15 151616
17 171818
19 192020
21 212222
23 232424
25 252626
27 272828
29 293030
31 313232
33 333434
35 353636
37 373838
39 394040
41 414242
43 434444
45 454646
47 474848
49 495050
51 515252
53 535454
55 555656
57 575858
59 596060
61 616262
63 636464
65 656666
67 676868
G71
G72
G69
G70
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_PC_BEEPBEEP1 BEEP2
AUD_SENSE_B
AUD_HP_NB_SENSE
ICH_AZ_CODEC_SDOUT
AUD_LINE_OUT_L
ICH_AZ_CODEC_SDOUT
AUD_SENSE_A
ICH_AZ_CODEC_BITCLK
ICH_AC_SDIN0_R
AUD_PC_BEEP
DOCK_HP_MUTE#
ICH_AZ_CODEC_BITCLK
AUD_LINE_OUT_R
AUD_EAPD
AUD_SENSE_BAUD_SENSE_A
AUD_SPDIF_OUT
DOCK_HP_MUTE#
AUD_SPDIF_SHDN
+VDDA
+VDDA
+VDDA
VREFOUT
+VDDA
+3.3V_RUN+3.3V_RUN
AUD_HP_OUT_L 27
AUD_LINE_OUT_L 27
BEEP39
SPKR23
AUD_EXT_MIC_L 27
AUD_EXT_MIC_R 27
AUD_HP_OUT_R 27
ICH_AZ_CODEC_RST#22
ICH_AZ_CODEC_SYNC22
ICH_AZ_CODEC_SDOUT22
ICH_AZ_CODEC_BITCLK22
ICH_AZ_CODEC_SDIN022
AUD_SPDIF_OUT36
DOCK_HP_MUTE# 38
AUD_EAPD27
AUD_MIC_SWITCH 27AUD_HP_NB_SENSE27,38
AUD_INT_MIC_IN 27
AUD_SPDIF_SHDN 38
AUD_LINE_OUT_R 27
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Azalia (HD) Codec
26 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to Pin 6
TRACE>15 mil
45
2
single gate TTL
31
Close to Pin 5
U34 place as close to CODEC as possible
W=30 mil
C71
40.
1U_0
402_
16V4
Z~D
1
2
C72
410
U_0
805_
10V4
Z~D
1
2
R54110K_0402_5%~D
12
R71
039
.2K_
0402
_1%
~D
12
R546 10K_0402_5%~D 12
C72
510
U_0
805_
10V4
Z~D
1
2
C71
810
U_0
805_
10V4
Z~D
@
1
2
C7110.1U_0402_10V6K~D
1 2
C7100.1U_0402_16V4Z~D
1
2U34
74AHCT1G86GW_SOT353-5~D
B1
A2 Y 4
P5
G3
R821100K_0402_5%~D
1 2
R82310K_0402_5%~D
12
R711
20K_0402_1%~D
12
R547 10K_0402_5%~D 12
C75
910
00P_
0402
_50V
7K~D
1
2
C72110P_0402_50V8J~D
1
2
R54510_0402_5%~D
12
C71
310
00P_
0402
_50V
7K~D
1
2
C72
61U
_060
3_10
V4Z~
D
1
2
C71
51U
_060
3_10
V4Z~
D
1
2
G
D
SQ742N7002W-7-F_SOT323~D
2
13
R47947_0402_5%~D @
12
R5425.11K_0402_1%~D
12
R544 33_0402_5%~D
1 2
C71
60.
1U_0
402_
16V4
Z~D
1
2
C71
70.
1U_0
402_
16V4
Z~D
1
2
STAC9205
QFN 7x7 & LQFP 9x9 colay footprint.
U35
STAC9205X5NBEB1XR_QFN48_COMON~D
HDA_SDO5
HDA_BIT_CLK6
HDA_SYNC10
HDA_RST#11
SPDIF _OUT48
CAP2 33
AVDD1 25
AVSS242 AVSS126
SPDIF_ IN//GPIO0/EAPD47
SENSE_A 13
HDA_SDI_CODEC8
PORT_A_L 39
PORT_A_R 41
CD_L 18
CD_R 20
DMIC_CLK46
VREFFILT 27
DVDD_CORE1
DVSS7
NC143
NC244
VOL_UP/DMIC0/GPIO12
VOL_DN/DMIC1/GPIO24
PC_BEEP 12
MONO_OUT 32
AVDD2 38
SENSE_B 34
VREFOUT_A 37
PORT_B_L 21
PORT_B_R 22
VREFOUT_B 28
PORT_C_L 23
PORT_C_R 24
VREFOUT_C 29
PORT_D_L 35
PORT_D_R 36
PORT_E_L 14
PORT_E_R 15
VREFOUT_E/GPIO4 31
PORT_F_L 16
PORT_F_R 17
VREFOUT_F/GPIO3 30
CD_GND 19
DVDD_CORE9DVDD_CORE/VPP40DVDD_IO3
NC345
Thermal PAD GND49
C7820.1U_0402_16V4Z~D @
1
2
C17
210
U_0
805_
10V4
Z~D
@
1
2
R54020K_0402_5%~D
1 2
G
D
S Q752N7002W-7-F_SOT323~D
2
13
R54310K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HP_SPK_R2HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
AUD_MIC_BIAS
AUD_MIC_BIAS
+5V_SPK+AMP
AUD_SPK_ENABLE#
AUD_GAIN1
AUD_GAIN2
C1N
HP_INR_C
HP_SPK_R1
C1P
HP_SPK_L1AUD_GAIN1
INT_SPK_R2INT_SPK_R1
AUD_GAIN2
INT_SPK_R2
SPKR_INR_C
HP_INL_C
AUD_SPK_ENABLE#
AUD_AMP_MUTE#
VREFOUT_R
SET
AUDIO_AVDD_ON AUD_AMP_MUTE#
SPKR_INL_C INT_SPK_R1
AUD_HP_NB_SENSE
NB_MUTE#
AUD_EAPD
MIC_R1
MIC_L1 MIC_L2
MIC_R2
+5V_SPK+AMP
+5V_RUN+5V_SPK+AMP
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+VDDA
+5V_SPK+AMP
+VDDA
+5V_SPK+AMP
+3.3V_RUN
+5V_SPK+AMP
+5V_SPK+AMP
AUD_LINE_OUT_R26
AUD_HP_NB_SENSE26,38
AUD_MIC_SWITCH26
AUD_INT_MIC_IN 26
AUD_EAPD26
AUD_HP_OUT_L26
AUD_HP_OUT_R26
NB_MUTE#38
AUDIO_AVDD_ON 18
AUD_LINE_OUT_L26
AUD_INT_MIC+32
AUD_INT_MIC-32
AUD_EXT_MIC_R26
AUD_EXT_MIC_L26
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
AMP and PHONE JACK
27 66Wednesday, March 07, 2007
Compal Electronics, Inc.
Gain Setting
GAIN1 INPUTAV(inv)GAIN2
21.6dB
15.6dB
6dB
1
0
10dB
26K ohm
45K ohm
66K ohm
82K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
W=40mils
MINIMAM 150 mA
Place Close to Audio Chip Place Close to Audio Chip
For TPA6040A,popR714,depop R713
ForTPA6040A,popC304,depopR584
For TPA6040A,pop C301,depop R585
C758
1U_0603_10V4Z~D
12
U36ALM358DR2G_SOIC8~D
P8
IN+ 3
IN- 2G4
O1
R5661K_0402_5%~D
12
R56
120
K_04
02_1
%~D
@
12
C74
21U
_060
3_10
V4Z~
D
1
2
R56310K_0402_5%~D
1 2
R713100K_0402_5%~D
12
R79010_0402_5%~D
@
12
G
D
S Q422N7002W-7-F_SOT323-3~D
2
13
R796 0_0402_5%~D
12
R585 0_0402_5%~D 1 2
R7140_0402_5%~D
@1 2
C74
110
0P_0
402_
50V8
J~D
@
1
2 C74
510
U_0
805_
10V4
Z~D
1
2
R5531K_0402_5%~D
12
C73
810
0P_0
402_
50V8
J~D
1
2
C7310.1U_0402_10V6K~D
1 2
C78
30.
1U_0
402_
16V4
Z~D
1
2
C752 1U_0603_10V4Z~D
12
C7541U_0603_10V4Z~D
1
2
R55
24.
7K_0
402_
5%~D
12
R573100K_0402_5%~D
12
C75
61U
_060
3_10
V4Z~
D
1
2
R5575.1_0402_1%~D
12
C75
5
1U_0
603_
10V4
Z~D
1
2
C30
40.
033U
_120
6_50
V7K~
D
@
1
2
L47BLM18BD601SN1D_0603~D
12
R5555.1_0402_1%~D
12
C23210P_0402_50V8J~D
@
1
2
MAX9789A
U37
MAX9789A_TQFN32~D
PGN
D2
21PG
ND
15
CPV
SS13
PVSS
14
SPKR_INR2
SET 1
REGEN 4
OUTL- 7
OUTL+ 6
OUTR- 19
OUTR+ 20
SPKR_INL3
HP_INR26
HP_INL27
GAIN2 32
GAIN1 31
PVD
D1
8
C1N12
HPL 16
HPR 15
VOUT 29C1P10
CPGND11
HPVDD17
CPVDD9
MUTE#25
HP_EN22
SPKR_EN#23
BIAS24
PVD
D2
18
GN
D28
VDD
30EP
33
R5681K_0402_5%~D
12
L50BLM18BD121SN1D_0603~D
12
C73
410
0P_0
402_
50V8
J~D
1
2
R567100K_0402_5%~D
12
C74
710
U_0
805_
10V4
Z~D
1
2
C751 1U_1206_25V7K~D
1 2
R56
410
0K_0
402_
5%~D
12
C75
310
U_0
805_
10V4
Z~D
1
2
C748 0.033U_1206_50V7K~D
12
L49BLM18BD121SN1D_0603~D
12
C96
47P
_040
2_50
V8J~
D
@
1
2
C749 1U_1206_25V7K~D
1 2
R58
4
0_04
02_5
%~D
1
2
C75
71U
_060
3_10
V4Z~
D
1
2
R565100K_0402_5%~D
1 2
U40
74AHCT1G08GW_SOT353-5~D
A2
B1 G3
Y 4
P5
R5581K_0402_5%~D
12
R5540_0402_5%~D
1 2
L48BLM18BD601SN1D_0603~D
12
R56
220
K_04
02_1
%~D
@
12
R572100K_0402_5%~D@
12
C7281U_0603_10V6K~D
1 2
C7301U_0603_10V6K~D
1 2
R82
21M
_040
2_1%
~D
12
C7330.1U_0805_25V7K~D
1 2
C7292.2U_0805_10V6K~D
12
R55
14.
7K_0
402_
5%~D
12
C90
647
P_0
402_
50V8
J~D
@
1
2
R56010K_0402_5%~D
1 2
C90
547
P_0
402_
50V8
J~D
@
1
2
L51BLM21PG600SN1D_0805~D
1 2
C73
910
0P_0
402_
50V8
J~D
1
2
R55
910
0K_0
402_
5%~D
12
R797 0_0402_5%~D
12
C7372.2U_0805_10V6K~D
12
C7360.1U_0402_10V6K~D
1 2
R570100K_0402_5%~D@
12
C7322.2U_0805_10V6K~D
1
2
C77 0.033U_1206_50V7K~D
12
C3010.033U_1206_50V7K~D@1 2
R571100K_0402_5%~D
12
U36BLM358DR2G_SOIC8~D
P8
IN+5
IN-6 G4
O 7
G
D
SQ43
2N7002W-7-F_SOT323-3~D
2
13
C74
010
0P_0
402_
50V8
J~D
@
1
2
C90
747
P_0
402_
50V8
J~D
@
1
2
R569100K_0402_5%~D
12
JMIC
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
C74
61U
_060
3_10
V4Z~
D
1
2
C727
10U_0805_10V4Z~D
1 2
JSPK
MOLEX_53398-0271~D
1122
R5800_0402_5%~D
1 2
C74
31U
_060
3_10
V4Z~
D
1
2
JAUDIO
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
C73
510
0P_0
402_
50V8
J~D
1
2
R712100K_0402_5%~D
12
C74
41U
_060
3_10
V4Z~
D
1
2
R556100K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOM_CS#
LOM_SCLK
CLK_PCI_TPM
PLTRST3#
XTALO
LOM_SI
REGCTL_PNP25
NV_STRAP0
TPM_GPIO1
CLK_PCIE_LOM#
CLK_PCI_TPM
LOM_SPD100LED_ORG#
GLAN_RXP_C
LOM_SMB_ALERT#
LPC_LAD3
TPM_GPIO2
LAN_TX1-
PCIE_WAKE#
CLK_PCIE_LOM
LPC_LFRAME#
LAN_TX2-
LOM_SO
LAN_TX1+
IRQ_SERIRQ
LPC_LAD2LPC_LAD1
LAN_TX3+
REGCTL_PNP12
GLAN_RXN_C
LOM_SPD10LED_GRN#
LOM_SO
PLTRST3#LAN_TX0-LAN_TX0+
LAN_TX2+
TPM_GPIO0
XTALI
LOM_ACTLED_YEL#
REGCTL_PNP12
LOM_SI
REGCTL_PNP25
LPC_LAD0
LOM_CS#
LOM_SCLK
LAN_TX3-
PHYTVCOI
GPIO1_SERIAL_DILOM_LOW_PWR GPIO2_SERIAL_DO
LOM_LOW_PWR
GPIO1_SERIAL_DI
LOM_RST_R#
+3.3V_LAN
+3.3V_ALW
+PCIE_PLLVDD
+AVDD
+3.3V_LAN
+GPHY_PLLVDD
+AVDDL
+GPHY_PLLVDD
+PCIE_PLLVDD
+PCIE_SDS_VDD
+1.2V_LAN
+BIASVDD
+XTALVDD
+2.5V_LAN
+AVDD
+2.5V_LAN
+1.2V_LAN
+AVDDL
+3.3V_LAN
+3.3V_RUN
+PCIE_SDS_VDD
+BIASVDD
+3.3V_LAN
+1.2V_LAN
+XTALVDD
+2.5V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+2.5V_LAN
+1.2V_LAN+3.3V_LAN
+3.3V_LAN
+2.5V_LAN
+3.3V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_LAN
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29LAN_TX1+ 29
ENAB_3VLAN41
PCIE_RX6+/GLAN_RX+ 23
PCIE_RX6-/GLAN_RX- 23
LAN_TX2+ 29
LOM_ACTLED_YEL#29
LOM_SPD10LED_GRN#29LOM_SPD100LED_ORG#29
CLK_PCI_TPM6
ICH_SMBCLK23,34ICH_SMBDATA23,34
LPC_LFRAME#22,38,39
IRQ_SERIRQ23,30,38,39PLTRST3#21,34
LPC_LAD[0..3]22,38,39
LOM_CABLE_DETECT38
LOM_TPM_EN#38
LOM_SUPER_IDDQ 38
CLK_PCIE_LOM 6
LAN_TX0+ 29
LOM_LOW_PWR 38
CLK_PCIE_LOM# 6
PCIE_TX6-/GLAN_TX- 23
LAN_TX0- 29
PCIE_WAKE# 34,38
PCIE_TX6+/GLAN_TX+ 23
LOM_CLKREQ# 6
PLTRST3# 21,34
LOM_SMB_ALERT#23,39
SB_LOM_PCIE_RST# 21
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
BCM5755M
28 66Thursday, March 01, 2007
Compal Electronics, Inc.
1C4
MMJT9435
B
C2
3E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SCLK
Place closely pin J8
R7, R9 are 1/2 W rating
Logic High Voltage mustbe 0.7V to 2.75V
00
Need to ensurecrystal at least300uW max powerdrive-level
Place R666 asclose to the ASICas possible. Padis needed tomeasure 125MHzclock fordebugging
LOM_CABLE_DETECT goes to an input on a system microcontroller that canpoll this signal periodically and can de-assert the LOM_LOW_PWR whenLOM_CABLE_DETECT signal is high. Connect to an EC GPIOC defined by theGPIO mapping.
0 0Auto-Sense Mode 0 0
NV_STRAP1 NV_STRAP0 SO CS#SI
R646, R648, R649 Reserved forBCM5752 as back-up solution
Reserved for BCM5752as back-up solution
Atmel AT45BCM021B
ST M45PE20
0
01
10
10
0
1
11
0
(Default)
R663 Reserved forBCM5752 as back-upsolution
Monitor GPHY PLL Clk
DELL CONFIDENTIAL/PROPRIETARY
R67
04.
7K_0
402_
5%~D
@
12
R652 1K_0402_5%~D
12
C83
90.
1U_0
402_
16V4
Z~D
1
2
R4880_0402_5%~D@
1 2
C83
40.
1U_0
402_
16V4
Z~D
1
2
C8510.1U_0402_10V7K~D
1 2
L88
BK1608LM182-T_0603~D
12
Q71PBSS5540Z_SOT223-3~D
1
23
4
C826
0.1U_0402_16V4Z~D
1
2
R65433_0402_5%~D
@
12
L63
BK2125LM182-T_0805~D
12
C82
90.
1U_0
402_
16V4
Z~D
1
2
C848
0.1U_0402_16V4Z~D
1
2
R648 10K_0402_5%~D@ 12
C83
50.
1U_0
402_
16V4
Z~D
1
2
C845
0.1U_0402_16V4Z~D
1
2
R27639K_0402_5%~D
12
R4221K_0402_5%~D
1 2
C77
10.
047U
_040
2_16
V4Z~
D
@
1
2
R666 0_0402_5%~D@1 2
R6634.7K_0402_5%~D
@1 2
C8554.7U_0603_6.3V4Z~D
1
2
LPC/TPM
Media
GPIO
BCM5755M
Power
PCI-E
TEST
LED
Bias
Clock
Control
Regulator
Control
SPI
SMBUS
U38A
BCM5755M_FBGA144~D
TRD3+ B11TRD3- B12TRD2+ C11TRD2- C12TRD1+ D11TRD1- D12TRD0+ E11TRD0- E12
LCLKJ8
LAD0J7LAD1L10LAD2J5LAD3K9
LFRAMEJ9LRESETM10SERIRQH7
GPIO0H9GPIO1_SERIAL_DIH11GPIO2_SERIAL_DOC5
SMB_CLKC8SMB_DATAC7
NC J1NC M4
SIE10 SCLKC9
SOD9CSC10
PERST B1
REGCTL12 J11
REGCTL25 M11
REGSEN25 M12
LINKLEDA9SPD100LEDB9SPD1000LEDA10TRAFFICLEDB8
PCIE_TXDN M3
PCIE_TXDP L3
PCIE_RXDN L7
PCIE_RXDP M7
WAKE A4REFCLK- L5REFCLK+ M5
VAUXPRSNT B6
TCK B5TDI F3
TDO B4TMS E3
TRST D4
RDAC A8
XTALIL9
XTALOM9
REFCLK_SEL B3
LOW_PWR H4
REGSUP12 K12
REGSEN12 J12EnergyDetC4
GPHY_TVCOI C6
TPM_GPIO0G4
TPM_GPIO2/TPM_STATUSH3 TPM_GPIO1J3
TPM_ENJ6 VMAINPRSNT G11
NV_STRAP1M1 NV_STRAP0M2
REGSUP25 L12
Super_Low_PWR K5
CLKREQ# F2
R646 10K_0402_5%~D@ 12
C827
4.7U_0603_6.3V
4Z~D
1
2
R64
42_
1210
_5%
~D
12 C
629
4.7U
_060
3_6.
3V4Z
~D
@
1
2
C86
1
22P
_040
2_50
V8J~
D
1
2
C8634.7U_0603_6.3V4Z~D
@
1
2
C842
0.1U_0402_16V4Z~D
1
2
C824
0.1U_0402_16V4Z~D
1
2
C8530.1U_0402_10V7K~D
1 2
R66
9
1.13
K_0
402_
1%~D
12
U44
M45PE20-VMN6TP_SO8~D
D 1C 2
RESET# 3S# 4
Q8VSS7VCC6W#5
R656 0_0402_5%~D
1 2
R6554.7K_0402_5%~D@
1 2
C7720.047U_0402_16V4Z~D
@
1
2
R659
200_0402_1%~D
12
C83
80.
1U_0
402_
16V4
Z~D
1
2
C865
0.1U_0402_16V4Z~D
1
2
R5810_0402_5%~D
12
C8600.1U_0402_16V4Z~D
1
2
C82
80.
1U_0
402_
16V4
Z~D
1
2
Y525MHZ_18PF_1BX25000CK1D~D
1 2
C8574.7U_0603_6.3V4Z~D
1
2
C83
70.
1U_0
402_
16V4
Z~D
1
2
R66
44.
7K_0
402_
5%~D
@
12
C843
10U_0805_10V4Z~D
1
2
U45
AT45BCM021B-SU_SO8~D
@
SI 1SCK 2
RESET# 3CS# 4
SO8GND7VCC6WP#5
R4154.7K_0402_5%~D
12
L64
BK1608LM182-T_0603~D
12
C8490.1U_0402_16V4Z~D
1
2
S
GD
Q44SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R651 0_0402_5%~D 12
C8640.1U_0402_16V4Z~D
@
1
2
C847
0.1U_0402_16V4Z~D
1
2
C31
60.
1U_0
402_
16V4
Z~D
1
2
L66
BK1608LM182-T_0603~D
12
C30
94.
7U_0
603_
6.3V
4Z~D
1
2
R64720K_0402_5%~D
12
R649 10K_0402_5%~D@ 12
C8500.1U_0402_16V4Z~D
1
2
R6614.7K_0402_5%~D
@1 2
R5820_0402_5%~D @12
Q70MBT35200MT1G_TSOP6~D
3
41 2 5 6
C83
00.
1U_0
402_
16V4
Z~D
1
2
C8560.1U_0402_16V4Z~D
1
2
C846
10U_0805_10V4Z~D
1
2
C83
20.
1U_0
402_
16V4
Z~D
1
2
C85422P_0402_50V8J~D
@
1
2
L67
BK1608LM182-T_0603~D
12
C825
4.7U_0603_6.3V
4Z~D
1
2
R6584.7K_0402_5%~D@
1 2
R4214.7K_0402_5%~D
12
C83
30.
1U_0
402_
16V4
Z~D
1
2
C8520.1U_0402_16V4Z~D
1
2
R650 1K_0402_5%~D
12
R657 4.7K_0402_5%~D@1 2
C83
10.
1U_0
402_
16V4
Z~D
1
2
C8580.1U_0402_16V4Z~D
1
2
R64
3
2_12
10_5
%~D
12
C86
2
22P
_040
2_50
V8J~
D
1
2
L68
BK1608LM182-T_0603~D
12
R653 4.7K_0402_5%~D@12
R66
54.
7K_0
402_
5%~D
@
12
C8594.7U_0603_6.3V4Z~D
1
2
C83
64.
7U_0
603_
6.3V
4Z~D
1
2
C84
00.
1U_0
402_
16V4
Z~D
1
2
L65
BK2125LM182-T_0805~D
12 BCM5755M
Analogpower
PLL
GND
Digial power
BIAS
U38B
BCM5755M_FBGA144~D
VDDC_0D5
VDDC_4H5VDDC_5H6VDDC_6H8VDDC_7J4
VDDIO_3F1VDDIO_4G10VDDIO_5J2VDDIO_6L1
VSS_4 E6VSS_5 E7VSS_6 E8VSS_7 E9VSS_8 F4VSS_9 F5
VSS_10 F6VSS_11 F7VSS_12 F8VSS_13 F9VSS_14 G5VSS_15 G6VSS_16 G7VSS_17 G8VSS_18 L2VSS_19 L6VSS_20 M6
DC_7 D2DC_8 D3DC_9 E1
DC_10 G2DC_11 H2
VDDC_3D8 VDDC_2D7 VDDC_1D6
VSS_3 E5VSS_2 E4VSS_1 B10VSS_0 B2
DC_18 L8
VDDP_0A5VDDP_1G3VDDP_2L11
XTALVDDH12
PCIE_SDSVDDK4
AVDDL_0F10AVDDL_1F11
AVDD_0A11AVDD_1F12
PCIE_PLLVDDK6
GPHY_PLLVDDG12
BIASVDDA12
DC_12 K1
DC_0 A1DC_1 A6DC_2 A7DC_3 B7DC_4 C1DC_5 C3DC_6 D1
DC_13 K2DC_14 K3DC_15 K7DC_16 K8DC_17 L4
NC_0 A2NC_1 E2NC_2 G1NC_3 G9NC_4 H1NC_5 H10NC_6 J10NC_7 K10NC_8 K11
VDDIO_0A3VDDIO_1C2VDDIO_2D10
DC_19 M8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
LAN_TX0- LAN_TX0-R
LAN_TX3+ LAN_TX3+R
SW_LAN_TX3+SW_LAN_TX3-
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0+SW_LAN_TX0-
DOCK_LAN_TX0-
DOCK_LAN_TX1-DOCK_LAN_TX1+
LINK_LED100#
DOCK_LAN_TX0+
DOCK_LAN_TX2+
DOCK_LAN_TX3+DOCK_LAN_TX3-
DOCK_LAN_TX2-
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LINK_LED10#
LINK_LED100#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
LOM_SPD10LED_GRN#
LINK_LED10#LAN_LEDACT#
DOCK_LOM_SPD100LED_ORG#DOCK_LOM_SPD10LED_GRN#DOCK_LOM_ACTLED_YEL#
LAN_TX2-LAN_TX1+LAN_TX1-
LAN_TX3+
LAN_TX0-
LAN_TX3-LAN_TX2+
LAN_TX0+
LAN_TX2-
LAN_TX3-
LAN_TX1-
LAN_TX1+RLAN_TX1+
LAN_TX1-R
LAN_TX2+
LAN_TX0+R
LAN_TX2+R
LAN_TX2-R
LAN_TX3-R
LAN_TX0+
+3.3V_LAN
+3.3V_LAN
DOCKED36,38
LAN_TX0-28
LAN_TX0+28
LAN_TX1-28
LAN_TX1+28
LAN_TX2-28
LAN_TX2+28
LAN_TX3-28
LAN_TX3+28
LOM_ACTLED_YEL#28LOM_SPD10LED_GRN#28LOM_SPD100LED_ORG#28
DOCK_LAN_TX0- 36
DOCK_LAN_TX1- 36DOCK_LAN_TX1+ 36
DOCK_LAN_TX0+ 36
DOCK_LAN_TX2+ 36
DOCK_LAN_TX3+ 36
DOCK_LAN_TX2- 36
DOCK_LAN_TX3- 36
SW_LAN_TX0+ 32SW_LAN_TX0- 32
SW_LAN_TX1+ 32SW_LAN_TX1- 32
SW_LAN_TX2+ 32SW_LAN_TX2- 32
SW_LAN_TX3+ 32SW_LAN_TX3- 32
LAN_ACTLED_YEL_R# 32
LED_10_GRN_R# 32
LED_100_ORG_R# 32
DOCK_LOM_ACTLED_YEL# 36DOCK_LOM_SPD10LED_GRN# 36DOCK_LOM_SPD100LED_ORG# 36
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
LAN TRANSFOMER
29 66Thursday, March 01, 2007
Compal Electronics, Inc.
TODOCKFROM NIC DOCKED
1: TO DOCK0: TO RJ45
LAN ANALOGSWITCH
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Notice : Placetermination as close asASIC as possible
The resistors need atleast 1/16W
DELL CONFIDENTIAL/PROPRIETARY
L73 36NH_0603CS-360EJTS_5%_0603~D
1 2
C867 0.1U_0402_16V4Z~D@ 1 2R674 49.9_0402_1%~D@1 2
R677 49.9_0402_1%~D@1 2
R682
150_0402_5%~D
1 2
L74 36NH_0603CS-360EJTS_5%_0603~D
1 2
R671 49.9_0402_1%~D@1 2
R675 49.9_0402_1%~D@1 2
L75 36NH_0603CS-360EJTS_5%_0603~D
1 2
L71 36NH_0603CS-360EJTS_5%_0603~D
1 2
R68
1
10K_
0402
_5%
~D @12
L76 36NH_0603CS-360EJTS_5%_0603~D
1 2
C869 0.1U_0402_16V4Z~D@ 1 2
U46
PI3L500-AZFEX_TQFN56~D
SEL17
A02
A13
A27
A38
A411
A512
A614
0B1 48
0B2 46
1B1 47
1B2 45
2B1 43
2B2 41
3B1 42
3B2 40
4B1 37
4B2 35
5B1 36
5B2 34
6B1 32
6B2 30
7B1 31
7B2 29
A715
LED019LED120LED254
0LED1 22
0LED2 25
1LED1 23
1LED2 26
2LED1 52
2LED2 51PAD_GND57
VDD
04
VDD
110
VDD
218
VDD
327
VDD
438
VDD
550
VDD
656
GN
D0
1G
ND
16
GN
D2
9G
ND
313
GN
D4
16G
ND
521
GN
D6
24G
ND
728
GN
D8
33G
ND
939
GN
D10
44G
ND
1149
GN
D12
53G
ND
1355
NC5
R683
110_0402_5%~D
1 2
R678 49.9_0402_1%~D@1 2
L72 36NH_0603CS-360EJTS_5%_0603~D
1 2
L70 36NH_0603CS-360EJTS_5%_0603~D
1 2
R673 49.9_0402_1%~D@ 1 2
C868 0.1U_0402_16V4Z~D@ 1 2
R684
200_0402_5%~D
1 2
L69 36NH_0603CS-360EJTS_5%_0603~D
1 2
R672 49.9_0402_1%~D@1 2C866 0.1U_0402_16V4Z~D@ 1 2
R67
9
10K_
0402
_5%
~D @12
R676 49.9_0402_1%~D@1 2
R68
0
10K_
0402
_5%
~D @12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CCLK
PCI_AD17
PCI_AD4
PCI_RST#
PCI_C_BE0#
PCI_IRDY#
PCI_AD8
CBS_RSVD/D2
CBS_CGNT#
CBS_CSTSCHNG
CBS_CSERR#
CBS_CPAR
CBS_CC/BE1#
CBS_CSTOP#
CBS_CC/BE0#
CBS_CPERR#
PCI_C_BE2#
PCI_AD9
PCI_AD18
PCI_AD24
PCI_AD31
PCI_DEVSEL#
PCI_C_BE1#
PCI_AD14
PCI_AD23
PCI_AD25
PCI_AD0
PCI_AD3
PCI_AD29
CLK_PCI_PCM
PCI_AD20
PCI_AD7
PCI_PIRQD#
PCI_C_BE3#
PCI_AD30
PCI_PAR
PCI_TRDY#
PCI_AD22
PCI_AD6
PCI_AD19
CBS_CCD1#CBS_CVS2
CBS_IDSEL
PCI_AD2
PCI_FRAME#
PCI_AD27
CBS_CDEVSEL#
PCI_AD5
CBS_CBLOCK#
CBS_CC/BE2#
CBS_CCD2#
PCI_AD11PCI_AD10
PCI_AD12
PCI_AD26
PCI_AD1
PCI_AD13
CBS_CREQ#
CBS_CC/BE3#
CBS_RSVD/A18
CBS_CFRAME#
CLKRUN#
CBS_CTRDY#
PCI_AD16
CBS_CINT#
CBS_CCLKRUN#CBS_CRST#
CBS_CVS1
PCI_AD17
PCI_AD28
CBS_CIRDY#
PCI_GNT1#
PCI_AD15
PCI_AD21
PCI_STOP#
PCI_PERR#
PCI_REQ1#
IRQ_SERIRQ
CBS_CAD7
CBS_CAD1
CBS_CAD25
CBS_CAD0
CBS_CAD2
CBS_CAD28
CBS_CAD21
CBS_CAD9
CBS_CAD30CBS_CAD31
CBS_CAD20
CBS_CAD12
CBS_CAD27
CBS_CAD4
CBS_CAD10
CBS_CAD18
CBS_CAD8
CBS_CAD11
CBS_CAD29
CBS_CAD24
CBS_CAD3
CBS_CAD15
CBS_CAD26
CBS_CAD23CBS_CAD22
CBS_CAD19
CBS_CAD17CBS_CAD16
CBS_CAD14CBS_CAD13
CBS_CAD6CBS_CAD5
CLK_PCI_PCM
CBS_CAD0
CBS_CINT#
CBS_CAD5CBS_CAD3CBS_CAD1
CBS_CCLK
CBS_CCLKRUN#
CBS_CAD11CBS_CAD9
CBS_CAD7
CBS_CAD14
CBS_CAD21
CBS_CAD20CBS_CAD18
CBS_CAD12
CBS_CAD22
CBS_CAD25
CBS_CAD24
CBS_CAD27
CBS_CAD23
CBS_CAD26
CBS_CC/BE2#
CBS_CC/BE1#
CBS_CC/BE0#
CBS_CAD29
CBS_CPAR
CBS_CIRDY#
CBS_RSVD/D2
CBS_CPERR#CBS_CGNT#
CBS_RSVD/D14
CBS_CAD2CBS_CCD1#
CBS_CAD4CBS_CAD6
CBS_CAD8
CBS_CVS1
CBS_CAD15
CBS_CAD13
CBS_CAD13
CBS_CAD10
CBS_CCD2#
CBS_CAD30CBS_CAD31
CBS_CSTSCHNGCBS_CAD28
CBS_CRST#
CBS_CC/BE3#
CBS_CSERR#CBS_CREQ#
CBS_CVS2
CBS_CAD17CBS_CAD19
CBS_CTRDY#CBS_CFRAME#
CBS_CSTOP#CBS_CDEVSEL#
CBS_CBLOCK#
CBS_CAD16CBS_RSVD/A18
USBP6-
CBS_RSVD/D14
PCI_SERR#PCI_RST#
CLK_PCI_PCM
TPA0-
TPA0_D+
TPA0_D-
TPB0_D-
TPBIAS0
TPA0+
TPB0+
TPB0-
CBS_CAD15USBP6+
TPB0_D+
+5V_RUN +3.3V_RUN
+CBS_VCC
+CBS_VCC +CBS_VCC
+OZ1.8V_RUN+3.3V_RUN
+3.3V_RUN
SYS_PME#35,38
PCI_PIRQD#21
IRQ_SERIRQ23,28,38,39
CLKRUN#23,38,39
PCI_AD[0..31]21,35
PCI_C_BE3#21,35
PCI_C_BE1#21,35PCI_C_BE0#21,35
PCI_C_BE2#21,35
PCI_PAR21,35
PCI_PERR#21,35
PCI_REQ1#21PCI_GNT1#21PCI_RST#21,31,35
CLK_PCI_PCM6PCI_DEVSEL#21,35PCI_FRAME#21,35,36PCI_IRDY#21,35,36PCI_TRDY#21,35PCI_STOP#21,35
USBP6- 23
PCI_SERR#21,35
USBP6+ 23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Cardbus and 1394 OZ711EZ1 Controller
30 66Thursday, March 01, 2007
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin 45
Layout Note: Place close to 1394 connector
Ground pin 129 exposed die pad, dimension5.72mm x 5.72mm, should connect to PCB solderpad of same dimension
DELL CONFIDENTIAL/PROPRIETARY
C80
24.
7U_0
603_
6.3V
4Z~D
1
2
R6060_0402_5%~D 1 2
R6110_0402_5%~D 1 2
C79
44.
7U_0
603_
6.3V
4Z~D
1
2
C80
90.
1U_0
402_
16V4
Z~D
1
2
JCBUS
TYCO_1734648-1~D
GND11A_CAD02A_CAD13A_CAD34A_CAD55A_CAD76A_PCI_C/BE0#7GND28A_CAD99A_CAD1110A_CAD1211GND312A_CAD1413A_PCI_C/BE1#14A_CPAR15GND416A_CPERR#17A_CGNT#18A_CINT#19+AVCC020+AVPP021A_CCLK22A_CIRDY23A_PCI_C/BE2#24
GND527
A_CAD1825A_CAD2026
A_CAD2128A_CAD2229
GND632
A_CAD2330A_CAD2431
A_CAD2533A_CAD2634
GND736 A_CAD2735
A_CAD2937CB_A_D238A_CCLKRUN#39GND840
A_CCD1# 42A_CAD2 43A_CAD4 44A_CAD6 45
GND10 48
CB_A_D14 46A_CAD8 47
A_CAD10 49A_CVS1 50
GND11 52A_CAD13 51
A_CAD15 53A_CAD16 54
CB_A_A18 55GND12 56
A_CBLOCK# 57A_CSTOP# 58
A_CDEVSEL# 59+AVCC1 60+AVPP1 61
A_CTRDY# 62A_CFRAME# 63
A_CAD17 64
GND13 67
A_CAD19 65A_CVS2 66
A_CRST# 68A_CSERR# 69
GND14 72
A_CREQ# 70A_PCI_C/BE3# 71
A_CAUDIO 73A_CSTSCHG 74
GND15 76A_CAD28 75
A_CAD30 77A_CAD31 78A_CCD2# 79
GND9 41
GND16 80
C80
40.
1U_0
402_
16V4
Z~D
1
2R604
0_0402_5%~D 1 2
C80
10.
1U_0
402_
16V4
Z~D
1
2C79
50.
1U_0
402_
16V4
Z~D
1
2
X2 24.576MHz_16P_1BG24576CKIA~D
12
R114 0_0402_5%~D 1 2
R608
56.2_0402_1%~D
12
C79
74.
7U_0
603_
6.3V
4Z~D
1
2
L62 DLW21SN121SQ2_0805~D@11
44 3 3
2 2
R615100_0402_5%~D
1 2
C8084.7P_0402_50V8C~D
@
1
2
C807
1U_0603_10V4Z~D
1
2
C80
30.
1U_0
402_
16V4
Z~D
1
2
OZ711EZ1
U42
OZ711EZ1TN C_E-LQFP128_16X16~D
CORE_3.311CORE_3.397
PCI_VCC26PCI_VCC56
CORE_3.3A65CORE_3.3A68CORE_3.3A73
CO
RE
_1.8
16C
OR
E_1
.882
EPSI
8
AD3119AD3020AD2921AD2822AD2723AD2624AD2525AD2427AD2329AD2230AD2131AD2032AD1934AD1835AD1736AD1637AD1547AD1448AD1349AD1250AD1151AD1052AD953AD854AD757AD658AD559AD460AD361AD262AD163AD064
C/BE3#28C/BE2#38C/BE1#46C/BE0#55
IDSEL9PCI_CLK45DEVSEL#42FRAME#39IRDY#40TRDY#41STOP#43PAR44REQ#17GNT#18PCI_RST#5PME#7SERIRQ6
GN
D33
GN
D10
8
REF 72
XI 74XO 75
BIAS 71TPA+ 70TPA- 69TPB+ 67TPB- 66
CAD31 3CAD30 1CAD29 128CAD28 127CAD27 126CAD26 125CAD25 124CAD24 122CAD23 120CAD22 118CAD21 116CAD20 115CAD19 114CAD18 113CAD17 112CAD16 96CAD15 94CAD14 93CAD13 92CAD12 91CAD11 90CAD10 89
CAD9 88CAD8 87CAD7 84CAD6 83CAD5 81CAD4 80CAD3 79CAD2 78CAD1 77CAD0 76
CCLK 106CFRAME# 110
CIRDY# 109CTRDY# 107
CDEVSEL# 105CSTOP# 103
CPAR 98CPERR# 100CSERR# 119
CREQ# 121CGNT# 102CINT# 104
CBLOCK# 101CCLKRUN# 4
CRST# 117R2_D2 2
R2_D14 85R2_A18 99
CVS1 12CVS2 15
CCD1# 10CCD2# 14
CSTSCHG 13
CC/BE3# 123CC/BE2# 111CC/BE1# 95CC/BE0# 86G
ND
129
R602 33_0402_5%~D
C805
270P_0402_50V7K~D
1
2
R614 0_0402_5%~D
C79
34.
7U_0
603_
6.3V
4Z~D
1
2
C81
00.
1U_0
402_
16V4
Z~D
1
2
L60BLM18AG121SN1D_0603~D
1 2
C80
00.
1U_0
402_
16V4
Z~D
1
2
U41
OZ2532SN_SSOP20~D
CLK2PERR#7SERR#8RST#10CLKRUN#6INTA#3SKT_LED9
1.8VOUT19EPSI1
GND20
+5V 16+5V 15
+3.3V 18+3.3V 17
VCC/VPP 5VCC/VPP 4
USB_A0 14USB_B0 13USB_A1 12USB_B1 11
C79
80.
1U_0
402_
16V4
Z~D
1
2
R6035.9K_0402_1%~D
1 2
J1394
TYCO_2-1775815-2~D
TPA+4TPA-3TPB+2TPB-1
GND 5GND 6GND 7GND 8
R61010_0402_5%~D
@
12
C79
60.
1U_0
402_
16V4
Z~D
1
2
R607
56.2_0402_1%~D
12
C79
10.
1U_0
402_
16V4
Z~D
1
2
R64256.2_0402_1%~D
12
R613
5.11K_0402_1%~D
12
C79
20.
1U_0
402_
16V4
Z~D
1
2
R6120_0402_5%~D 1 2
R609
56.2_0402_1%~D
12
L61 DLW21SN121SQ2_0805~D@
11
44 3 3
2 2
C80612P_0402_50V8J~D
1 2
C79
04.
7U_0
603_
6.3V
4Z~D
1
2
C823
12P_0402_50V8J~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_SMC_48M
MD0
PCI_RST#
CLK_SMC_48M
USBP4-USBP4+
SC_CLK
SC_DET#
SCCD-SCCD+
SC_IO
+SC_PWRSC_RST#
SC_C4 SCCD+
SCCD-
+5V_RUN
+3.3V_RUN+SC_PWR
+3.3V_RUN
CLK_SMC_48M6
PCI_RST#21,30,35
USBP4-23USBP4+23
SC_USBP+25SC_USBP-25
SC_DET# 38
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Smart Card OZ77CR6
31 66Thursday, March 01, 2007
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
Place closely pin 3
R25
21.
5K_0
402_
1%~D
12
R125 220_0402_5%~D
12
T41PAD~D
R126 33_0402_5%~D
12
U26
OZ77CR6LN_QFN32~D
VCC5V_IN05VCC5V_IN128
UPD-17UPD+16
RST#12
NC2 30NC3 31XI/48M_IN3
XO4
MODE0/LED#32MODE11MODE22 GND1 11
GND2 26
GND0 9
3V_CPR 29
DPD-19DPD+18
EGATED- 21EGATED+ 20
SC_VCC 27SC_RST# 24
SC_CLK 23SC_C4 22SC_IO 25
SC_DET# 13
3.3VCC8
NC1 7RFIO115 RFIO014
VR_CPR0 6VR_CPR1 10
C4251U_0603_10V4Z~D
1 2
R130 220_0402_5%~D
12
R25810_0402_5%~D
@ 12
C305 1U_0603_10V4Z~D
1 2
R26
415
K_04
02_5
%~D
12
C44
14.
7U_0
603_
6.3V
4Z~D
1
2
R26
310
K_04
02_5
%~D
12
R25
515
K_04
02_5
%~D
12
C44
30.
1U_0
402_
16V4
Z~D
1
2
C91
0.1U
_040
2_16
V4Z~
D
1
2
R25
7
15K_
0402
_5%
~D
12
C43
50.
1U_0
402_
16V4
Z~D
1
2
R29
615
K_04
02_5
%~D
12
C12
91U
_060
3_10
V4Z~
D
1
2
R25
6
15K_
0402
_5%
~D
12
R25
115
K_04
02_5
%~D
12
R12
9
47K_
0402
_5%
~D
12
R260 220_0402_5%~D
12
C44
64.
7U_0
603_
6.3V
4Z~D
1
2 JSC
MOLEX_52207-1085~D
11 22 33 44 55 66 77 88 99 1010
GND11 GND12
C42
84.
7U_0
603_
6.3V
4Z~D
1
2
C4324.7P_0402_50V8C~D
@ 1
2
T40PAD~D
C44
20.
1U_0
402_
16V4
Z~D
1
2
R25
94.
7K_0
402_
5%~D
12
C44
80.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_SIDE_EN#
USB_BACK_EN#
LED_10_GRN_R#LED_100_ORG_R#
LAN_ACTLED_YEL_R#
SW_LAN_TX0+
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0-
SW_LAN_TX2+
SW_LAN_TX3-SW_LAN_TX3+SW_LAN_TX2-
USBP2_D+USBP2_D-
USBP3_D-USBP3_D+
HDD_LED
USBP1-USBP1+
BATT_GREEN_LEDBATT_AMBER_LED
BREATH_GREEN_LED
R_BT_ACTR_MPCI_ACT
USBP0-USBP0+
USBP0+
USBP0-
USBP1+
USBP1-
USB_OC2_3#
USB_OC0_1#
USBP2_D+
USBP3_D-
USBP3_D+
USBP2+
USBP3-
USBP3+
USBP2-
USBP2_D-+USB_BACK_PWR
+USB_BACK_PWR
+5V_ALW
+5V_ALW
+USB_SIDE_PWR
+USB_SIDE_PWR
+USB_SIDE_PWR +USB_BACK_PWR
+3.3V_LAN
+2.5V_LAN
USB_OC2_3# 23
USB_OC0_1# 23
USB_BACK_EN#38
USB_SIDE_EN#38
SW_LAN_TX2+ 29SW_LAN_TX2- 29SW_LAN_TX3+ 29SW_LAN_TX3- 29
LED_10_GRN_R# 29LED_100_ORG_R# 29
LAN_ACTLED_YEL_R# 29
SW_LAN_TX0+ 29SW_LAN_TX0- 29SW_LAN_TX1+ 29SW_LAN_TX1- 29
HDD_LED 43
USBP1-23USBP1+23
BATT_GREEN_LED43BATT_AMBER_LED43R_BT_ACT43R_MPCI_ACT43
BREATH_GREEN_LED43
USBP0-23USBP0+23
AUD_INT_MIC+27AUD_INT_MIC-27
USBP2+23
USBP2-23
USBP3+23
USBP3-23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
USB 2.0 Port
32 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Rear USB Ports
Place ESD diodes as close as USB connector.
Rear USB Port
C9
0.1U
_040
2_16
V4Z~
D
1
2
U1
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
PJP3PAD-OPEN 4x4m
12
C17010U_0805_10V4Z~D@
1
2
FUSE2LF453
@
1 2
U16
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
JIO
TYCO_3-1775014-0~D
11 2 233 4 455 6 677 8 899 10 10
12 1214 141111
13131515 16 161717 18 181919 20 202121 22 222323 24 242525 26 2627272929 28 28
30 30
GND31GND32GND33
GND 34GND 35GND 36
U4
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
+
C16
815
0U_D
2_6.
3VM
~D
1
2
R1500_0402_5%~D 1 2
R1490_0402_5%~D 1 2
L12 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C8
0.1U
_040
2_16
V4Z~
D
1
2
FUSE5L0603
@
1 2
R1470_0402_5%~D 1 2
JUSB1
FOX_UB9112C-SB201-4F~D
A_VCC1A_D-2A_D+3A_GND4
B_VCC5B_D-6B_D+7B_GND8
G19G210G311G412
FUSE1LF453
@
1 2
L13 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2R148
0_0402_5%~D 1 2
PJP4PAD-OPEN 4x4m
12
C20.1U_0402_16V4Z~D
1
2
FUSE4L0603
@
1 2
U2
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
C3
0.1U
_040
2_16
V4Z~
D
1
2
C1690.1U_0402_16V4Z~D
1
2
C110U_0805_10V4Z~D @
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_AZ_MDC_BITCLK
ICH_AZ_MDC_SYNC
ICH_AZ_MDC_SDOUT
ICH
_AC
_SD
OU
T_M
DC
TER
M
ICH_AZ_MDC_SDOUT
MD
C_A
C_B
ITC
LK_T
ERM
MDC_SDIN
ICH_AZ_MDC_BITCLK
ICH_RST_MDC_R#
ICH_RST_MDC_R#
+5V_SUS
+3.3V_SUS
ICH_AZ_MDC_SYNC22ICH_AZ_MDC_SDIN122
ICH_AZ_MDC_BITCLK22
ICH_AZ_MDC_SDOUT22
MDC_RST_DIS#18
ICH_AZ_MDC_RST#22
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
BT PORT and MDC
33 66Thursday, March 01, 2007
Compal Electronics, Inc.
1
3
5
7
9
11 12
10
8
6
4
2GND
IAC_SDATA0
IAC_SYNC
IAC_SDATAIN
IAC_RESET#
RES
RES
3.3V
GND
GND
IAC_BITCLK
GND
New MDC connector.
W=20 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R12833_0402_5%~D
1 2 R
123
10_0
402_
5%~D
12
C12
64.
7U_0
603_
6.3V
4Z~D
1
2
R23910K_0402_5%~D
12
C12810P_0402_50V8J~D
1
2
R233100K_0402_5%~D
12
G
D S
Q31BSS138W-7-F_SOT323~D
2
1 3
C12
50.
1U_0
402_
16V4
Z~D
1
2
R2350_0402_5%~D
@
1 2
C12710P_0402_50V8J~D
@
1
2
R12
410
_040
2_5%
~D@
12
Connector for MDC Rev1.5
JMDC
TYCO_1-1775149-2~D
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP9_D-
WWAN_RADIO_DIS#
WLAN_SMBCLK
LED_WLAN_OUT#
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_CPCIE_ITX_WLANRX_P2_C
WLAN_SMBDATA
WLAN_RADIO_DIS#_RPLTRST3#
UIM_DATAUIM_CLK
UIM_VPP
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_CPCIE_ITX_WANRX_P1_C
USBP9_D-
UIM_DATA
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_WAKE#
UIM_RESETUIM_CLK
UIM_VPP
UIM_VPP
UIM_RESETWLAN_RADIO_DIS#_R
HOST_DEBUG_TXHOST_DEBUG_RX8051_TX
8051_RX
UIM_DATA
UIM_RESET
UIM_CLK
USBP9_D+
USBP9_D+
PCIE_MCARD2_DET#
SB_WWAN_PCIE_RST#
PLTRST3#WWAN_PLTRST3#_R
SB_WLAN_PCIE_RST#
WLAN_PLTRST3#_R
WLAN_SMBCLK
WLAN_SMBDATA
ICH_SMBCLKICH_SMBDATA
+3.3V_RUN+3.3V_RUN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+SIM_PWR+1.5V_RUN
+1.5V_RUN
+SIM_PWR
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_WLAN+3.3V_ALW+PWR_SRC
+3.3V_RUN
+SIM_PWR
+1.5V_RUN +3.3V_WLAN
+3.3V_WLAN
CLK_PCIE_MINI26
COEX1_BT_ACTIVE40COEX2_WLAN_ACTIVE40
CLK_PCIE_MINI2#6
PCIE_IRX_WLANTX_N223PCIE_IRX_WLANTX_P223
MINI2CLK_REQ#6
PCIE_ITX_WLANRX_N2_C23PCIE_ITX_WLANRX_P2_C23
PCIE_IRX_WANTX_N123PCIE_IRX_WANTX_P123
PCIE_ITX_WANRX_N1_C23PCIE_ITX_WANRX_P1_C23
CLK_PCIE_MINI16CLK_PCIE_MINI1#6
MINI1CLK_REQ#6
PLTRST3# 21,28
PCIE_WAKE#28,38
PCIE_WAKE#28,38
WWAN_RADIO_DIS# 38
LED_WLAN_OUT# 43BT_ACTIVE 40,43
WLAN_RADIO_DIS#38
PLTRST3# 21,28
USBP9-23
USBP9+23
HOST_DEBUG_TX 39HOST_DEBUG_RX39
8051_TX39
8051_RX 39
USB_MCARD2_DET# 23PCIE_MCARD2_DET#21
PCIE_MCARD1_DET#23USB_MCARD1_DET# 23
WLAN_3V_ENABLE39
SB_WWAN_PCIE_RST#21
SB_WLAN_PCIE_RST#21
CLK_SDATA 6
CLK_SCLK 6
ICH_SMBCLK 23,28ICH_SMBDATA 23,28
ICH_SMBCLK 23,28
ICH_SMBDATA 23,28
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Mini Card
34 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+1.5V
+-9%
+-5%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
Mini-Card Latch
Mini-Card Latch Mini WWAN
Mini WLAN
C11
122
U_0
805_
6.3V
AM~D
1
2
C12
433
P_0
402_
50V8
J~D
1
2
R64
52.
2K_0
402_
5%~D
12
JMINI1
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
C12
00.
047U
_040
2_16
V4Z~
D
1
2
G
D
S
Q962N7002W-7-F_SOT323-3~D
2
13
C16
0.1U
_040
2_16
V4Z~
D
@
1
2
R6620_0402_5%~D@ 1 2
C12
133
P_0
402_
50V8
J~D
1
2
JCLIP1
TYCO_1775837-1~D
GND11GND22GND33GND44
R18
0_0402_5%~D
@1 2
L8 DLW21SN900SQ2_0805~D@11
44 3 3
2 2
R1200_0402_5%~D 1 2
+
C44
533
0U_D
2E_6
.3VM
_R25
~D
1
2
R5990_0402_5%~D
@
12
R78
247
0K_0
402_
5%~D
12
G
DS
Q462N7002W-7-F_SOT323-3~D
@
2
13
C45
91U
_060
3_10
V4Z~
D
1
2
C34
0.04
7U_0
402_
16V4
Z~D
1
2
R78
410
0K_0
402_
5%~D
12
C36
0.1U
_040
2_16
V4Z~
D
1
2
R78
320
0K_0
402_
5%~D
12
R78
510
0K_0
402_
5%~D
12
R11 0_0402_5%~D@1 2
R91 0_0402_5%~D
1 2
C16
60.
047U
_040
2_16
V4Z~
D
1
2
R6000_0402_5%~D
12
C16
40.
1U_0
402_
16V4
Z~D
1
2
C46
033
P_0
402_
50V8
J~D
1
2
G
DS
Q452N7002W-7-F_SOT323-3~D@ 2
13
C41
60.
047U
_040
2_16
V4Z~
D
1
2
T16 PAD~D
JMINI2
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
C15
0.04
7U_0
402_
16V4
Z~D
1
2
R548100K_0402_5%~D
1 2
D1RB751S40T1_SOD523-2~D
21
G
D
S
Q95
2N70
02W
-7-F
_SO
T323
-3~D
2
13JCLIP2
TYCO_1775837-1~D
GND11GND22GND33GND44
R1210_0402_5%~D 1 2
R27 0_0402_5%~D
1 2
R574100K_0402_5%~D
12R786
100K_0402_5%~D
12
R549 100K_0402_5%~D 1 2
C44
90.
047U
_040
2_16
V4Z~
D
1
2
JSIM
SUYIN_254020MA006G502ZL~D
VCC1RST2CLK3
GND 4VPP 5
I/O 6
NC 8NC7
C12
333
P_0
402_
50V8
J~D
1
2 C12
233
P_0
402_
50V8
J~D
1
2
C44
433
P_0
402_
50V8
J~D
1
2
C16
34.
7U_0
603_
6.3V
4Z~D
1
2
+ C283330U_D2E_6.3VM_R25~D
1
2
R5980_0402_5%~D
@
12
R5970_0402_5%~D
12
R64
02.
2K_0
402_
5%~D
12
C2704700P_0402_25V7K~D
1
2
S
GD
Q94SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R550 100K_0402_5%~D 1 2
C41
0.04
7U_0
402_
16V4
Z~D
1
2
R6600_0402_5%~D @1 2
U53
SRV05-4.TCT_SOT23-6~D
2
3
1
4
6
5
C77
333
P_0
402_
50V8
J~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QUIETE#DOCK_PCI_EN#
QBUFEN#
DOCK_SERR#
DOCK_LOCK#
PCI_C_BE3#
PCI_SERR#
DOCK_C_BE2#
PCI_PLOCK#
PCI_PIRQA#
PCI_AD24
DOCK_TRDY#
DOCK_PCIRST#
PCI_C_BE1#DOCK_C_BE0#
PCI_PERR#
PCI_PAR
PCI_C_BE0#
DOCK_SPME#
PCI_STOP#
DOCK_GNT0#
DOCK_PAR
DOCK_STOP#
DOCK_PIRQA#
PCI_TRDY#
SYS_PME#DOCK_C_BE3#
DOCK_DEVSEL#
PCI_IRDY#
PCI_C_BE2#
DOCK_IRDY#PCI_FRAME#
DOCK_PCI_IDSEL
DOCK_PERR#
DOCK_FRAME#
PCI_DEVSEL#
DOCK_C_BE1#
PCI_GNT0#PCI_RST#
PCI_AD22
+VCC_QBUFD
PCI_AD26
PCI_AD15
PCI_AD16
PCI_AD30
PCI_AD28
PCI_AD25
PCI_AD18
PCI_AD2
PCI_AD5
PCI_AD20
PCI_AD10
PCI_AD7
PCI_AD31
PCI_AD17
PCI_AD24
PCI_AD1
PCI_AD29
PCI_AD14
PCI_AD4
PCI_AD21
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD8
PCI_AD0
PCI_AD9
PCI_AD19
PCI_AD6
PCI_AD11PCI_AD12PCI_AD13
DOCK_AD30
DOCK_AD27
DOCK_AD18
DOCK_AD24
DOCK_AD23
DOCK_AD14
DOCK_AD6
DOCK_AD3DOCK_AD2
DOCK_AD13
DOCK_AD26
DOCK_AD0
DOCK_AD15
DOCK_AD11
DOCK_AD1
DOCK_AD28
DOCK_AD8
DOCK_AD21
DOCK_AD25
DOCK_AD10
DOCK_AD19
DOCK_AD16
DOCK_AD22
DOCK_AD31
DOCK_AD7
DOCK_AD5
DOCK_AD20
DOCK_AD17
DOCK_AD9
DOCK_AD12
DOCK_AD29
DOCK_AD4
QUIETE#
QUIETE#
+3.3V_RUN
+5V_RUN+VCC_QBUF
DOCK_PCI_EN#36
QBUFEN#38
DOCK_PAR 36
PCI_TRDY#21,30
PCI_FRAME#21,30,36
DOCK_C_BE1# 36
SYS_PME#30,38
DOCK_TRDY# 36
PCI_DEVSEL#21,30
DOCK_GNT0# 36
DOCK_C_BE0# 36
PCI_PIRQA#21
DOCK_IRDY# 36
PCI_GNT0#21,36
DOCK_DEVSEL# 36
PCI_C_BE3#21,30
DOCK_LOCK# 36
PCI_C_BE1#21,30DOCK_C_BE2# 36
DOCK_FRAME# 36
PCI_PERR#21,30
PCI_PAR21,30
DOCK_PERR# 36
PCI_RST#21,30,31
PCI_STOP#21,30
DOCK_SPME# 36
PCI_C_BE2#21,30
DOCK_PIRQA# 36
DOCK_SERR# 36
PCI_IRDY#21,30,36
PCI_SERR#21,30
PCI_PLOCK#21
DOCK_PCI_IDSEL 36
PCI_C_BE0#21,30
DOCK_PCIRST# 36
DOCK_STOP# 36
DOCK_C_BE3# 36
PCI_AD[0..31]21,30
DOCK_AD[0..31] 36
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
DOCKING BUFFER
35 66Thursday, March 01, 2007
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C290.1U_0402_16V4Z~D 1 2
C33
0.04
7U_0
402_
16V4
Z~D
1
2
R191K_0402_5%~D
12
D3RB751S40T1_SOD523-2~D
2 1
R22100K_0402_5%~D 1
2
C310.047U_0402_16V4Z~D
1 2
C28
0.1U
_040
2_16
V4Z~
D
1
2
C350.1U_0402_16V4Z~D
1
2
U18
PI5C162861BE_BQSOP48~D
A02A13A24A35A46A57A68A79A810A911
A1014A1115A1216A1317A1418A1519
B0 46B1 45B2 44B3 43B4 42B5 41B6 40B7 39B8 38B9 37
B10 34B11 33B12 32B13 31B14 30B15 29
GND1 12GND2 24NC11
NC213
OE147OE235 VCC2 48VCC1 36
A1620A1721A1822A1923
B16 28B17 27B18 26B19 25
C32
0.1U
_040
2_16
V4Z~
D
1
2
D2RB751S40T1_SOD523-2~D
2 1
U19
PI5C34X2245BE_BQSOP80~D
NC11A12A23A34A45A56A67A78A89GND110NC211A912A1013A1114A1215A1316A1417A1518A1619GND220NC321A1722A1823A1924A2025A2126A2227A2328A2429GND330NC431A2532A2633A2734A2835A2936A3037A3138A3239GND440
VCC4 80OE1# 79
B1 78B2 77B3 76B4 75B5 74B6 73B7 72B8 71
VCC3 70OE2# 69
B9 68B10 67B11 66B12 65B13 64B14 63B15 62B16 61
VCC2 60OE3# 59
B17 58B18 57B19 56B20 55B21 54B22 53B23 52B24 51
VCC1 50OE4# 49
B25 48B26 47B27 46B28 45B29 44B30 43B31 42B32 41
U5
TC7SH32FU_SSOP5~D
INB1
INA2 O 4
P5
G3
C260.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_AD28
DOCK_AD13
DOCK_AD22
DOCK_OWNS_PCI
DOCK_SMB_ALERT#
DOCK_AD31
TV_Y
TV_C
DOCK_C_BE2#
DOCK_AD30
DOCK_AD8
CRT_RED
DOCK_AD4
DOCK_AD23
DOCK_AD11
PCI_IRDY#
DOCK_AD16
DOCK_AD0
DOCK_AD10
Z3306
DOCK_AD11
DOCK_AD0
DOCK_AD19
DOCK_AD5
DOCK_AD3
DOCK_AD7
DOCK_AD31
DOCK_AD9
DOCK_AD4
DOCK_TRDY#
DOCK_AD26
PCI_GNT0#
DOCK_AD6
D_LAD2
DOCK_C_BE0#
TV_CVBS
DOCK_AD14
DOCK_AD18
DOCK_C_BE1#
DOCK_AD20
DOCK_AD12
DOCK_AD6
DOCK_AD30
PCI_FRAME#
G_DOC_PWRSRC
DOCK_AD2
DOCK_AD7
TV_Y
DOCK_OWNS_PCI
DOCK_AD29
R_PIDEACT
DOCK_AD8
DOCK_TIP
DOCK_AD14
DOCK_AD10
DOCK_AD2
DOCK_AD27
DOCK_AD25
DOCK_AD17
CRT_RED
+DC_IN
DOCK_C_BE3#
DOCK_AD17
DOCK_AD25
TV_CVBS
DOCK_AD24
Z3305
DOCK_AD20
DOCK_AD16
DOCK_RING
DOCK_AD15
TV_C
DOCK_AD21
DOCK_AD18
DOCK_AD28DOCK_AD1
CRT_BLU
DOCK_AD21
D_LAD0
DOCK_AD19
DOCK_PWR_EN
DOCK_AD13
DOCK_AD5
DOCK_AD27
CRT_GRN
DOCK_AD12
DOCK_STOP#
Z330
7
DOCK_AD22
DOCK_PCIRST#
DOCK_AD15
DOCK_PERR#
CRT_GRN
DOCK_AD29
D_LAD1
DOCK_AD1
DOCK_AD23DOCK_AD24
CRT_BLU
D_LAD3
DOCK_AD9
DOCK_AD3
Z3308
DOCK_RING
DOCK_TIP
USBP8-USBP8+
CLK_PCI_DOCK
PCI_REQ0#
DOCK_AD26
VSYNC_RHSYNC_R
TV_C
TV_CVBS
TV_YAUD_SPDIF_OUT
DOCK_DET# DOCK_DET#
DOCK_DET#
+3.3V_SUS
+PWR_SRC
+3.3V_ALW
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+5V_ALW
+2.5V_LAN
+DC_IN
DOCK_FRAME#35
DAT_KBD 39
DOCK_TRDY# 35
DOCK_LAN_TX3+ 29
CLK_PCI_DOCK6
CRT_BLU20,52
CLK_KBD 39
DOCK_AD[0..31] 35
DOCK_LAN_TX3- 29
CRT_GRN20,52
CRT_RED20,52
DOCK_SMB_PME# 38
DOCK_GNT0# 35
DVI_TX0-53
D_LFRAME# 38
DOCK_IRDY# 35
DVI_DETECT 52
PCI_GNT0#21,35
DOCK_PSID44
DOCK_DEVSEL# 35
DVI_TX0+53
DVI_SDATA 52
PCI_FRAME#21,30,35
DVI_CLK+53
DVI_SCLK 52
PCI_IRDY#21,30,35
DVI_TX1-53
D_DLRQ1# 38 D_LAD0 38
DVI_TX1+53
DOCK_C_BE3# 35
DOCK_LOCK#35
DAT_DOCK39
DOCK_SMB_DAT39
DOCK_PCI_IDSEL 35
TV_CVBS52
DOCK_PAR35
DOCK_LOM_SPD100LED_ORG#29
DOCK_C_BE2#35
AUD_SPDIF_OUT26
DOCK_LAN_TX0-29
CLK_DOCK39
D_LAD138
DVI_CLK-53
D_LAD238
D_SERIRQ 38
TV_Y52
DOCK_LAN_TX1-29
DVI_TX2-53
R_PIDEACT 43
DOCK_SMB_ALERT# 39
DOCK_PCIRST# 35
DOCK_SMB_CLK39
D_LAD338
DOCK_LOM_ACTLED_YEL# 29
DOCK_C_BE0# 35
TV_C52
DOCK_PERR# 35
D_CLKRUN# 38
DOCK_STOP# 35
DOCK_PCI_EN#35
DOCK_SERR#35DVI_TX2+53
DOCK_C_BE1# 35
DOCK_LAN_TX2+ 29
DOCK_PIRQA#35
DOCK_LAN_TX0+29
DOCK_SPME#35
DOCK_LAN_TX1+29DOCK_LAN_TX2- 29
DOCK_PWR_EN38
DOCK_LOM_SPD10LED_GRN#29
DAT_DDC2 20,52CLK_DDC2 20,52
DOCKED 29,38
PCI_REQ0# 21
HSYNC_R 20VSYNC_R 20
USBP8- 23USBP8+ 23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
DOCKING CONN
36 66Thursday, March 01, 2007
Compal Electronics, Inc.
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
self power dock
NB
PWR_SRC
no power dock
DVI_TX4-DVI_TX4+
DVI_TX3+DVI_TX3-
DVI_TX5+DVI_TX5-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C254.7P_0402_50V8C~D
@1
2
C38
0.1U_0402_16V4Z~D
1 2
Q3DDTC144EUA-7-F_SOT323-3~D
2
13
R17100K_0402_5%~D
12
JDOCKB
TYCO_2-1612415-1~D
S137137S138138S139139S140140S141141S142142S143143S144144S145145S146146S147147S148148S149149S150150S151151S152152S153153S154154S155155S156156S157157S158158S159159S160160S161161S162162S163163S164164S165165S166166S167167S168168S169169S170170S171171S172172S173173S174174S175175S176176S177177S178178S179179S180180S181181S182182S183183S184184S185185S186186S187187S188188S189189S190190
S205 205S206 206S207 207S208 208S209 209S210 210S211 211S212 212S213 213S214 214S215 215S216 216S217 217S218 218
S220 220
S222 222S223 223S224 224S225 225S226 226S227 227S228 228S229 229S230 230S231 231S232 232S233 233S234 234S235 235S236 236S237 237S238 238S239 239S240 240S241 241S242 242S243 243S244 244S245 245S246 246S247 247S248 248
S250 250
S252 252S253 253S254 254S255 255S256 256S257 257S258 258S259 259
S193193S194194S195195S196196
M204204
U6NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3
G
D
S
Q22N7002W-7-F_SOT323-3~D
2
13
C13
0.1U
_060
3_50
V4Z~
D
1
2
C210.01U_0402_16V7K~D
12
C230.01U_0402_16V7K~D
1 2
C240.01U_0402_16V7K~D 1 2
Q6FDS4435BZ_SO8~D
4
78
65
123
R4100K_0402_5%~D
12
R12 150_0402_1%~D 1 2
C150
0.1U_0402_10V7K~D
12
C26710P_0402_50V8J~D
@
1
2
R14 150_0402_1%~D 1 2
U7
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
R13 150_0402_1%~D 1 2
JDOCKA
TYCO_2-1612415-1~D
S11S22S33S44S55S66S77S88S99S1010S1111S1212S1313
S1515
S1717S1818S1919S2020S2121S2222S2323S2424S2525S2626S2727S2828S2929S3030S3131S3232S3333S3434S3535S3636S3737S3838S3939S4040S4141S4242S4343
S4545
S4747S4848S4949S5050S5151S5252S5353S5454S5555
S69 69S70 70S71 71S72 72S73 73S74 74S75 75S76 76S77 77S78 78S79 79S80 80S81 81S82 82S83 83S84 84S85 85S86 86S87 87S88 88S89 89S90 90S91 91S92 92S93 93S94 94S95 95S96 96S97 97S98 98S99 99
S100 100S101 101S102 102S103 103S104 104S105 105S106 106S107 107S108 108S109 109S110 110S111 111S112 112S113 113S114 114S115 115S116 116S117 117S118 118S119 119S120 120S121 121S122 122
S125 125S126 126S127 127S128 128
M136 136
R2010_0402_5%~D
@12
R8
100K
_040
2_5%
~D
12
U8
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
C220.01U_0402_16V7K~D
12
C400.1U_0402_16V4Z~D
1
2
C14
1000
P_04
02_5
0V7K
~D
1
2
C110.47U_0805_25V7K~D
1
2
C20
0.1U
_060
3_50
V4Z~
D
1
2
U1374AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
R10200K_0402_5%~D
12
R70_0402_5%~D@
1 2
JWIRE
MOLEX_53398-0471~D
11223344
JDOCKC
TYCO_2-1612415-1~D
P1P1
P2P2
P3P3
P4P4
P5 P5
P6 P6
P7 P7
P8 P8
MH1MH1 MH2 MH2
SHLD5MH9
SHLD1MH5
SHLD2MH6
SHLD3 MH7
SHLD6MH10
SHLD4 MH8
SHLD7 MH11
SHLD8 MH12
MH14 MH14MH16 MH16MH13MH13
MH15MH15
C181000P_0402_50V7K~D
1
2
R16100K_0402_5%~D
12
C370.1U_0402_16V4Z~D
1
2
R79110_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTS0TXD0#
DTR0
RXD0#DSR0
CTS0
TXD0
3243C1-
3243C1+
RI0
DCD0
CTS0#
RTS0#
DSR0#
DCD0#DTR0#
3243C2+
3243C2-
RXD0
3243V+
3243V-
RI0RXD0#
DTR0RTS0TXD0#
DCD0
CTS0DSR0
RI0#
KSO0KSO1KSO2KSO3KSO4KSO5KSO6KSO7KSO8KSO9KSO10KSO11KSO12KSO13KSO14KSO15KSO16KSO17
KSI0KSI1KSI2KSI3KSI4KSI5KSI6KSI7
BC_A_DAT
BC_A_CLK
BC_A_INT#
+3.3V_SUS
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
DSR0#38
DTR0#38
TXD038RTS0#38
DCD0#38
RXD038CTS0#38
RUN_ON19,39,41,42,51
RI0#38
KSI[0..7] 40
KSO[0..17] 40
BC_A_DAT39
BC_A_CLK39
BC_A_INT#39 KYBD_DET# 40
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Serial & FIR
37 66Thursday, March 01, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ECE1077
U39
ECE1077-FZG_QFN40~D
KSO0 9KSO1 11KSO2 12KSO3 13KSO4 14KSO5 15KSO6 16KSO7 17KSO8 18KSO9 19
KSO10 20KSO11 21
KSO13 23KSO14 24KSO15 25
KSO16/GPIO_0 26KSO17/GPIO_1 27KSO18/GPIO_2 28KSO19/GPIO_3 29
KSO12 22
KSI0 1KSI1 2KSI2 3KSI3 4KSI4 5KSI5 6KSI6 7KSI7 8
KSO20/GPIO_4 31KSO21/GPIO_5 32KSO22/GPIO_6 33
TEST_PIN40
GND_PAD41
NC339
BC_DATA34
BC_CLK35
BC_INT#36
VCC130VCC110
NC137NC238
R281K_0402_5%~D
12
C15
727
0P_0
402_
50V7
K~D
1
2
C60.1U_0402_10V7K~D
1 2
C15
827
0P_0
402_
50V7
K~D
1
2
U3
MAX3243ECUI+T_TSSOP28~D
V- 3
VCC
26
FORCEOFF#22
C1+28V+ 27
C1-24C2+1
C2-2
FORCEON23GND 25
T1OUT 9T2OUT 10T3OUT 11
R1IN 4R2IN 5R3IN 6R4IN 7R5IN 8
T1IN14T2IN13T3IN12R1OUT19R2OUT18R3OUT17R4OUT16R5OUT15R2OUTB20
INVALID# 21
C100.47U_0402_10V4Z~D
1 2
C1670.1U_0402_16V4Z~D
1
2
C15
427
0P_0
402_
50V7
K~D
1
2
C17
10.
1U_0
402_
16V4
Z~D
1
2
C70.47U_0402_10V4Z~D
1 2
C15
327
0P_0
402_
50V7
K~D
1
2
JSIO
SUYIN_070921MR009S203BR~D
DCD01DSR06RXD0#2RTS0F7TXD0F#3CTS08DTR0F4RI09GND05
GND110GND211
C15
627
0P_0
402_
50V7
K~D
1
2
C120.1U_0402_10V7K~D
1 2
R131100K_0402_5%~D
@
12
C15
927
0P_0
402_
50V7
K~D
1
2C15
227
0P_0
402_
50V7
K~D
1
2 C15
527
0P_0
402_
50V7
K~D
1
2
C17
50.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS
IRQ_SERIRQ
CLK_SIO_14M
D_LAD1
D_LAD3
LPC_LDRQ1#
D_LAD0
D_LAD2
D_DLRQ1#
D_LFRAME#
D_SERIRQ
D_CLKRUN#
REG_EN
CLKRUN#LPC_LDRQ0#
SIO_VDDA
LPC_LAD1LPC_LAD0
LPC_LAD2LPC_LAD3
PLTRST2#CLK_PCI_5018
LPC_LFRAME#
RUNPWROK
PCIE_WAKE#
CLK_PCI_5018
CLK_SIO_14M
D_CLKRUN#
D_SERIRQ
D_DLRQ1#
SYS_PME#
IMVP6_PROCHOT#
BID0
CHIPSET_ID
BID1
LID_CL_SIO#
VGA_IDENTIFY
DTR0#
BT_RADIO_DIS#
BC_INT#
LOM_TPM_EN#
NB_MUTE#
AUD_HP_NB_SENSE
LOM_SUPER_IDDQ
RTS0#TXD0
BC_DAT
QBUFEN#
PSID_DISABLE#
BC_CLK
RI0#
DOCK_PWR_EN
1.05V_RUN_ON
ATF_INT#
GFX_CORE_ON
DCD0#
CHIPSET_ID
CTS0#
BID0
USB_BACK_EN#
RXD0
PBAT_PRES#
SYS_PME#PCIE_WAKE#
SBAT_PRES#
CHG_SBATTCHG_PBATT
DOCKED
WIRELESS_ON/OFF#
VGA_IDENTIFY
SC_DET#
ICH_PME#
LED_MASK#
ICH_PCIE_WAKE#WLAN_RADIO_DIS#
LCD_TST
MODPRES#
MODC_ENHDDC_EN
USB_SIDE_EN#
ADAPT_OCADAPT_TRIP_SET
PANEL_BKEN
AUD_SPDIF_SHDNDOCK_HP_MUTE#
BID1
LID_CL_SIO# LID_CL#
WWAN_RADIO_DIS#
PANEL_BKEN
LOM_LOW_PWR
DSR0#
DOCK_SMB_PME#
ITP_DBRESET#_R
DOCK_SMB_PME#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+5V_ALW
LPC_LAD[0..3] 22,28,39
PLTRST2# 21,39CLK_PCI_5018 6
CLKRUN# 23,30,39
IRQ_SERIRQ 23,28,30,39
LPC_LFRAME# 22,28,39
LPC_LDRQ1# 22LPC_LDRQ0# 22
CLK_SIO_14M 6
D_DLRQ1# 36
D_LAD1 36D_LAD2 36D_LAD3 36
D_LAD0 36
D_LFRAME# 36D_CLKRUN# 36
D_SERIRQ 36
RUNPWROK 39,42,48,54
1.05V_RUN_ON47
QBUFEN#35
RTS0#37
DTR0#37
AUD_HP_NB_SENSE26,27
GFX_CORE_ON51
BT_RADIO_DIS#40
LOM_TPM_EN#28
BC_DAT39
ATF_INT#18
PSID_DISABLE#44
RI0#37
TXD037
BC_INT#39
CTS0#37
RXD037
NB_MUTE#27
DOCK_PWR_EN36
USB_BACK_EN#32
DCD0#37
PBAT_PRES#44SBAT_PRES#44,50
SYS_PME#30,35PCIE_WAKE#28,34
CHG_PBATT50CHG_SBATT50PBAT_DSCHG50
ADAPT_TRIP_SET49
DOCKED29,36
SC_DET#31
ICH_PME#21
LED_MASK#43
SIO_EXT_WAKE#23
ICH_PCIE_WAKE#23WLAN_RADIO_DIS#34
WIRELESS_ON/OFF#43
5V_3V_1.8V_1.25V_RUN_PWRGD42
LCD_TST 19
MODPRES#25
MODC_EN25HDDC_EN25
USB_SIDE_EN#32
ADAPT_OC49
PANEL_BKEN52
AUD_SPDIF_SHDN26DOCK_HP_MUTE#26
LID_CL# 40
WWAN_RADIO_DIS#34
GFX_DEVID252
LOM_LOW_PWR28
LOM_SUPER_IDDQ28
LOM_CABLE_DETECT28
IMVP6_PROCHOT#48
BC_CLK39
DSR0#37
DOCK_SMB_PME#36
ITP_DBRESET#7,23
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
ECE5028
38 66Thursday, March 01, 2007
Compal Electronics, Inc.
Route RBIAS and its return to pin 128 veryshort.
TEST_PIN is a No Connect
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin 56
Place closely pin 64
0 = UMA
1 = Discrete Gfx
BID0X00REV BID1
00X01 0 1X02 01X03 1 1
C92
4.7U
_060
3_6.
3V4Z
~D
@
1
2
R106 10K_0402_5%~D@ 1 2
R236 10K_0402_5%~D 1 2
R23
810
K_04
02_5
%~D
@
12
R231 100K_0402_5%~D
12
R951M_0402_5%~D
12
LPC
DLPC
USB
GPIO
ECE5028-NU
CLK
TEST
(ECE5018)
U25
ECE5028-NU_VTQFP128_14X14~D
GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104
VCC1(VDDA33) 8
GPIOK[7](VSS) 23
GPIOJ[7](VDDA33) 14
VSS 51
GPIOK[4](VDDA33) 20
VSS 36
GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT#58BC_DAT59BC_CLK60
VCC
134
GPIOE[0]/RXD1GPIOE[1]/TXD2GPIOE[2]/RTS#3GPIOE[3]/DSR#4GPIOE[4]/CTS#5GPIOE[5]/DTR#84GPIOE[6]/RI#83GPIOE[7]/DCD#6
CLKRUN# 37
DCLK_RUN# 38
SER_IRQ 39
DSER_IRQ 40
LRESET# 41LFRAME# 42
DLFRAME# 43
LDRQ1# 44
DLDRQ1# 45
LDRQ0# 46
LAD3 47
DLAD3 48
LAD2 49
DLAD2 50
LAD1 52
VCC
157
DLAD1 53
LAD0 54
DLAD0 55
PCICLK 56
GPIOB[0]/INIT#65GPIOB[1]/SLCTIN#66GPIOC[2]/SCLT67GPIOC[3]/PE68GPIOC[4]/BUSY69GPIOC[5]/ACK#70GPIOC[6]/ERROR#71GPIOC[7]/ALF#73GPIOD[0]/STROBE#74GPIOC[1]/PD775GPIOC[0]/PD676GPIOB[7]/PD577GPIOB[6]/PD478GPIOB[5]/PD379GPIOB[4]/PD280GPIOB[3]/PD181GPIOB[2]/PD082
CLKI (14.318 MHz) 64
GPIOD[1]61GPIOD[2]62
GPIOD[3]/VBUS_DET63
CAP_LDO 86
VCC
185
VSS 96
GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31
GPIOH[6]32GPIOH[7]33
GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95
SYSOPT1/GPIOH[2]106SYSOPT0/GPIOH[3]107
VCC
110
8
GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112
IRTX113IRRX114
GPIOF[3]/IRMODE/IRRX3B115GPIOF[2]/IRTX2116GPIOF[1]/IRRX2117GPIOF[0]/IRMODE/IRRX3A118
GPIOI[1](VCC1) 119
GPIOI[2](VDD18) 120
VSS 17
GPIOI[3](XTAL2) 122GPIOI[4](XTAL1/CLKIN) 123
GPIOI[5](VDDA18PLL) 124GPIOI[6](VDDA33PLL) 125
GPIOI[7](ATEST) 126
GPIOJ[0](RBIAS) 127
GPIOJ[4](VSS) 11
GPIOJ[1](VSS) 128VSS 121VSS 87VSS 72
GPIOJ[2](USBDP0) 9GPIOJ[3](USBDN0) 10GPIOJ[6](USBDP1) 13GPIOJ[5](USBDN1) 12GPIOK[0](USBDP2) 15GPIOK[1](USBDN2) 16GPIOK[3](USBDP3) 19GPIOK[2](USBDN3) 18GPIOK[5](USBDP4) 21GPIOK[6](USBDN4) 22
PWRGD 7
OUT65 105
TEST_PIN 35
C1010.1U_0402_16V4Z~D
1
2
C4024.7P_0402_50V8C~D
@
1
2
R24610_0402_5%~D
@
12
R9410_0402_5%~D
12
C42
14.
7U_0
603_
6.3V
4Z~D
1
2
R22
712
K_04
02_1
%~D
@
12
R1 100K_0402_5%~D
1 2
C93
4.7U
_060
3_6.
3V4Z
~D
@
1
2
R242 0_0402_5%~D
1 2
C840.047U_0402_16V4Z~D
1
2
C894.7U_0603_6.3V4Z~D @
1
2
R109 10K_0402_5%~D@ 1 2
R806 0_0402_5%~D@1 2
R245 10K_0402_5%~D
1 2
C950.1U_0402_16V4Z~D
1
2
R11210K_0402_5%~D
12
R308 0_0402_5%~D 1 2
R237100K_0402_5%~D
12
C4154.7P_0402_50V8C~D
@
1
2
R25010K_0402_5%~D
12
R10
710
K_04
02_5
%~D
12
R234 100K_0402_5%~D
12
C980.1U_0402_16V4Z~D
1
2
R22110K_0402_5%~D@
12
C40
10.
1U_0
402_
16V4
Z~D
@
1
2
R24010_0402_5%~D
@
12
R220100K_0402_5%~D
12
R232 100K_0402_5%~D
12
R7210K_0402_5%~D@
1 2
R248 10K_0402_5%~D
1 2
C4200.1U_0402_10V7K~D
1
2
R247 10K_0402_5%~D
1 2
R10
810
K_04
02_5
%~D
12
C97
4.7U
_060
3_6.
3V4Z
~D @
1
2
R814
0_0603_5%~D
1 2
C4030.1U_0402_16V4Z~D
1
2
C94
0.1U
_040
2_16
V4Z~
D
@
1
2
C90
0.1U
_040
2_16
V4Z~
D
@
1
2
C88
0.1U
_040
2_16
V4Z~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_KBD
DAT_KBD
THRM_SMBDAT
THRM_SMBCLK
CLK_DOCK
DAT_DOCK
CLK_PCI_5025
HOST_DEBUG_RX
1.8V_RUN_ON
SIO_EXT_SMI#
LPC_LFRAME#
1.25V_RUN_ON
BAT1_LED#
CLK_PCI_5025
MEC5004_XTAL1
RUNPWROK
MEC5004_XTAL2
PLTRST2#
CLK_KBD
NUM_LED#
1.25V_GFX_PCIE_ON
SNIFFER_GREEN#
1.5V_RUN_ON
IRQ_SERIRQ
ICH_EC_SPI_CLK
SIO_A20GATE
RESET_OUT#
FAN1_TACH
SFPI_EN
MEC5004_XTAL1
DAT_TP_SIO
LCD_SMBCLK
FWP#
SIO_RCIN#
FWP#
CLK_TP_SIO
LCD_SMBDAT
BREATH_LED
BC_INT#
CLK_DOCK
ACAV_IN
ALWON
HOST_DEBUG_TX
DAT_DOCK
DAT_KBD
0.9V_DDR_VTT_ON
LCD_VCC_TEST_EN
BAT2_LED#
POWER_SW_IN#
SNIFFER_PWR_SW#
BC_DATBC_CLK
DOCK_SMB_DATDOCK_SMB_CLK
POWER_SW_IN# POWER_SW#
POWER_SW_IN1#
POWER_SW_IN1#
DEBUG_ENABLE#
SIO_PWRBTN#SNIFFER_YELLOW#
SIO_SPI_CS#
DOCK_SMB_DAT
DOCK_SMB_CLK
SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
MEC5004_XTAL2
MEC5004_XOSEL
8051_RX8051_TX 8051_TX
8051_RX
EC_FLASH_SPI_DINEC_FLASH_SPI_CLK
BC_A_DATBC_A_CLK
BC_A_INT#
AUX_ONSUS_ONRUN_ON
1.05V_1.25V_M_PWRGD
CKG_SMBDATCKG_SMBCLK
3.3V_M_PWRGD1.8V_SUS_PWRGD
ICH_CL_PWROK
M_ONSIO_SLP_M#
ICH_RSMRST#
LOM_SMB_ALERT#
TP_DET#
SIO_SLP_S3#SIO_SLP_S5#3.3V_RUN_ON
LCD_SMBCLK
LCD_SMBDAT
THRM_SMBCLKTHRM_SMBDAT
SBAT_SMBCLKSBAT_SMBDAT
DEBUG_ENABLE#
SNIFFER_GREEN#
SNIFFER_YELLOW#
CKG_SMBDAT
CKG_SMBCLK
CLKRUN#
LPC_LAD1LPC_LAD2
LPC_LAD0
LPC_LAD3
ICH_EC_SPI_DOICH_EC_SPI_DIN
SIO_SPI_CS#
SUS_ON
M_ON
RUN_ON
HOST_DEBUG_RX
EC_FLASH_SPI_DO
MEC_TEST_PIN
SNIFFER_RTC_GPO
PBAT_SMBDATPBAT_SMBCLK
EC_FLASH_SPI_CLKEC_FLASH_SPI_DO
SPI_CS0#EC_FLASH_SPI_DIN
SPI_CS0#
DOCK_SMB_ALERT#
IMVP_PWRGD
SIO_EXT_SCI#
DDR_ON
EC_CPU_PROCHOT#
AC_OFF
DDR_ON
BC_DAT
PS_ID
BEEP
AUX_ON
AC_OFF
LOM_SMB_ALERT#
ALW_PWRGD_3V_5V
ATI_ Intel_IDENTIFY
ATI_ Intel_IDENTIFY
DOCK_SMB_ALERT#
SFPI_EN
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+RTC_CELL
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+3.3V_LAN
LPC_LFRAME#22,28,38
PLTRST2#21,38CLK_PCI_50256
BAT1_LED# 43BAT2_LED# 43
RESET_OUT# 42
RUNPWROK 38,42,48,54
ACAV_IN 18,49,50
CLK_TP_SIO40DAT_TP_SIO40
ALWON 45
BREATH_LED 43
FAN1_TACH 18
SIO_A20GATE22
CLK_KBD36DAT_KBD36
DAT_DOCK36CLK_DOCK36
ICH_EC_SPI_CLK23
LCD_SMBCLK 19LCD_SMBDAT 19
SIO_EXT_SMI# 23
BC_INT#38BC_DAT38
SNIFFER_GREEN#43
IRQ_SERIRQ23,28,30,38
1.8V_RUN_ON 41LCD_VCC_TEST_EN 19
1.5V_RUN_ON 47
SIO_RCIN# 22
SCRL_LED# 43CAP_LED# 43
NUM_LED# 43
0.9V_DDR_VTT_ON 46
DOCK_SMB_DAT 36DOCK_SMB_CLK 36
POWER_SW# 18,40
SIO_PWRBTN#23SNIFFER_YELLOW#43
8051_TX348051_RX34
BC_A_DAT37BC_A_CLK37
BC_A_INT#37
AUX_ON41SUS_ON41,42RUN_ON19,37,41,42,51
CKG_SMBDAT6CKG_SMBCLK6
1.8V_SUS_PWRGD46
ICH_CL_PWROK10,23
LOM_SMB_ALERT# 23,28
TP_DET#40
SIO_SLP_S3#23SIO_SLP_S5#233.3V_RUN_ON41
THRM_SMBCLK 18,49THRM_SMBDAT 18,49
SBAT_SMBCLK 44SBAT_SMBDAT 44
IMVP_VR_ON 48
3.3V_SUS_ON 41
1.25V_GFX_PCIE_ON 54
HOST_DEBUG_TX 34HOST_DEBUG_RX 34
SNIFFER_PWR_SW# 43
LPC_LAD122,28,38LPC_LAD222,28,38LPC_LAD322,28,38CLKRUN#23,30,38
LPC_LAD022,28,38
ICH_EC_SPI_DIN23ICH_EC_SPI_DO23
ICH_SPI_CS0#23
PBAT_SMBDAT 44PBAT_SMBCLK 44
DOCK_SMB_ALERT# 36
IMVP_PWRGD 23,42,48
SIO_EXT_SCI# 23
1.25V_RUN_ON 51
WLAN_3V_ENABLE 34
DDR_ON46
EC_CPU_PROCHOT#7
AC_OFF44
ICH_RSMRST#23
BC_CLK38
PS_ID 44
BEEP 26
ALW_PWRGD_3V_5V45,46
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.4
EMC5025
39 66Thursday, March 01, 2007
Compal Electronics, Inc.
32 KHz ClockSame as Laguna
Place closely pin 58
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1=Flash Recovery Enabled0=Flash Recovery Disabled
Bat2 = Amber LEDBat1 = Green LED
Flash write protect bottom 4Kof internal bootblock flash
low=write protected
20mA drive pins
R1752 no stuff when doingflash recovery
Net & Part AMT Intel Non-AMT Broacom
3.3V_M_PWRGD
CH_RSMRST#
M_ON
R238
1.05V_1.25V_M_PWRGD
SIO_SLP_M#
LOM_CABLE_DETECT
LOM_LOW_PWR
LOM_SUPER_IDDQ
Pin24 of 5025
Pin23 of 5025
Pin15 of 5025
Pin24 of 5025
Pin37 of 5025
Pin25 of 5025
NC
NC
NC
NC
NC
NC
NC
NC
NC
Refer to UMA
Refer to UMA
Refer to UMA
Place R84 within 500 mils from SPI flash.Place R32 & R33 within 500 mils of theMEC5025.
Layout Note:
Populatefor flashcorruptionissue.
R398, R399, placeclose to M5025
R84 place close toFlash ROM
200 MIL SO8Flash ROM
R214 0_0402_5%~D
12
T36PAD~D
R69 100K_0402_5%~D
12
R161 8.2K_0402_5%~D
1 2
R21910K_0402_5%~D
12
C37
933
P_0
402_
50V
8J~D
1
2
R794 10K_0402_5%~D 12
T87 PAD~D
R3970_0402_5%~D
1 2
R789 2.7K_0402_5%~D@ 1 2
T37 PAD~D
R92100K_0402_5%~D
12
T39 PAD~D
R105 2.2K_0402_5%~D 1 2
R400 1M_0402_5%~D
1 2
R87 4.7K_0402_5%~D
1 2
R67 8.2K_0402_5%~D
12
T88 PAD~D
C38
522
P_0
402_
50V
8J~D
1
2
R387 2.7K_0402_5%~D 12
R111 2.2K_0402_5%~D 1 2
T34PAD~D
C820.1U_0402_16V4Z~D
1
2
C36
81U
_060
3_10
V4Z
~D 1
2
L6BLM18AG121SN1D_0603~D
1 2
R75 2.2K_0402_5%~D
1 2
C398
0.1U_0402_16V4Z~D
1 2
Y132.768K_12.5P_1TJS125DJ4A420P~D
14
23
R21310K_0402_5%~D
12
R162 8.2K_0402_5%~D
1 2
R81 2.2K_0402_5%~D
1 2
R21810K_0402_5%~D
12
R39615_0402_5%~D
@
1 2
R64 4.7K_0402_5%~D
1 2
R65 4.7K_0402_5%~D
1 2
R788 2.7K_0402_5%~D
1 2
R176 0_0402_5%~D 1 2
C814.7P_0402_50V8C~D
@
1
2
R66 8.2K_0402_5%~D
12
R85 4.7K_0402_5%~D
1 2
R62 2.2K_0402_5%~D
1 2
EC_FLASH_PAD @SHORT PADS~D
11
22
R730 4.7K_0402_5%~D
1 2
C74
4.7U
_060
3_6.
3V4Z
~D
1
2
R8415_0402_5%~D
1 2
R77 100K_0402_5%~D@ 1 2
C830.1U_0402_16V4Z~D
1
2
C80
0.1U_0402_16V4Z~D
12L24
BLM18AG121SN1D_0603~D
12
C790.1U_0402_16V4Z~D
1
2
R90
10K
_040
2_5%
~D
12
R39815_0402_5%~D
1 2
R101 0_0402_5%~D
1 2
R8310_0402_5%~D
@
12
R21010K_0402_5%~D
1 2
R39915_0402_5%~D
1 2
L3BLM18AG121SN1D_0603~D
1 2
R401 100K_0402_5%~D
1 2
R22
20_
0402
_5%
~D
12
U30
74AHC1G08GW_SOT353-5~D
@
IN11
IN22 G3
O 4
P5
T33PAD~D
C7610U_0805_10V4Z~D
1
2
R700_0402_5%~D
1 2
R801K_0402_5%~D
12
R63 2.2K_0402_5%~D
1 2
R76
1K_0402_5%~D
12
R104 100K_0402_5%~D@1 2
C750.1U_0402_16V4Z~D
1
2
R388 1M_0402_5%~D 12
R39
51M
_040
2_5%
~D
12
U23
M25P16-VMW6TP_SO8~D
CS#1SO2WP#3GND4
VCC 8HOLD# 7
SCLK 6SI 5
U22
MEC5025-NU_VTQFP128~D
KSO17/GPIOA1/AB1H_DATA12KSO16/GPIOA0/AB1H_CLK13GPIO5/KSO1514GPIO4/KSO1415KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225KSO5/GPIO127KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032
KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO7/BC_A_INT#38KSI1/GPIO6/BC_A_DAT39KSI0/SGPIO30/BC_A_CLK40
SGPIO34/A20M92OUT5/KBRST50
GPIO94/IMCLK75GPIO95/IMDAT76KCLK77KDAT78GPIOA6/EMCLK79GPIOA7/EMDAT80GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82
LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363CLKRUN#64SER_IRQ56
HSTCLK102HSTDATAIN105HSTDATAOUT107
FLCLK103FLDATAIN106FLDATAOUT108
GPIO80109GPIO81110
BC_CLK87BC_DAT86BC_INT#85
XTAL1122XTAL2124
XOSEL123
VC
C0
121
VC
C1
21V
CC
144
VC
C1
65V
CC
183
VC
C1
116
nFWP 84
GPIOA3/WINDMON 73
GPIO83/32KHZ_OUT 117
PWRGD 49
nRESET_OUT/OUT6 53
TEST_PIN 72
AG
ND
125
VR
_CA
P22
VS
S_P
LL10
1
VC
C_P
LL10
4
ALWON 120POWER_ SW_IN2#/GPIO23 119POWER_ SW_IN1#/GPIO22 126
POWER_ SW_IN0# 127ACAV_IN 128
BGPO0/GPIOA5 118
AB1B_CLK/GPIOA4 8AB1B_DATA/GPIOA2 7
AB1A_CLK 6AB1A_DATA 5
GPIO11/AB2_DATA 93GPIO12/AB2_CLK 94
GPIO13/AB1G_DATA 95GPIO14/AB1G_CLK 96
GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112
GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10
GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98
GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100
GPIO82/FAN_TACH3 43GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41
OUT2/PWM3 48OUT9/PWM2 47
OUT11/PWM1 46OUT10/PWM0 45
nEC_SCI/SPDIN2 66SGPIO45/MSDATA/SPDOUT2 55
SGPIO44/MSCLK/SPCLK2 54SGPIO46/SPDIN1 69
SGPIO47/SPDOUT1 68SGPIO31/TIN1/SPCLK1 67
SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71
SGPIO40 91SGPIO41 90SGPIO42 89SGPIO43 4
SGPIO35 1SGPIO36 (SFPI_EN) 2
SGPIO37 3
GPIO96/TOUT1 52
OUT7/nSMI 11nPWR_LED 115nBAT_LED 114
VS
S26
VS
S51
VS
S74
VS
S88
VS
S11
3
R93100K_0402_5%~D@
12
R526 100K_0402_5%~D
1 2
JDEBUGMolex_53261
@1 12 23 3
5 54 4
R86 4.7K_0402_5%~D
1 2
R211100K_0402_5%~D
12
C3690.1U_0402_16V4Z~D
1
2
R389 2.7K_0402_5%~D 12
R10
010
K_0
402_
5%~D
12
R7950_0402_5%~D
12
C1460.1U_0402_16V4Z~D@
1 2
R88 4.7K_0402_5%~D
1 2
T35PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO4
KSI0
KSO13
KSO11
KSO14
KSO12
KSI5
KSO5
KSO0
KSO3
KSO7
KSO9
KSI2
KSO8
KSO2
KSI6
KSI4KSI3
KSO1
KSO15
KSO10
KSI7
KSO6
KSI1
KSI6KSI7
DAT_TP_SIO
CLK_TP_SIO
TP_DATA
KSO16KSO17
KSO17
POWER_SW#
SP_X
R_CAP_LED#R_SCRL_LED#
R_NUM_LED#
SP_GND
POWER_SW#
SP_Y
KSO10KSO11KSO9KSO14KSO13KSO15KSO16KSO12KSO0KSO2KSO1KSO3KSO8KSO6KSO7KSO4KSO5KSI0KSI3KSI1KSI5KSI2KSI4
COEX3USBP7-
USBP5_D+USBP5_D-
SP_V+SP_Y
COEX2_WLAN_ACTIVESP_GND
TP_DATA
SP_X
TP_CLK
USBP7+BT_RADIO_DIS#
TP_CLK
USBP5_D-
USBP5_D+
KYBD_DET#
SP_V+
SP_YSP_V+SP_XSP_GND
+5V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+3.3V_ALW
+3.3V_RUN
KSI[0..7]37
KSO[0..17]37
R_SCRL_LED#43
CLK_TP_SIO 39
DAT_TP_SIO 39
POWER_SW#18,39R_NUM_LED#43R_CAP_LED#43
LID_CL#38
BT_RADIO_DIS# 38
COEX2_WLAN_ACTIVE34
USBP7+23
COEX1_BT_ACTIVE34
USBP7-23
BT_ACTIVE 34,43
KYBD_DET#37
USBP5-23
USBP5+23
TP_DET#39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
INT KB
40 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Power Switch
Touch PAD
C21
00.
047U
_040
2_16
V4Z~
D
1
2
C37
4 100P
_040
2_50
V8J~
D
@
1
2
C38
4 100P
_040
2_50
V8J~
D
@
1
2
C39
4 100P
_040
2_50
V8J~
D
@
1
2
R4100_0402_5%~D 1 2
D39
DA
204U
_SO
T323
~D@
2 31
C37
7 100P
_040
2_50
V8J~
D
@
1
2
C43
00.
1U_0
402_
16V4
Z~D
1
2
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN
PWR_SW@SHORT PADS~D
11 2 2
C37
8 100P
_040
2_50
V8J~
D
@
1
2
R4070_0402_5%~D 1 2
C38
3 100P
_040
2_50
V8J~
D
@
1
2
C39
6 100P
_040
2_50
V8J~
D
@
1
2
C42
40.
1U_0
402_
16V4
Z~D
1
2
C37
1 100P
_040
2_50
V8J~
D
@
1
2
R22
84.
7K_0
402_
5%~D
12
C39
2 100P
_040
2_50
V8J~
D
@
1
2
C39
5 100P
_040
2_50
V8J~
D
@
1
2
C39
910
P_0
402_
50V8
J~D
1
2
C39
1 100P
_040
2_50
V8J~
D
@
1
2
C39
7 100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC02000870L H-CONN SET ZJXMB-LCD 14 WXGA+(-2ch)
LVDS cable
JKYBRD
FOX_GS12403-0001K-8F~D
11
33
55
77
1111
99
1313
1515
1717
1919
2121
2323
2525
2727
2929
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
30303131323233333434
35 3536 3637 3738 3839 3940 40
GND 41GND 42
R11
910
K_04
02_5
%~D
12
T4 PAD~D
D38
DA
204U
_SO
T323
~D@
2 31
C38
9 100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC000001Q0L PCMCIA TYCO1759096-1
PCMCIA BODY
C367100P_0402_50V8J~D
@
1
2
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-110P H5.9 SMART
SM CARD BODY
Part Number Description
DC02000CS0L H-CONN SET ZGXMB-MDC
MDC wire set cableD40
DA
204U
_SO
T323
~D@
2 31
C41
9
33P
_040
2_50
V8J~
D
1
2C
387 10
0P_0
402_
50V8
J~D
@
1
2
C38
8 100P
_040
2_50
V8J~
D
@
1
2
C87
10P
_040
2_50
V8J~
D
1
2
C37
6 100P
_040
2_50
V8J~
D
@
1
2
L4DLW21SN900SQ2_0805~D
@
11
44 3 3
2 2
C37
3 100P
_040
2_50
V8J~
D
@
1
2
C10
310
0P_0
402_
50V8
J~D
1
2
C39
0 100P
_040
2_50
V8J~
D
@
1
2
C38
1 100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak
JTPAD
FOX_HT1315F-P2~D
11 2 233 4 455 6 6
8 810 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 30
77991111131315151717191921212323252527272929G131 G2 32
R24
910
K_04
02_5
%~D 1
2
Part Number Description
GC20323MX00 BATT CR2032 3V220MAH MAXELL
RTC BATTC
380 10
0P_0
402_
50V8
J~D
@
1
2
C1020.1U_0402_16V4Z~D
1
2
R575100K_0402_5%~D
12
C42
60.
1U_0
402_
16V4
Z~D
1
2
C78
100P
_040
2_50
V8J~
D
@
1
2
R22
94.
7K_0
402_
5%~D
12
C38
6 100P
_040
2_50
V8J~
D
@
1
2
C42
30.
1U_0
402_
16V4
Z~D
1
2C
382 10
0P_0
402_
50V8
J~D
@
1
2
L26BLM18AG601SN1D_0603~D
1 2
C39
3 100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC02000840L H-CONN SET ZJXMB-B/T-TP-FP
T/P wire set cable
C37
2 100P
_040
2_50
V8J~
D
@
1
2
C40
010
P_0
402_
50V8
J~D
1
2
L25BLM18AG601SN1D_0603~D
1 2
D37DA204U_SOT323~D
@
2 31
C37
5 100P
_040
2_50
V8J~
D
@
1
2
C86
10P
_040
2_50
V8J~
D
1
2
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD14 WXGA+(-1ch)
LVDS cable
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_5V#
SUS_ON
SUS_ON_5V#
RUN_ON_5V#
N21917830
RUN_ENABLE
SUS_ENABLE
SUS_ON_3.3V#
SUS_ON_3.3V#
+15V_ALW
+3.3V_ALW2
+5V_ALW
+5V_RUN
+15V_ALW
+3.3V_ALW2
+1.5V_RUN +0.9V_DDR_VTT+3.3V_RUN+5V_RUN
+PWR_SRC+PWR_SRC
+5V_ALW+5V_SUS
+1.8V_RUN
+1.8V_RUN+1.8V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW2
+15V_ALW
+3.3V_ALW2
+15V_ALW
+3.3V_ALW+3.3V_SUS
+3.3V_ALW2
+15V_ALW
+1.25V_RUN+1.8V_SUS +5V_SUS +3.3V_SUS
RUN_ON19,37,39,42,51
SUS_ON39,42
ENAB_3VLAN 28
AUX_ON39
1.8V_RUN_ON39
3.3V_RUN_ON39
3.3V_SUS_ON39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
POWER CONTROL
41 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5VRUN Source
DC/DC Interface +5VSUS Source
+1.8V_RUN Source
+3.3V_RUN Source
+3VSUS Source
Discharg Circuit Discharg Circuit
Q52SI4810BDY-T1-E3_SO8~D
365
78
2
4
1
G
D
S Q61
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R63
41K
_040
2_5%
~D
@
12
S
GD
Q80SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
G
D
S Q72
2N70
02W
-7-F
_SO
T323
-3~D
2
13
G
D
S
Q49
2N70
02W
-7-F
_SO
T323
-3~D
2
13
G
D
SQ602N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q872N7002W-7-F_SOT323-3~D
2
13
R11
81K
_040
2_5%
~D
@
12
G
D
S Q62
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R11
31K
_040
2_5%
~D @
12
R699100K_0402_5%~D
12
R76220K_0402_5%~D
12
C81
610
U_0
805_
10V4
Z~D
1
2
C1940.047U_0402_16V4Z~D
1
2
G
D
S Q63
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R621100K_0402_5%~D
12
R63
020
K_04
02_5
%~D
12
R617100K_0402_5%~D
12
G
D
SQ892N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q652N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q882N7002W-7-F_SOT323-3~D
2
13
R72
91K
_040
2_5%
~D
@
12
G
D
S
Q30
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
C20
847
00P_
0402
_25V
7K~D
1
2
Q10SI4810DY-T1-E3_SO8~D@
365
78
2
4
1
C144470P_0402_50V7K~D @
1
2
D35RB751V_SOD323~D
@
21G
D
SQ532N7002W-7-F_SOT323-3~D
2
13
R624100K_0402_5%~D
12
R62
020
K_04
02_5
%~D
12
R765100K_0402_5%~D
12
G
D
S Q81
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
G
D
S
Q92
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R70
120
0K_0
402_
5%~D
12
C81
110
U_0
805_
10V4
Z~D
1
2
Q58SI4336DY-T1-E3_SO8~D
365
78
2
4
1
C81
410
U_0
805_
10V4
Z~D
1
2
R70
047
0K_0
402_
5%~D
12
Q54SI4336DY-T1-E3_SO8~D
365
78
2
4
1
G
D
S
Q512N7002W-7-F_SOT323-3~D
2
13
R62520K_0402_5%~D
12
R4130_0402_5%~D
1 2
C14
310
U_0
805_
10V4
Z~D
1
2
R63
210
0K_0
402_
5%~D
12
G
D
S
Q93
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R63
31K
_040
2_5%
~D
@
12
G
D
S
Q902N7002W-7-F_SOT323-3~D
2
13
C81
910
U_0
805_
10V4
Z~D
1
2
R637100K_0402_5%~D
12
C14
247
00P_
0402
_25V
7K~D
@
1
2
G
D
SQ732N7002W-7-F_SOT323-3~D
2
13
R766100K_0402_5%~D
12
Q47SI4810BDY-T1-E3_SO8~D
365
78
2
4
1
D36RB751V_SOD323~D
@
21
G
D
S Q552N7002W-7-F_SOT323-3~D
2
13
R3050_0402_5%~D
1 2
R62
820
K_04
02_5
%~D
12
G
D
S
Q91
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
R623100K_0402_5%~D
12
R698100K_0402_5%~D
12
C81
547
00P_
0402
_25V
7K~D
1
2
R641100K_0402_5%~D
12
R764100K_0402_5%~D
12
R63
61K
_040
2_5%
~D
@
12
R15
175
_060
3_5%
~D
@
12
R63
51K
_040
2_5%
~D
@
12
R11
71K
_040
2_5%
~D@
12
G
D
S Q64
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
C1954700P_0402_25V7K~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUNPWROK
IMVP_PWRGD
RESET_OUT#
3VRUNRC
ICH_PWRGD
ICH_PWRGD#
+3.3V_ALW+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+5V_ALW
+1.8V_SUS
+3.3V_ALW
+5V_RUN
+1.8V_RUN
+3.3V_RUN
+3.3V_ALW+3.3V_ALW
+5V_ALW
+3.3V_SUS
+5V_SUS
+3.3V_ALW
RUN_ON19,37,39,41,51
SUSPWROK 18
RUNPWROK 38,39,48,54
RESET_OUT#39
IMVP_PWRGD23,39,48
ICH_PWRGD# 18
ICH_PWRGD 10,23
SUS_ON39,41
1.5V_RUN_PWRGD47
2.5V_RUN_PWRGD18
1.05V_RUN_PWRGD47
GFX_CORE_PWRGD51
5V_3V_1.8V_1.25V_RUN_PWRGD 38
3.3V_5V_SUS_PWRGD
1.25V_RUN_PWRGD51
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Power Good
42 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R82
200K
_040
2_5%
~D
12
R1344.7K_0402_5%~D
1 2
C4580.1U_0402_16V4Z~D 1 2
R13
520
0K_0
402_
5%~D
12
C470.1U_0402_16V4Z~D
1
2
U27A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
U12C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4
D27
RB751V_SOD323~D
2 1
D26
RB751V_SOD323~D
2 1
R13
920
0K_0
402_
5%~D
12
C490.1U_0402_16V4Z~D
1
2E
B
CQ86MMST3904-7-F_SOT323-3~D
2
31
C192200P_0402_50V7K~D
1
2
R1334.7K_0402_5%~D
1 2
U27D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
R15
720
0K_0
402_
5%~D
12
C460.1U_0402_16V4Z~D
1
2
R207 0_0402_5%~D
12
EB
CQ85MMST3904-7-F_SOT323-3~D
2
31
U12B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4C134
0.01U_0402_16V7K~D
1
2
C272200P_0402_50V7K~D
1
2
U48B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4
C1350.1U_0402_16V4Z~D 1 2
C1990.1U_0402_16V4Z~D
1
2
R486 0_0402_5%~D
1 2
D23RB751V_SOD323~D
2 1
R15910K_0402_5%~D
1 2
R185 0_0402_5%~D 12
R36410K_0402_5%~D
1 2
C
BE
Q26MMBT3906WT1G_SC70-3~D
1
2
3
G
D
S
Q172N7002W-7-F_SOT323-3~D
2
13
U27C74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R16010K_0402_5%~D
1 2
R68
200K
_040
2_5%
~D
12
R79100K_0402_5%~D
12
U12A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
D31RB751V_SOD323~D
2 1
C172200P_0402_50V7K~D
1
2
C
BE
Q20MMBT3906WT1G_SC70-3~D
1
2
3
EB
CQ84MMST3904-7-F_SOT323-3~D
2
31
D32
RB751V_SOD323~D
2 1
U27B74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
C
BE Q77
MMBT3906WT1G_SC70-3~D
1
2
3
D33RB751V_SOD323~D
2 1
C4570.1U_0402_16V4Z~D
1
2
R1644.7K_0402_5%~D
1 2
C42
222
00P_
0402
_50V
7K~D
1
2
R13220K_0402_5%~D
12
D25
RB751V_SOD323~D
2 1
R208 0_0402_5%~D
12
R136200K_0402_5%~D
12
C1860.1U_0402_16V4Z~D
1 2
R33410K_0402_5%~D
1 2
C40
422
00P_
0402
_50V
7K~D
1
2
R216 0_0402_5%~D@12
R61
620
0K_0
402_
5%~D
12
C
BE Q78
MMBT3906WT1G_SC70-3~D
1
2
3
C
BE Q79
MMBT3906WT1G_SC70-3~D
1
2
3R36710K_0402_5%~D
1 2
R15
820
0K_0
402_
5%~D
12
R4180_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
R_MPCI_ACT
BAT2_LED#
BATT_AMBER_LED
R_BT_ACT
SNIFFER_G
SNIFFER_Y
BT_ACTIVE
Z401
2
COINCELL
SATA_ACT#
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+3.3V_RUN
+3.3V_ALW
+COINCELL
+RTC_CELL
+COINCELL
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN+RTC_CELL
+3.3V_RUN
+3.3V_SUS+3.3V_RTC_LDO
+3.3V_RUN
+3.3V_WLAN BREATH_LED39
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
SNIFFER_PWR_SW#39
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
R_BT_ACT 32BT_ACTIVE34,40
R_PIDEACT 36
HDD_LED 32
LED_MASK#38
SATA_ACT#_R22
LED_MASK#38
SNIFFER_YELLOW#39
SNIFFER_GREEN#39
WIRELESS_ON/OFF#38
BREATH_GREEN_LED 32
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.4
PAD and Standoff
43 66Thursday, March 01, 2007
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
COIN RTC Battery
This circuit isonly needed if theplatform has theSNIFFER.
G
D
SQ29BSS138W-7-F_SOT323~D
2
13
FD19
FIDUCIAL MARK~D
1
FD14
FIDUCIAL MARK~D
1
H5@H_C236B315D110
1
FD7
FIDUCIAL MARK~D
1
FD11
FIDUCIAL MARK~D
1
U43
NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3
H2H_C146B217D91
1
R1790_0402_5%~D
1 2
H1H_C146B217D91
1
R18
010
0K_0
402_
5%~D
12
H9@H_C236B315D110
1
Q22PDTA114EU_SC70-3~D 2
13
Q1PDTA114EU_SC70-3~D 2
13
D13BAT54CW_SOT323~D
32
1
C
BE
Q18MMBT3906WT1G_SC70-3~D 1
2
3
FD13
FIDUCIAL MARK~D
1
CLIP3EMI_CLIP
GND1
JSNIFF
1BS008-13130-7F_4P~D
11
22
33
44
55
66
FD3
FIDUCIAL MARK~D
1
C3701U_0603_10V4Z~D
1
2
FD18
FIDUCIAL MARK~D
1
FD16
FIDUCIAL MARK~D
1
FD10
FIDUCIAL MARK~D
1
H12@H_C315D118
1FD6
FIDUCIAL MARK~D
1
H18@H_C217D91
1
H14@H_C291B236D118
1
R63847K_0402_5%~D
12
R224330_0402_5%~D
12
H11@H_C315B236D118
1
R102100K_0402_5%~D
12
R2121K_0402_5%~D 1 2
H13@H_C315D118
1
CLIP4EMI_CLIP
GND 1
R226330_0402_5%~D
12
FD23
FIDUCIAL MARK~D
1
H26@H_C472D376
1
R71100_0402_5%~D
1 2
FD12
FIDUCIAL MARK~D
1
FD24
FIDUCIAL MARK~D
1
H15@H_C295D118
1
R15
150_0402_5%~D
1 2
FD20
FIDUCIAL MARK~D
1
JCOIN
MOLEX_53398-0271~D
1122
R145330_0402_5%~D
1 2
FD2
FIDUCIAL MARK~D
1FD5
FIDUCIAL MARK~D
1
H17@H_C217B276D98
1
R63910K_0402_5%~D
1 2
CLIP6EMI_CLIP
GND 1
Y
G
D14
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
CLIP1EMI_CLIP
GND 1
H3@H_C315D110
1H20
@H_C217B276D98
1
C
BE
Q5MMBT3906WT1G_SC70-3~D 1
23
H27@H_C472D431X376
1
R9710K_0402_5%~D@
12
H6@H_C236B256D110
1
FD15
FIDUCIAL MARK~D
1
FD4
FIDUCIAL MARK~D
1
R1400_0402_5%~D @
1 2
H19@H_C217D91
1
R211K_0402_5%~D
12
Q28PDTA114EU_SC70-3~D 2
13
Q32PDTA114EU_SC70-3~D 2
13
R261 220_0402_5%~D
1 2
FD21
FIDUCIAL MARK~D
1
R262 220_0402_5%~D
1 2
FD8
FIDUCIAL MARK~D
1
R225330_0402_5%~D
12
H8@H_C217B276D98
1
Q33PDTA114EU_SC70-3~D 2
13
FD22
FIDUCIAL MARK~D
1
R6
220_0402_5%~D
1 2
H4H_C256B63D47
1
R7410K_0402_5%~D
1 2
FD25
FIDUCIAL MARK~D
1
R181100K_0402_5%~D@
12
R9
220_0402_5%~D
1 2
H10@H_C236B315D110
1
H7@H_C236B315D110
1
FD9
FIDUCIAL MARK~D
1
H16@H_C217B276D98
1
CLIP2EMI_CLIP
GND1
G
DS
Q23BSS138W-7-F_SOT323~D
2
13
Q4PDTA114EU_SC70-3~D 2
13
R7810K_0402_5%~D
12
H30@H_O115X31D115X31N
1
H28@H_O115X31D115X31N
1
H29@H_O115X31D115X31N
1
FD1
FIDUCIAL MARK~D
1
FD17
FIDUCIAL MARK~D
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DC_IN
-DCIN_JACK
Z4301Z4302Z4303
Z4304Z4305Z4306
+DCIN_JACK
+3.3V_ALW+5V_ALW
+5V_ALW
+DC_IN_SS
+5V_ALW
PBATT+
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
SBATT+
+DC_IN
PS_ID 39
PSID_DISABLE# 38
PBAT_PRES# 38PBAT_SMBDAT 39
PBAT_ALARM#
PBAT_SMBCLK 39
SBAT_ALARM#
SBAT_PRES# 38,50SBAT_SMBDAT 39SBAT_SMBCLK 39
DOCK_PSID36
AC_OFF39
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.0
+DCIN
44 66Thursday, March 01, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARYTHESE CAPS MUST BENEXT TO JCHG
DC_IN+ SourceZ-series AC AdaptorConnctor
ESD Diodes
Secondary Battery Connector
ESD Diodes
Primary Battery Connector
GPIO Input from EC
PD
58V
Z060
3M26
0APT
_060
3
@
1
2
PR
1015
K_0
402_
1%~D
1
2
PC
231
2200
P_0
402_
50V7
K~D
12
PR
124.
7K_0
805_
5%
12
PR
300
10K
_040
2_5%
~D
12
PD10DA204U_SOT323~D @
231
PR
610
0K_0
402_
1%~D
12
PD53SM24_SOT23
@ 2 3
1
PD44DA204U_SOT323~D @
231
PR
710
K_0
402_
1%~D
12
PC
397
0.1U
_060
3_25
V7K
~D
@
12
TYCO_1566065-2~DPJPDC1
Low_PWR 1
DC+_1 2
DC+_2 3
DC-_1 4
DC-_2 5GND_16
GND_27
GND_38
GND_49
MH
1M
H2
PR301100_0402_5%~D
1 2
PJP60
PAD-OPEN 4x4m
1 2
PQ3FDS6679AZ_SO8~D
3 6
5
78
2
4
1
PL32FBMA-L18-453215-900LMA90T_1812~D
1 2
PQ100AIMD2AT-108_SC74-6~D
@
5
16
PR346
0_0402_5%~D
@1 2
PD43DA204U_SOT323~D @
231
PC
40.
1U_0
603_
25V
7K~D
12
PR299
10K_0402_5%~D @
1 2
PR21100_0402_5%~D
1 2
PC
230
0.1U
_060
3_25
V7K
~D
12
PD9DA204U_SOT323~D @
231
PL2FBCA-K5B-302340-L1-T_1812~D
1 2
PL1BLM18BD102SN1D_0603~D
12
PD45DA204U_SOT323~D @
231
PR
1347
K_0
402_
1%~D
12
PC
30.
1U_0
603_
25V
7K~D 1
2
PC
20.
47U
_080
5_25
V7k
12
PR20100_0402_5%~D
1 2
PR
11
240K
_040
2_5%
~D
12
PL34FBCA-K5B-302340-L1-T_1812~D
1 2
PD42DA204U_SOT323~D @
231
PJP61
PAD-OPEN 4x4m
1 2
PR18433_0402_5%~D 1 2
PR302100_0402_5%~D
1 2
PBATT1
SUYIN_200277MR009G506ZR~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
EB
CPQ2MMST3904-7-F_SOT323~D
2
31
PL6FBMA-L18-453215-900LMA90T_1812~D 1 2
PD
2D
A20
4U_S
OT3
23~D
231
PR
1910
K_0
402_
1%~D
12
PR
22.
2K_0
402_
5%~D
12
PR
495
0_04
02_5
%~D
@
12
PD
59V
Z060
3M26
0APT
_060
3
@
1
2
PC
6
10U
_120
6_25
V6M
~D
1
2
PC
90.
1U_0
603_
25V
7K~D
12
PD11DA204U_SOT323~D @
231
PR22100_0402_5%~D
1 2
PD
41D
A20
4U_S
OT3
23~D
@
231
PR23100_0402_5%~D
1 2
PR303100_0402_5%~D
1 2
PQ100BIMD2AT-108_SC74-6~D
@
2
43
PJP1
TYCO_1734077-1~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
PC
50.
1U_0
603_
25V
7K~D
12
PD12DA204U_SOT323~D @
231
PR304100_0402_5%~D
1 2
G
D S
PQ1
FDV301N_SOT23~D
2
1 3
PC
1022
00P
_040
2_50
V7K~
D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5V_ALW_BOOT
+5V_ALW_UGATE
+3.3V_ALW_LGATE
+3.3V_ALW_UGATE+3.3V_ALW_PHASE
EN_3V_5VEN_3V_5V
POK2
POK2
+3.3V_ALW_BOOT
EN
_3V
_5V
+15V_ALWP
+5V_ALW_LGATE
+5V_ALW_PHASE
POK1
POK1
+5V_ALWP
+3.3V_ALWP
+PWR_SRC
+5V_ALWP
+5V_VCC1
+3.3V_ALWP
+3.3V_ALWP
+15V_ALW
+5V_ALW+5V_ALWP
+3.3V_ALW
+5V
_ALW
2
+5V_ALWP
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALWP
GNDA_3V5V
+5V_ALW2
+DC1_PWR_SRC
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALW2
ALWON39
THERM_STP#18
ALW_PWRGD_3V_5V 39,46
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.0
DC/DC +3V/ +5V
45 66Thursday, March 01, 2007
Compal Electronics, Inc.
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
5 Volt +/-5%Thermal Design Current:6.2APeck current: 8.8A OCP min: 10.52A
3.3 Volt +/-5% Thermal Design Current:9.0APeak current: 12.9A OCP min:15.79A
PR517 0_0402_5%~D
12
PC
292
0.1U
_040
2_10
V7K
~D
12
PQ82FDS8880_NL_SO8~D
S3
D6
D5
D7
D8
S2
G 4
S1
PD55S SCH DIO BAT54SW-7-F SOT323-3
2
31
PC
275
0.1U
_080
5_50
V7K
12
PD57BAT54CW_SOT323~D
3 2
1
PR397200K_0402_1%~D
12
PL37
3.0U_HMP1362-3R0-R_17A~D
12
PR
394
200K
_040
2_5%
12
PR501
0_0402_5%~D
@12
PD56S SCH DIO BAT54SW-7-F SOT323-3
2
31
+
PC
289
330U
_D3L
_6.3
VM
_R25
~D
1
2
PC
279
0.1U
_080
5_50
V7K
12
PQ85
FDS6676AS_NL_SO8~D4
7 865
123
PR3922K_0402_5%~D
12
PJP35
PAD-OPEN1x1m
12
PC
278
2200
P_0
402_
50V7
K~D
12
PR
384
0_04
02_5
%~D
@ 12
PR382267K_0402_1%
1 2
PR37610_0603_5%~D
@
12
PJP33
PAD-OPEN 4x4m
1 2
PC
281
10U
_120
6_25
V6M
~D
1
2
PC
277
10U
_120
6_25
V6M
~D
1
2
PR5000_0402_5%~D
@
1 2
PJP36
PAD-OPEN 4x4m
1 2
PR499
0_0402_5%~D12
PR383150K_0402_1%~D
1 2
PC
291
0.1U
_040
2_10
V7K
~D
12
PJP34
PAD-OPEN1x1m
1 2
PU20ISL6236IRZA_QFN32~D
RE
F1
TON
2V
CC
3E
N_L
DO
4V
RE
F35
VIN
6LD
O7
LDO
RE
FIN
8
BYP9OUT110FB111ILIM112POK113EN114UGATE115PHASE116
BO
OT1
17LG
ATE
118
PV
CC
19S
EC
FB20
GN
D21
PG
ND
22LG
ATE
223
BO
OT2
24
PHASE2 25UGATE2 26EN2 27POK2 28SKIP# 29OUT2 30ILIM2 31REFIN2 32
PA
D33
PR
375
0_08
05_5
%1
2
PC
285
0.1U
_060
3_25
V7K
~D
12
PR3871_0603_5%~D
1 2
PC
284
0.1U
_060
3_25
V7K
~D1
2
PR
389
0_04
02_5
%~D
@
12
PR
390
100K
_040
2_1%
~D
@ 12
PC
287
0.1U
_060
3_25
V7K
~D 1
2
PR3800_0402_5%~D1 2
PQ83BSC079N03S G_PG-TDSON-8~D
S3
S2
G4
S1
D5
PC
283
1U_0
603_
10V
6K~D
12
PR
374
0_08
05_5
%
12
PC
296
0.1U
_060
3_25
V7K
~D
12
PC
294
0.1U
_060
3_25
V7K
~D
12
PR
388
0_04
02_5
%~D
12
PC2950.1U_0603_25V7K~D
1 2
PJP63
PAD-OPEN1x1m
1 2
+
PC
290
330U
_D3L
_6.3
VM
_R25
~D
1
2
PC
288
0.1U
_060
3_25
V7K
~D
12
PL364.7U_HMU1356-4R7-R_10A~D
1 2
PC2860.1U_0603_25V7K~D
1 2
PC
274
2200
P_0
402_
50V7
K~D
12
PQ84
FDS6676AS_NL_SO8~D 4
78 6 5
1 2 3
PC
276
10U
_120
6_25
V6M
~D
1
2
PR3790_0402_5%~D@
1 2
PC
282
4.7U
_080
5_6.
3V6K
12
PR3861_0603_5%~D
1 2
PC
386
0.1U
_040
2_10
V7K
~D @
12
PR3950_0402_5%~D
12
PC
385
0.1U
_040
2_10
V7K
~D
@
12
PJP37
PAD-OPEN 4x4m
1 2
PR
393
0_04
02_5
%~D
12
PR
385
0_04
02_5
%~D 1
2
PC
280
10U
_120
6_25
V6M
~D
1
2
PC
403
1U_0
603_
10V
6K~D
12
PC2930.1U_0603_25V7K~D
1 2
PR
398
39.2
K_0
402_
1%~D
12
PR
391
100K
_040
2_1%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ISL88550_LX
ISL88550_REF
ISL88550_ILIM
ISL88550_FB
ISL88550_REFIN
ISL88550_DH
+1.8VSUSP_L
ISL88550_AVDD
ISL8
8550
_AV
DD
+1.8V_SUSP
+1.8V_SUSP
+1.8V_SUSP
+5V_ALW
+1.8V_SUS
+PWR_SRC
+0.9V_DDR_VTTP
+3.3V_ALW
+1.8V_SUSP
+0.9V_DDR_VTTP +0.9V_DDR_VTT
+DDR_PWR_SRC
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
GNDA_DDR
V_DDR_MCH_REF
1.8V_SUS_PWRGD 39
DDR_ON 39
0.9V_DDR_VTT_ON 39
ALW_PWRGD_3V_5V39,45
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.0
+1.8VSUSP/ +0.9V_DDR_VT
46 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
Design current 0.7A for +0.9V_DDR_VTTPPeak current 1A for +0.9V_DDR_VTTP
+1.8VSUSP/ +0.9V_DDR_VTTDDR2 Termination
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PR193, PD20 are only used with the second-source MAX8632.
1.8 Volt +/-5%Thermal Design Current:7.6APeck current: 10.9A OCP min: 11.09A
PC
570.
1U_0
603_
25V
7K~D
12
PC680.22U_0603_10V7K~D
1 2
PC
401
1000
P_0
402_
50V7
K~D
@
12
PQ34FDS8880_NL_SO8~D
S3
D6
D5
D7
D8
S2
G 4S
1
+
PC
7133
0U_D
2E_2
.5V
M_R
15~D
1
2
PR2120_0402_5%~D
12
PC
5610
U_1
206_
25V
6M~D
1
2
PC14610U_0805_6.3V6M~D
1
2
PR5050_0402_5%~D
@
12
PQ11
FDS6676AS_NL_SO8~D 4
78 6 5
1 2 3
PU6
ISL88550A_TQFN28~D
SK
IP25
VD
D22
PGND123
LX19
AV
DD
26
REF3
TON1
OV
P/ U
VP
2
SS
8
GN
D24
POK1 5
POK2 6
VTT 12
STBY 7
TP0
28
VOUT16 REFIN 14
FB15
VTTR 10
ILIM
4
PGND2 11
DH18
DL21
VTTS 9
SHDN 27
VIN 17BST20
VTTI 13
GN
D29PR348
0_0402_5%~D1 2
PJP11
PAD-OPEN 4x4m
1 2
PR
518
0_04
02_5
%~D
12PC155
0.22U_0402_6.3V 5K~D
12
PR840_0402_5%~D @
12
PR
195
100K
_040
2_1%
~D
12
PR193
10_1206_5%~D12
PR
194
20K
_040
2_5%
~D1
2
+
PC
7033
0U_D
2E_2
.5V
M_R
15~D
1
2
PC
624.
7U_0
805_
6.3V
6K
12
PR73
1_0603_5%~D
12
PD
20R
B75
1V-4
0_S
OD
323~
D
@
21
PR
470
27.4
K_0
402_
1%
@
12
PC
720.
1U_0
402_
10V
7K~D
12
PC
153
10U
_080
5_6.
3V6M
~D
1
2
PR5060_0402_5%~D1 2
PC
157
10U
_080
5_6.
3V6M
~D
@
1
2
PC
631U
_060
3_10
V6K
~D
12
PJP32PAD-OPEN 4x4m1 2
PR
200
100K
_040
2_1%
~D
12
PC770.1U_0402_10V7K~D
12
PJP9PAD-OPEN 4x4m1 2
PJP10PAD-OPEN 4x4m1 2
PC
5822
00P
_040
2_50
V7K~
D
12
PR47117.4K_0402_1%~D@
12 PC66
1000P_0402_50V7K~D @
12
PC
154
10U
_080
5_6.
3V6M
~D
1
2
PC
5510
U_1
206_
25V
6M~D
1
2
PR202100K_0402_1%~D
12
PJP59
PAD-OPEN1x1m
12
PL141.4UH_HMU1350-1R4PF_15A_20%~D
1 2
3
PC641U_0603_10V6K~D
12
PR20420_0603_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.05V_UGATE
1.05V_LGATE
1.5V_UGATE
1.5V_LGATE
EN1 EN2POK2POK1
POK2
POK1
1.05V_PHASE
REFIN2_1_05
EN1
EN2
1.5V_PHASE
REF
+1.5V_RUN_P +1.5V_RUN
+5V_ALW
+1.5V_RUN_P
+1.05V_VCCP_P
+1.05V_VCCP_P +1.05V_VCCP
+5V_VCC2
+5V_VCC2
+3.3V_SUS
+PWR_SRC
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05VGNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
+DC2_PWR_SRC
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
+3.3V_RTC_LDO
1.05V_RUN_PWRGD 42
1.5V_RUN_PWRGD 42
1.05V_RUN_ON 38
1.5V_RUN_ON 39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.0
+1.5V_RUN / +1.05V_VCCP
47 66Thursday, March 01, 2007
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_RUN / +1.05V_VCCP / +3.3V_ALW / +3.3V_RTC_LDO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1.5 Volt +/-5% Thermal Design Current: 1.9AMaximum current: 2.7A OCP min: 3.04A
1.05 Volt +/-5%Thermal Design Current: 4.2APeack current: 6.1AOCP min: 9.61A
OK to Short if CADSystem can Support
DELL CONFIDENTIAL/PROPRIETARY
PQ89
SI4
810B
DY
-T1-
E3_S
O8~
D
S3
D6
D5
D7
D8
S2
G 4
S1
PR
400
0_08
05_5
%1
2
PJP39
PAD-OPEN 4x4m
1 2
PC
317
1U_0
603_
10V6
K~D
12
PC
304
2200
P_04
02_5
0V7K
~D
12
PR407 249K_0402_1%~D
1 2
+
PC
309
330U
_D2E
_2.5
VM_R
9
1
2
PL391UH_MPLC0730L1R0_11A_20%~D
1 2
PC
311
10U
_120
6_6.
3V7K
12
PJP40
PAD-OPEN 4x4m
1 2
PR519 0_0402_5%~D 12
PC
314
0.1U
_060
3_25
V7K~
D
12
PR
399
0_08
05_5
%
12
PR5040_0402_5%~D@
12
PC
387
0.1U
_040
2_10
V7K~
D
@
12
PC
299
0.1U
_060
3_25
V7K~
D
12
PC
305
0.1U
_060
3_25
V7K~
D
12
PC
388
0.1U
_040
2_10
V7K~
D
12
PC
389
0.1U
_040
2_10
V7K~
D
12
PC
302
10U
_120
6_25
V6M
~D
1
2
PQ88
FDS
6690
AS
_NL_
SO8~
D
365 7 8
2
4
1
PL403.3UH_MPL73-3R3_6A_20%~D
12
PC3060.1U_0603_25V7K~D
1 2
PR4121_0603_5%~D
1 2
PJP43
PAD-OPEN 4x4m
1 2
PU21ISL6236IRZA_QFN32~D
REF
1TO
N2
VCC
3EN
_LD
O4
VREF
35
VIN
6LD
O7
LDO
REF
IN8
BYP9OUT110FB111ILIM112POK113EN114UGATE115PHASE116
BOO
T117
LGAT
E118
PVC
C19
SEC
FB20
GN
D21
PGN
D22
LGAT
E223
BOO
T224
PHASE2 25UGATE2 26EN2 27POK2 28SKIP# 29OUT2 30ILIM2 31REFIN2 32
PAD
33
PR
410
0_04
02_5
%~D
@
12
PC
313
10U
_120
6_6.
3V7K
12
PC
303
0.1U
_060
3_25
V7K~
D
12
PR41310_0603_5%~D
@
12
PC
308
0.01
U_0
402_
25V7
K~D
12
PJP38
PAD-OPEN 4x4m
1 2
PJP42
PAD-OPEN 4x4m
1 2
PR408
100K_0402_1%~D1 2
PR4780_0402_5%~D 1 2
PR4010_0402_5%~D
12
PR
497
0_04
02_5
%~D
12
+
PC
310
330U
_D2E
_2.5
VM_R
9
1
2
PC
315
0.1U
_060
3_25
V7K~
D
12
PC
300
2200
P_04
02_5
0V7K
~D
12
PR
409
0_04
02_5
%~D
@
12
PC
297
10U
_120
6_25
V6M
~D
1
2
PR4050_0402_5%~D@1 2
PJP41
PAD-OPEN1x1m
12
PR5030_0402_5%~D@
12
PC
316
1U_0
603_
10V6
K~D
12
PQ86
SI4
800B
DY
-T1-
E3_S
O8~
D
S3
D6
D5
D7
D8
S2
G4
S1
PC
301
10U
_120
6_25
V6M
~D
1
2
PQ87
SI4
800B
DY
-T1_
SO8~
D
36 578
2
4
1
PR4111_0603_5%~D
1 2
+
PC
312
330U
_D2E
_2.5
VM_R
9
1
2
PR
415
100K
_040
2_1%
~D
@
12
PC
404
0.1U
_040
2_10
V7K~
D
@
12
PR
416
100K
_040
2_1%
~D
@ 12
PR
496
0_04
02_5
%~D
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
VO
UGATE1
UGATE2
UGATE3
VSUM
VO
VSUM
VSUM
VO
PHASE2
VO
VSUM
PHASE1
PHASE3
LGATE1
LGATE2
LGATE3
+5V_ALW
+5V_ALW
+CPU_PWR_SRC
+5V_ALW
+3.3V_RUN
+5V_ALW
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
+VCC_CORE
+CPU_PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+CPU_PWR_SRC
+VCC_CORE
+PWR_SRC
GNDA_VCORE
CLK_ENABLE#
GNDA_VCORE
VID08VID18VID28
VID48VID38
VID58VID68
H_DPRSTP#8,10,22
DPRSLPVR10,23
H_PSI#8
RUNPWROK38,39,42,54
VSSSENSE8
IMVP_PWRGD 23,39,42
IMVP6_PROCHOT#38
PWR_MON18
VCCSENSE8
IMVP_VR_ON39
PWR_MON 18
Title
Size Document Number R ev
Date: Sheet o fLA-3302P 0.0
+VCORE
48 66Thursday, March 01, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Iccmax=44AI_TDC=35AOCP=65A, Intel spec=50A
PR248
499_0402_1%~D
12
PR2450_0402_5%~D
12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR5130_0402_5%~D
12
PC
178
1U_0
603_
10V
6K~D
12
PC197
1000P_0402_50V7K~D
12
PC2430.22U_0603_10V7K~D
12
PC
249
0.1U
_060
3_25
V7K
~D
12
PR258
1.69K_0402_1%~D
12
PC4092200P_0402_50V7K~D
@
12
PR
480
0_04
02_5
%~D
@
12
PC
239
0.1U
_060
3_25
V7K
~D
12
PC
191
0.33
U_0
603_
10V
7K
1
2
PR
481
0_04
02_5
%~D
@
12
PC2000.22U_0603_10V7K~D
12
PR23010K_0402_1%~D
1 2
PR26910K_0402_1%~D
1 2
PR2400_0402_5%~D
12
PC
247
1500
P_0
603_
25V7
K~D
@
12
PQ
50
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PR2420_0402_5%~D
12
PR22810_0603_5%~D
12
PQ
42
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PC
272
10U
_120
6_25
V6M
~D 12
PR
516
1K_0
402_
1%~D
12
PL47FBMA-L18-453215-900LMA90T_1812~D
@
1 2
PR2430_0402_5%~D
12
PL290.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PR4870_0402_5%~D
12
PR509 0_0402_5%~D
12
PU11
ISL6260CCRZ_QFN40~D
VW8
PMON2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
GND41
PQ
57
IRF7
821T
RP
BF_
SO
8~D
G4
S3
S2
S1
D5
D6
D7
D8
PC
180
0.01
U_0
402_
25V
7K~D
12
PR4790_0402_5%~D@
12
PC
228
2200
P_0
402_
50V7
K~D
12
PC
229
0.01
U_0
402_
16V
7K~D
1
2
PR2707.68K_0805_1%~D
12
PR508226K_0402_1%~D@
12
PR25982.5K_0402_1%~D
12
PR2290_0603_5%~D
12
PR
482
30K
_040
2_5%
~D
@
12
PR33010K_0402_1%~D
1 2
PL310.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PC
177
10U
_120
6_25
V6M
~D
12
PC
270
10U
_120
6_25
V6M
~D1
2
PC213 1000P_0402_50V7K~D
12
PC
240
2200
P_0
402_
50V7
K~D
12
PR
290
0_06
03_5
%~D1
2
PR3280_0603_5%~D
12
PR26710.5K_0402_1%
12
PR23210_0402_1%~D
12
PR
485
13K
_040
2_5%
~D
@
12
PC
413
0.01
U_0
402_
16V
7K~D
12
PR257
332_0402_1%~D
12
PC
215
0.03
3U_0
402_
16V
7K~D
12
PC
193
10U
_120
6_25
V6M
~D1
2
PR2620_0603_5%~D
12
PC
224
2200
P_0
402_
50V7
K~D
12
PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC2501500P_0402_50V7K~D
1 2
PC
182
1U_0
603_
10V
6K~D
12
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@12
+
PC
380
100U
_25V
_M~D
1
2
PJP30
PAD-OPEN 4x4m
1 2
PL330.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PR
266
15K
_040
2_1%
~D
12
PR252
10K_0402_5%~D
12
PR
233
10_0
603_
5%~D
12
PC
260
0.1U
_040
2_16
V7K
~D
@1
2
PC214 1000P_0402_50V7K~D
12
PR2317.68K_0805_1%~D
12
PC
246
1500
P_0
603_
25V7
K~D
@
12
PR5150_0402_5%~D
12
PR2390_0402_5%~D
12
PR
263
4.53
K_0
402_
1%~D
12
PR249
0_0402_5%~D12
PR5140_0402_5%~D
12
PR486
4.99K_0402_1%@ 12
PR2840_0402_5%~D
@
12
PR
261
2.43
K_0
402_
1%~D
12
PC
227
0.1U
_060
3_25
V7K
~D
12
PR2646.34K_0402_1%~D
12
PH310KB_0603_1%_ERTJ1VG103FA~D
@
12
PC1870.015U_0402_16V7K~D
12
PC
223
0.1U
_060
3_25
V7K
~D
12
PR2341.91K_0603_1%~D
12
PR512
0_0402_5%~D
12
PR254 0_0402_5%~D@12
PC
411
4700
P_0
402_
25V7
K~D
@
12
PQ
56FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PH
2
S T
HE
RM
_ 6.
8K +
-5%
TS
M1A
682J
4302
RE
060
3
12
PC1790.22U_0603_10V7K~D
1 2
PR27110_0402_1%~D
12
PC195220P_0402_50V8J~D
1 2
PR3317.68K_0805_1%~D
12
PR287
0_0603_5%~D
12
PC190680P_0402_50V7K~D
1 2
PC
412
4700
P_0
402_
25V7
K~D
@
12
PR26011.5K_0402_1%~D
12
PC
196
1U_0
603_
10V
6K~D
12
PC2420.22U_0603_10V7K~D
1 2
PC1810.22U_0603_10V7K~D
12
PJP31
PAD-OPEN 4x4m
1 2
PR2681K_0402_1%~D
12
PQ
61FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PC1980.22U_0603_10V7K~D
1 2
PC
176
10U
_120
6_25
V6M
~D
12
PC
241
1U_0
603_
10V
6K~D
12
PQ
60FD
S70
88S
N3_
SO
8~D
G2
D3
S1
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR2410_0402_5%~D
12
PR2440_0402_5%~D
12
PC
248
1500
P_0
603_
25V7
K~D
@
12
PC
392
0.1U
_040
2_16
V7K
~D
@
1
2
PR32910_0402_1%~D
12
PC3911U_0603_10V6K~D
12
PC201
330P_0402_50V7K~D
12
PR238147K_0402_1%~D
12
PC
271
10U
_120
6_25
V6M
~D1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ISL88731_ICM
ISL88731_VREF
ISL88731_VDDP
ISL88731_VDDP
+VCHGR_L
ISL88731_VREF
ISL88731_ICM
+VCHGR_B
+VCHGR
+DC_IN_SS
+5V_ALW
CHAGER_SRC+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+5V_ALW
ACAV_IN18,39,50
ADAPT_OC 38
ADAPT_TRIP_SET38
THRM_SMBDAT18,39
THRM_SMBCLK18,39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.0
Charger
49 66Thursday, March 01, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin DetectorHigh 17.9 VLow 17.24 V
Maximum charging current is 6.24A
PC
267
3300
PF_0
402_
50V7
K~D
@
12
PR361
8.45K_0402_1%~D
1 2
PC
212
0.01
U_0
402_
25V7
K~D
@
12
PR
341
15.8
K_04
02_1
%~D
12
PC
128
0.1U
_060
3_25
V7K~
D
@
12
PR1380.01_2512_1%~D
4
2
1
3
PC
203
0.1U
_060
3_25
V7K~
D
12
PU19BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PR14349.9K_0402_1%~D
12
PR
367
100K
_040
2_5%
~D1
2
PC
103
2200
P_04
02_5
0V7K
~D
12
PJP62
PAD-OPEN 4x4m
1 2
PC
105
10U
_120
6_25
V6M
~D
1
2
PR1450.01_2512_1%~D
4
2
1
3
PR3600_0603_1%~D
12
PC2021U_0603_10V6K~D
1 2PU8
ISL88731_TQFN28~D
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA9
ICM8
NC
1
DCIN22
ACIN2
VDDSMB11
SCL10
ACOK13
NC14
BOOT 25
NC 16
ICOMP4
VDDP 21
VCC 26
CSS
P28
CSON 17
PGND 19
LGATE 20
VCOMP6
NC5
CSS
N27
VREF3
NC7
GND12
GND29
PC
254
0.1U
_040
2_16
V7K~
D
12
PU19ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
PC
122
1U_0
603_
10V6
K~D
@
12
PR
472
10_0
402_
1%~D
1
2P
R36
610
0K_0
402_
1%~D 1
2
PR2750_0603_5%~D
1 2PC110
0.01U_0402_25V7K~D
12
PC253220P_0402_50V7K~D
@
1
2
PD
40R
B75
1V_S
OD
323~
D
@ 21
PC
113
10U
_120
6_25
V6M
~D
1
2
PC
127
2200
P_04
02_5
0V7K
~D
@
12
G
D
SPQ81RHU002N06_SOT323
2
13
PR142215K_0402_1%
12
PC
256
100P
_040
2_50
V8K
12
PC383
0.22U_0402_6.3V6K
1 2
PR
364
105_
0402
_1%
~D 12
PC
393
0.01
U_0
402_
25V7
K~D
12
PC
120
0.1U
_040
2_10
V7K~
D
@
12 P
C11
410
U_1
206_
25V6
M~D
1
2
PC
118
0.01
U_0
402_
25V7
K~D
12
PC2210.1U_0402_10V7K~D
12
PR
363
13K_
0402
_1%
12
PR
362
57.6
K_04
02_1
%~D
12
PR3680_0603_5%~D
1 2
PR373
1K_0603_1%~D
@12
PC
121
0.1U
_040
2_10
V7K~
D
@
12
1SS
355_
SOD
323~
DP
D54
@
21
PC
104
0.1U
_060
3_25
V7K~
D
12
PQ79
SI4
800B
DY
-T1_
SO8~
D
365 7 8
2
4
1
PQ76SI4810BDY_SO8~D
365 7 8
2
4
1
PQ75
SI4
800B
DY
-T1_
SO8~
D
365 7 8
2
4
1
PR3651M_0402_1%~D 1 2
PR27433_0603_1%~D
12PR
149
10K_
0402
_1%
~D1
2
PC1021U_0805_25V4Z~D
12
PC
106
10U
_120
6_25
V6M
~D
1
2
PC
258
0.01
U_0
402_
25V7
K~D
12
PR
148
2.2K
_040
2_5%
~D 12
PC
255
100P
_040
2_50
V8K
12
PL20
5.6U_HMU1356-5R6_8.8A_20%~D
12
PC
112
0.1U
_060
3_25
V7K~
D
12
PR146
0_0402_5%~D
1 2
PR
150
16.2
K_04
02_1
%~D
@
12
PC
9910
U_1
206_
25V6
M~D
1
2
PC
257
100P
_040
2_50
V8K
12
PR
473
10_0
402_
1%~D
1
2
PR
474
1K_0
402_
5%~D
@1
2
PC
379
10U
_120
6_25
V6M
~D
1
2
PC
119
0.01
U_0
402_
25V7
K~D
12
PJP65
PAD-OPEN1x1m
1 2
PC2041U_0603_10V6K~D
1 2
PR47533.2K_0402_1%~D
@
1 2
PC
259
10P
_040
2_50
V8J~
D
@
12
PC384
0.22U_0402_6.3V6K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_NCHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,49
SBAT_PRES#38,44
PBAT_DSCHG38
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.0
Selector
50 66Thursday, March 01, 2007
Compal Electronics, Inc.
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PR
317
10K_
0402
_5%
~D
12
PU14BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
+
PC
381
100U
_25V
_M~D
1
2
PR
318
33K_
0402
_5%
~D
12
PR32410K_0402_5%~D
1 2
PC2350.1U_0603_25V7K~D
1 2
PR
326
32.4
K_04
02_1
%~D
12
PR313100K_0402_5%~D
12
FDS4935BZ_SO8~D
PQ65
G2 2D28
S1 3D15
S2 1D27
G1 4D16
PQ71SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
G
D
S
PQ68RHU002N06_SOT323
2
13
PR310100K_0402_5%~D
12P
C23
60.
1U_0
603_
25V7
K~D
@ 12
PR325100K_0402_5%~D
1 2
PQ62
SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PR321147K_0402_1%~D
1 2
PR31947K_0402_1%~D
1 2
PR
314
470K
_040
2_5%
~D
12
PQ69SI4835BDY-T1-E3_SO8~D
3 65
78
2
4
1
PU14ALM393DR_SO8~D
IN+3
IN-2 O 1
P8
G4
PR308100K_0402_5%~D@
12
PR30910K_0402_5%~D
12
G
D
S
PQ73RHU002N06_SOT323
2
13
PQ72SI4835BDY-T1-E3_SO8~D
3 65
78
2
4
1
G
D
S
PQ63RHU002N06_SOT323
2
13
PC2340.1U_0603_25V7K~D
1 2
+
PC
382
100U
_25V
_M~D
1
2
PD47B540C~D
2 1
PQ66SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PR
323
42.2
K_04
02_1
%~D
12
PC
237
0.1U
_060
3_25
V7K~
D
12
PR
320
470K
_040
2_5%
~D
12
PR307100K_0402_5%~D
12
PD48
RB715F_SOT323
2
31
PR30610K_0402_5%~D
12
PR
315
470K
_040
2_5%
~D
12
PR31647K_0402_1%~D
1 2
PR
311
33K_
0402
_5%
~D
12
PR
305
10K_
0402
_5%
~D1
2
PQ70SI4835BDY-T1-E3_SO8~D
365
78
2
4
1
PC
233
0.1U
_060
3_25
V7K~
D
12
G
D
S
PQ67RHU002N06_SOT323
2
13
PD51
RB715F_SOT323
2
31
PD49B540C~D
2 1
PU15TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PR322100K_0402_5%~D
1 2
G
D
S
PQ64RHU002N06_SOT323
2
13
PD50
RB715F_SOT323
2
31
PR31210K_0402_5%~D
12
G
D
SPQ74RHU002N06_SOT323
2
13
PC
232
2200
P_04
02_5
0V7K
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_ISL6236_REF
+GPU_COREP +GPU_CORE
+5V_ALW
+1.25V_RUNP
+5V_VCC4
+PWR_SRC
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE
+GPU_COREP
GNDA_1P25V_GPU_CORE
+3.3V_RUN
+5V_VCC4
+3.3V_ALW
+1.25V_RUNP +1.25V_RUN
GNDA_1P25V_GPU_CORE
GFX_CORE_PWRGD 42
1.25V_RUN_ON39
GFX_CORE_CNTRL 52
GFX_CORE_ON38
RUN_ON19,37,39,41,42
1.25V_RUN_PWRGD 42
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.0
PWR_NVG72 +VDD_CORE
51 66Thursday, March 01, 2007
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
GPU_COREP/ +1.25V_RUN
1.25 Volt +/-5%Thermal Design Current:2.1APeak current: 3A OCP min: 6.31A
GPU_COREThermal Design Current:7.7APeak current: 11A OCP min: 12.23A
G86(1.15V)
PR521,PR451
2@
1@G72(1.0V)
Table 1
version BOM structure location
PR449,PR522
+
PC
365
330U
_D2E
_2.5
VM_R
9~D
1
2
PC
372
1U_0
603_
10V6
K~D
12
PC
353
10U
_120
6_25
V6M
~D
1
2
PR4520_0402_1%~D
@
12
PC
367
0.1U
_040
2_10
V7K~
D
12
PC
399
1000
P_04
02_5
0V7K
~D
@
12
PC
357
0.1U
_060
3_25
V7K~
D
12
PR
45
68.4
5K
_0402_1
%
PC
360
1000
P_04
02_5
0V7K
~D
12
PQ97
FDS
6676
AS
_NL_
SO8~
D
4
7 865
123
PR4601_0603_5%~D
1 2
PC
356
2200
P_04
02_5
0V7K
~D
12
PR484100K_0402_1%~D
12
PC
362
0.1U
_060
3_25
V7K~
D
12
PC
352
2200
P_04
02_5
0V7K
~D
12
PR
446
13.7
K_04
02_1
%~D
12
PC
351
0.1U
_060
3_25
V7K~
D
12
PC
370
100P
_040
2_50
V8K
@
12
PR4450_0402_5%~D
1 2
PC
407
0.1U
_040
2_10
V7K~
D
@
12
PR
444
0_04
02_5
%~D
@ 12
PR
447
196K
_040
2_1%
~D @ 1
2
PJP52
PAD-OPEN1x1m
12
PC
371
0.01
U_0
402_
25V7
K~D
@
12
PR46410_0603_5%~D
@
12
PJP55
PAD-OPEN 4x4m
1 2
PR4660_0402_5%~D
1 2
PJP56
PAD-OPEN 4x4m
1 2
G
D
SPQ99
BSS138W-7-F_SOT323~D@
2
13
PR4480_0402_5%~D @
1 2
PC
368
0.1U
_060
3_25
V7K~
D
12
PR522196K_0402_1%~D2@
12
PR
46
310.7
K_0402_1%
PR451205K_0402_1%~D1@
12
PR
461
100K
_040
2_1%
~D@
12
PR
454
10K_
0402
_1%
~D@
1
2
PC
354
10U
_120
6_25
V6M
~D
1
2
+
PC
402
330U
_D2E
_2.5
VM_R
9~D
1
2
PC
410
10U
_120
6_25
V6M
~D
1
2
PL453.3UH_MPL73-3R3_6A_20%~D
12
PC
408
0.1U
_040
2_10
V7K~
D
@
12
PR
457
10K_
0402
_1%
~D@
12
PQ96FDS6982AS_NL_SO8~D
S21
G2 2
S13 G1 4
D28
D27
D1
6
D1
5
PC
355
0.1U
_060
3_25
V7K~
D
12
PU25ISL6236IRZA_QFN32~D
REF
1TO
N2
VCC
3EN
_LD
O4
VREF
35
VIN
6LD
O7
LDO
REF
IN8
BYP9OUT110FB111ILIM112POK113EN114UGATE115PHASE116
BOO
T117
LGAT
E118
PVC
C19
SEC
FB20
GN
D21
PGN
D22
LGAT
E223
BOO
T224
PHASE2 25UGATE2 26EN2 27POK2 28SKIP# 29OUT2 30ILIM2 31REFIN2 32
PAD
33
PR453205K_0402_1%~D
1 2PR520 0_0402_5%~D
1 2
PR45816.9K_0402_1%~D@
12
PR
455
10K_
0402
_1%
~D@
1
2
PR
521
13.7
K_04
02_1
%~D
1@ 1
2
PR
443
0_08
05_5
%1
2
PR4591_0603_5%~D
1 2
PC
373
1U_0
603_
10V6
K~D
12
PR
442
0_08
05_5
%
12
G
D
S
PQ98BSS138W-7-F_SOT323~D
@
2
13
PQ95FDS8880_NL_SO8~D
S3
D6
D5
D7
D8
S2
G4
S1
PC
364
0.1U
_040
2_10
V7K~
D
12
PJP54
PAD-OPEN 4x4m
1 2
PC
369
0.1U
_060
3_25
V7K~
D
12
PL460.82UH_MPL73-R82_13A_20%~D
12
PC
349
10U
_120
6_25
V6M
~D
1
2
PR
449
18.7
K_04
02_1
%~D
2@
12
PJP51
PAD-OPEN 4x4m
1 2
PR4670_0402_5%~D @
1 2
+
PC
363
220U
_D2E
_2.5
VM_R
15~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_MTX_GRX_N[0..15]
PEG_MTX_GRX_P[0..15]
PEG_MRX_GTX_P[0..15]
PEG_MRX_GTX_N[0..15]
DVI_SCLK
DVI_SDATA
LCD_DDCCLK
LCD_DDCDATA
PEG_MRX_GTX_C_P0PEG_MRX_GTX_C_N0
PEG_MRX_GTX_P0PEG_MRX_GTX_N0
PEG_MRX_GTX_N1PEG_MRX_GTX_P1
PEG_MRX_GTX_N2PEG_MRX_GTX_P2
PEG_MRX_GTX_N3PEG_MRX_GTX_P3
PEG_MRX_GTX_N4PEG_MRX_GTX_P4
PEG_MRX_GTX_N5PEG_MRX_GTX_P5
PEG_MRX_GTX_N6PEG_MRX_GTX_P6
PEG_MRX_GTX_N7PEG_MRX_GTX_P7
PEG_MRX_GTX_N8PEG_MRX_GTX_P8
PEG_MRX_GTX_N9PEG_MRX_GTX_P9
PEG_MRX_GTX_N10PEG_MRX_GTX_P10
PEG_MRX_GTX_N11PEG_MRX_GTX_P11
PEG_MRX_GTX_N12PEG_MRX_GTX_P12
PEG_MRX_GTX_N13
PEG_MRX_GTX_N14PEG_MRX_GTX_P14
PEG_MRX_GTX_N15PEG_MRX_GTX_P15
PEG_MRX_GTX_P13
PEG_MRX_GTX_C_P1PEG_MRX_GTX_C_N1
PEG_MRX_GTX_C_P2PEG_MRX_GTX_C_N2
PEG_MRX_GTX_C_P3PEG_MRX_GTX_C_N3
PEG_MRX_GTX_C_P4PEG_MRX_GTX_C_N4
PEG_MRX_GTX_C_P5PEG_MRX_GTX_C_N5
PEG_MRX_GTX_C_P6PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P7PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_P8PEG_MRX_GTX_C_N8
PEG_MRX_GTX_C_P9PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_P10PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_P11PEG_MRX_GTX_C_N11
PEG_MRX_GTX_C_P12PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_P13PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_P14PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_P15PEG_MRX_GTX_C_N15
DAT_DDC2CRTDDCCLKCLK_DDC2
I2CH_SCL
I2CH_SDA
TV_CVBS
CRT_RED
RAM_CFG1
PEG_MRX_GTX_C_P15
PEG_MRX_GTX_C_N11
PEG_MTX_GRX_N15
PEG_MTX_GRX_N6
LCD_DDCCLK
GFX_CORE_CNTRL
PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_N5
PEG_MRX_GTX_C_P2
PEG_MTX_GRX_N11
I2CH_SDA
CRT_BLU
PANEL_BKEN
BIA_PWM
PEG_MRX_GTX_C_P10
PEG_MTX_GRX_P7
PEG_MTX_GRX_P2
XTALSSIN_R
DVI_SDATA
PCI_DEVID2
XTALOUTBUFF
PEG_MRX_GTX_C_P1
PEG_MTX_GRX_P3
PEG_MTX_GRX_N1
DACB_RSET
CRT_VSYNC
PEG_MRX_GTX_C_P6
PEG_MRX_GTX_C_P5
PEG_MRX_GTX_C_N0
PEG_MTX_GRX_P0
CRTDDCCLK
DACAVREF
PEG_MRX_GTX_C_N15
PEG_MRX_GTX_C_P9PEG_MRX_GTX_C_N8PEG_MRX_GTX_C_P8
PEG_MTX_GRX_N12
I2CH_SCL
CRT_HSYNC
ENVDD
PEG_MRX_GTX_C_N2
PEG_MTX_GRX_N7
PEG_MTX_GRX_P1
CRTDDCDAT
PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P0
PEG_MTX_GRX_N14PEG_MTX_GRX_P14
PEG_MTX_GRX_N3
DVI_SCLK
PEG_MTX_GRX_P15
RAM_CFG0
PEG_MTX_GRX_P10
PEG_MTX_GRX_N8
PCI_DEVID3
PEG_MRX_GTX_C_P12
PEG_MRX_GTX_C_P3
PEG_MRX_GTX_C_P14
PEG_MRX_GTX_C_P4
PEG_MTX_GRX_P13
PEG_MTX_GRX_P12
PEG_MTX_GRX_N10
PEG_MTX_GRX_N4
PCI_DEVID1
PEG_MRX_GTX_C_P11
PEG_MTX_GRX_N9
PEG_MTX_GRX_P5
LCD_DDCDATA
TV_C
RAM_CFG2
PEG_MRX_GTX_C_P13
PEG_MRX_GTX_C_P7
PEG_MTX_GRX_P11
PEG_MTX_GRX_P9
PEG_MTX_GRX_P6
RAM_CFG3
PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_N1
DACBVREF
CRT_GRN
PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_N3
PEG_MTX_GRX_N13
PEG_MTX_GRX_P8
PCI_DEVID0
PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_N4
PEG_MTX_GRX_N5
PEG_MTX_GRX_P4
PEG_MTX_GRX_N2
PEG_MTX_GRX_N0
TV_Y
CRTDDCDAT
PLTRST_DELAY#
DVI_DETECT
TV_C
TV_CVBS
TV_Y
CRT_RED
CRT_BLU
CRT_GRN
GPIO10_SW_VREF
PCI_DEVID4BAR2_SIZE
CLK_PCIE_VGACLK_PCIE_VGA#
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
PEG_MTX_GRX_P[0..15]12
PEG_MTX_GRX_N[0..15]12
PEG_MRX_GTX_P[0..15]12
PEG_MRX_GTX_N[0..15]12
CLK_PCIE_VGA6
PLTRST_DELAY#23
CRT_HSYNC 20CRT_VSYNC 20
DAT_DDC220,36CLK_DDC220,36
CLK_NV_27M6
XTALOUTBUFF57
XTALSSIN57
CLK_NVSS_27M6
PCI_DEVID3 57
RAM_CFG1 57
DVI_SDATA 36
CRT_RED 20,36
PCI_DEVID1 57
TV_CVBS 36
RAM_CFG3 57
RAM_CFG0 57
PANEL_BKEN 38
DVI_SCLK 36
TV_C 36
RAM_CFG2 57
LCD_DDCDATA 19
ENVDD 19
CRT_GRN 20,36
GFX_CORE_CNTRL 51
PCI_DEVID0 57
DVI_DETECT 36
LCD_DDCCLK 19
CRT_BLU 20,36
PCI_DEVID2 57
BIA_PWM 19
TV_Y 36
GFX_DEVID2 38
GPIO10_SW_VREF 53,56
PCI_DEVID4 57
PCI_IOBAR 57
BAR2_SIZE 57
I2CH_SCL 19I2CH_SDA 19
THERMTRIP_VGA# 18
CLK_PCIE_VGA#6
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 PCIE,GPIO,CLK
52 66Thursday, March 01, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
<---DVI
<---SVIDEO
<---CRT
Reserved for GFx debug
For G8x use. CLK_NV_27M is 3.3V Level.For G7x use. CLK_NV_27M is 1.2V Level
T9 PAD
C3430.1U_0402_10V7K~D
12
C3460.1U_0402_10V7K~D
12
C3590.1U_0402_10V7K~D
12
R17
310
K_04
02_5
%~D
12
R163 10K_0402_5%~D
1 2
T78 PAD~D
R169 2.2K_0402_5%~D
1 2
C299 0.01U_0402_16V7K~D
1 2
T8 PAD
C3230.1U_0402_10V7K~D
12
R776 150_0402_5%~D
1 2
C3550.1U_0402_10V7K~D
12
C3440.1U_0402_10V7K~D
12
C3600.1U_0402_10V7K~D
12
R20310K_0402_5%~D
12
C3530.1U_0402_10V7K~D
12
T25 PAD~D
R781 150_0402_5%~D
1 2
T26 PAD~D
C3400.1U_0402_10V7K~D
12
R204 124_0402_1%~D
1 2
T76 PAD~D
C3580.1U_0402_10V7K~D
12
C3520.1U_0402_10V7K~D
12
C3210.1U_0402_10V7K~D
12
R170 2.2K_0402_5%~D
1 2
C217 0.01U_0402_16V7K~D
1 2
T77 PAD~D
C3620.1U_0402_10V7K~D
12
C3610.1U_0402_10V7K~D
12
T27 PAD~D
C3490.1U_0402_10V7K~D
12
C3450.1U_0402_10V7K~D
12
C3470.1U_0402_10V7K~D
12
C3190.1U_0402_10V7K~D
12
R30 10K_0402_5%~D
1 2
C3500.1U_0402_10V7K~D
12C3510.1U_0402_10V7K~D
12
G
D S Q362N7002W-7-F_SOT323-3~D
2
1 3
C3390.1U_0402_10V7K~D
12
C3250.1U_0402_10V7K~D
12
C3410.1U_0402_10V7K~D
12
R103
2K_0402_5%~D 1 2
R780 150_0402_5%~D
1 2
R7560_0402_5%~D
2@
1 2
DVO
/ G
PIO
PCI E
XPR
ESS
TESTCL
K
Part 1 of 5
DACs
I2C
U10A
G86-620-A2_BGA533~D
PEX_RX0AF1PEX_RX0_NAG2PEX_RX1AG3PEX_RX1_NAG4PEX_RX2AF4PEX_RX2_NAF5PEX_RX3AG6PEX_RX3_NAG7PEX_RX4AF7PEX_RX4_NAF8PEX_RX5AG9PEX_RX5_NAG10PEX_RX6AF10PEX_RX6_NAF11PEX_RX7AG12PEX_RX7_NAG13PEX_RX8AG15PEX_RX8_NAG16PEX_RX9AF16PEX_RX9_NAF17PEX_RX10AG18PEX_RX10_NAG19PEX_RX11AF19PEX_RX11_NAF20PEX_RX12AG21PEX_RX12_NAG22PEX_RX13AF22PEX_RX13_NAF23PEX_RX14AG24PEX_RX14_NAG25PEX_RX15AG26PEX_RX15_NAF27
PEX_TX0AD5PEX_TX0_NAD6PEX_TX1AE6PEX_TX1_NAE7PEX_TX2AD7PEX_TX2_NAC7PEX_TX3AE9PEX_TX3_NAE10PEX_TX4AD10PEX_TX4_NAC10PEX_TX5AE12PEX_TX5_NAE13PEX_TX6AD13PEX_TX6_NAC13PEX_TX7AC15PEX_TX7_NAD15PEX_TX8AE15PEX_TX8_NAE16PEX_TX9AC18PEX_TX9_NAD18PEX_TX10AE18PEX_TX10_NAE19PEX_TX11AC21PEX_TX11_NAD21PEX_TX12AE21PEX_TX12_NAE22PEX_TX13AD22PEX_TX13_NAD23PEX_TX14AF25PEX_TX14_NAE25PEX_TX15AE24PEX_TX15_NAD24
PEX_REFCLKAE3PEX_REFCLK_NAE4
PEX_RST_NAC6
XTALINB1
XTALOUTC2
XTALOUTBUFFC3
XTALSSINC1
GPIO0 A9GPIO1 D9GPIO2 A10GPIO3 B10GPIO4 C10GPIO5 C12GPIO6 B12GPIO7 A12GPIO8 A13GPIO9 B13
GPIO10 B15GPIO11 A15GPIO12 B16
MIOBD0 G2MIOBD1 G3MIOBD2 J2MIOBD3 J1MIOBD4 K4MIOBD5 K1MIOBD6 M2MIOBD7 M1MIOBD8 N1MIOBD9 N2
MIOBD10 N3MIOBD11 R3
MIOB_HSYNC G4MIOB_VSYNC F1
MIOB_DE G1MIOB_CTL3 F2
MIOB_CLKIN R2MIOB_CLKOUT K2
MIOB_CLKOUT_N K3
MIOB_VREF J4
DACA_HSYNC AD4DACA_VSYNC AC4
DACA_RED AE1DACA_BLUE AD2
DACA_GREEN AD1DACA_IDUMP U9DACA_RSET AD3
DACA_VREF AB4
DACB_RED F4DACB_BLUE D5
DACB_GREEN E4DACB_IDUMP L9DACB_RSET D6
DACB_VREF E7
I2CA_SCL D10I2CA_SDA E10I2CB_SCL F9I2CB_SDA F10I2CC_SCL E9I2CC_SDA D8I2CH_SCL C7I2CH_SDA B7
IFPAB_VPROBE N6IFPCD_VPROBE M5
JTAG_TCK AE27JTAG_TDI AD27
JTAG_TDO AE26JTAG_TMS AD26
JTAG_TRST_N AD25TESTMODE D7
PEX_TSTCLK_OUT AF13PEX_TSTCLK_OUT_N AF14
DACB_HSYNC E6DACB_VSYNC F5
R7872K_0402_5%~D
1 2
R5810K_0402_5%~D
1 2
R166
0_0402_5%~D
1 2
C3570.1U_0402_10V7K~D
12R175 2.2K_0402_5%~D
1 2
R37
2.2K_0402_5%~D
12
G
D S Q372N7002W-7-F_SOT323-3~D
2
1 3
C3260.1U_0402_10V7K~D
12
R755 0_0402_5%~D
1 2
R779 150_0402_5%~D
1 2
R778 150_0402_5%~D
1 2
C3480.1U_0402_10V7K~D
12
R215 0_0402_5%~D@1 2
R777 150_0402_5%~D
1 2
C3200.1U_0402_10V7K~D
12
R48 2K_0402_5%~D @1 2
C3560.1U_0402_10V7K~D
12
C3270.1U_0402_10V7K~D
12
C3420.1U_0402_10V7K~D
12
C3540.1U_0402_10V7K~D
12
R165 0_0402_5%~D@1 2
R171 124_0402_1%~D
1 2
C3220.1U_0402_10V7K~D
12
R382.2K_0402_5%~D
12
R525 10K_0402_5%~D
1 2
R167 2.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSA_WP4
FBAD0FBAD1FBAD2FBAD3
CLKA1CLKA1#
CLKA0#CLKA0
DQMA#4
DQMA#6
DQMA#[0:7]
FBAA[0:11]
FBAD[0:63]
FBBA[2:5]
DQMA#3
DQMA#1
DQMA#5
DQSA_WP3
DQSA_WP1
DQSA_WP7
FBAD4FBAD5FBAD6FBAD7
FBAD12FBAD13FBAD14FBAD15
FBAD8FBAD9FBAD10FBAD11
FBAD20FBAD21FBAD22FBAD23
FBAD28FBAD29FBAD30FBAD31
FBAD24FBAD25FBAD26FBAD27
FBAD16FBAD17FBAD18FBAD19
FBAD36FBAD37FBAD38FBAD39
FBAD44FBAD45FBAD46FBAD47
FBAD40FBAD41FBAD42FBAD43
FBAD32FBAD33FBAD34FBAD35
FBAD52FBAD53FBAD54FBAD55
FBAD60FBAD61FBAD62FBAD63
FBAD56FBAD57FBAD58FBAD59
FBAD48FBAD49FBAD50FBAD51
LCD_A1-
LCD_A0+LCD_A0-LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_A2-LCD_A2+
LCD_BCLK-LCD_BCLK+
LCD_B0-LCD_B0+
LCD_B1-LCD_B1+
LCD_B2-LCD_B2+
VGA_THERMDNVGA_THERMDP
DVI_TX0-
DVI_TX1-DVI_TX1+
DVI_TX2-
DVI_TX0+DVI_CLK-
DVI_TX2+
DVI_CLK+
DVI_TX0-
DVI_TX1-
DVI_TX1+
DVI_TX2-
DVI_CLK+
DVI_TX2+
DVI_CLK-
DVI_TX0+
PEX_PLL_EN_TERM100SUB_VENDOR
3GIO_ADR_0
3GIO_ADR_13GIO_ADR_2
DQSA_WP6
DQMA#0
DQMA#7
DQSA_WP5
DQMA#2
DQSA_WP0
MIOA_HSYNC
DQSA_RN[0:7]
DQSA_WP[0:7]
DQSA_WP2
DQSA_RN0DQSA_RN1DQSA_RN2DQSA_RN3DQSA_RN4DQSA_RN5DQSA_RN6DQSA_RN7
FBACS1#FBBA3FBBA4FBBA2FBA_BA1FBAA5FBARAS#
FBACAS#
FBAA4
FBAA1FBAA3FBAA8FBAA2FBAA6FBAA9FBAA0FBA_CKEFBAA10FBAA7FBA_RST#
FBBA5FBA_BA0FBAWE#
FBAA11FBACS0#
LCD_ACLK+
LCD_ACLK-
LCD_BCLK+
LCD_BCLK-
GPU_SW_VREF
FBA_VREF
LCD_B1-
LCD_B0-
LCD_A2-
LCD_A1-
LCD_A0-
LCD_B2-
LCD_A1+
LCD_A0+
LCD_A2+
LCD_B1+
LCD_B0+
LCD_B2+
+3.3V_RUN
+1.8V_RUN
+IFPC_IOVDD
CLKA0 56CLKA0# 56CLKA1 56CLKA1# 56
FBAA[0:11] 56
FBBA[2:5] 56
FBAD[0:63] 56
DQMA#[0:7] 56
LCD_ACLK+19LCD_ACLK-19LCD_A0+19LCD_A0-19LCD_A1+19LCD_A1-19LCD_A2+19LCD_A2-19
LCD_BCLK+19LCD_BCLK-19LCD_B0+19LCD_B0-19LCD_B1+19LCD_B1-19LCD_B2+19LCD_B2-19
VGA_THERMDN 18VGA_THERMDP 18
DVI_TX0+36
DVI_TX1+36DVI_TX1-36
DVI_CLK+36
DVI_TX0-36
DVI_TX2+36
DVI_CLK-36
DVI_TX2-36
PEX_PLL_EN_TERM100 57SUB_VENDOR 57
3GIO_ADR_0 57
3GIO_ADR_1 573GIO_ADR_2 57
DQSA_WP[0:7] 56
DQSA_RN[0:7] 56
FBA_CKE 56
FBA_BA0 56FBAWE# 56
FBACS0# 56FBACS1# 56
FBA_BA1 56
FBARAS# 56
FBACAS# 56
FBA_RST# 56
GPIO10_SW_VREF52,56
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 Memory Interface
53 66Thursday, March 01, 2007
Compal Electronics, Inc.
10mil10mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Keep stub for capsas small as possible
Keep stub forcaps as smallas possible
Populate R828 for G86Populate R605 for G72.R828,R605 place overlap
R201 49.9_0402_1%~D
12R202 49.9_0402_1%~D
12
R195 49.9_0402_1%~D
12
R19010K_0402_5%~D
12
R3410K_0402_5%~D
12
R197 49.9_0402_1%~D
12
T81 PAD~D
R50
1K_0
402_
5%~D
12
R188 49.9_0402_1%~D
12
R29511_0402_1%~D
12
C193 3.3P_0402_50V8C~D@1 2
R311.18K_0402_1%~D
12
R2001K_0402_5%~D
12
C393.3P_0402_50V8C@
1
2
C48
0.02
2U_0
402_
16V7
K~D
1
2
C433.3P_0402_50V8C~D@
1
2
R191 49.9_0402_1%~D
12C56 0.01U_0402_16V7K~D
1 2
R193 49.9_0402_1%~D
12
C196 3.3P_0402_50V8C~D@1 2
C286 0.01U_0402_16V7K~D
1 2
C207 3.3P_0402_50V8C~D@1 2
T85 PAD~D
T79 PAD~D
C58 0.01U_0402_16V7K~D
1 2
MEM
OR
Y IN
TER
FAC
E
Part 2 of 5
U10B
G86-620-A2_BGA533~D
FBAD0A26FBAD1C24FBAD2B24FBAD3A24FBAD4C22FBAD5A25FBAD6B25FBAD7D23FBAD8G22FBAD9J23FBAD10E24FBAD11F23FBAD12J24FBAD13F24FBAD14G23FBAD15H24FBAD16D16FBAD17E16FBAD18D17FBAD19F18FBAD20E19FBAD21E18FBAD22D20FBAD23D19FBAD24A18FBAD25B18FBAD26A19FBAD27B19FBAD28D18FBAD29C19FBAD30C16FBAD31C18FBAD32N26FBAD33N25FBAD34R25FBAD35R26FBAD36R27FBAD37T25FBAD38T27FBAD39T26FBAD40AB23FBAD41Y24FBAD42AB24FBAD43AB22FBAD44AC24FBAD45AC22FBAD46AA23FBAD47AA22FBAD48T24FBAD49T23FBAD50R24FBAD51R23FBAD52R22FBAD53T22FBAD54N23FBAD55P24FBAD56AA24FBAD57AA27FBAD58AA26FBAD59AB25FBAD60AB26FBAD61AB27FBAD62AA25FBAD63W25
FBA_CMD0 G27FBA_CMD1 D25FBA_CMD2 F26FBA_CMD3 F25FBA_CMD4 G25FBA_CMD5 J25FBA_CMD6 J27FBA_CMD7 M26FBA_CMD8 C27FBA_CMD9 C25
FBA_CMD10 D24FBA_CMD11 N27FBA_CMD12 G24FBA_CMD13 J26FBA_CMD14 M27FBA_CMD15 C26FBA_CMD16 M25FBA_CMD17 D26FBA_CMD18 D27FBA_CMD19 K26FBA_CMD20 K25FBA_CMD21 K24FBA_CMD22 F27FBA_CMD23 K27FBA_CMD24 G26FBA_CMD25 B27FBA_CMD26 N24
FBADQM0 D21FBADQM1 F22FBADQM2 F20FBADQM3 A21FBADQM4 V27FBADQM5 W22FBADQM6 V22FBADQM7 V24
FBADQS_RN0 A22FBADQS_RN1 E22FBADQS_RN2 F21FBADQS_RN3 B21FBADQS_RN4 V26FBADQS_RN5 W23FBADQS_RN6 V23FBADQS_RN7 W27
FBADQS_WP0 B22FBADQS_WP1 D22FBADQS_WP2 E21FBADQS_WP3 C21FBADQS_WP4 V25FBADQS_WP5 W24FBADQS_WP6 U24FBADQS_WP7 W26
FB_VREF A16
FBA_CLK0 L24FBA_CLK0_N K23
FBA_CLK1 M22FBA_CLK1_N N22FBA_REFCLK M23
FBA_REFCLK_N M24FBA_DEBUG K22
G
D
S
Q592N7002W-7-F_SOT323-3~D
2
13
T6 PAD
T83 PAD~D
T84 PAD~D
R192 49.9_0402_1%~D
12
T82 PAD~D
Part 3 of 5
LVD
S/TM
DS
NCG
ENER
AL
SERIAL
U10C
G86-620-A2_BGA533~D
IFPA_TXC_NU4 IFPA_TXCT4 MIO_A_D0 A2
MIO_A_D2 A3
MIO_A_D4 A4
MIO_A_D1 B3
MIO_A_D5 B4MIO_A_D6 B6
MIO_A_HSYNC C4
MIO_A_D8 C6
NC_3 C13
MIO_A_D3 D4
NC_0 D12NC_1 E12NC_2 F12
MIO_A_D9 G5
MIO_A_D7 P4
MIO_A_D10 V4
IFPA_TXD0N4IFPA_TXD0_NN5IFPA_TXD1R5IFPA_TXD1_NR4IFPA_TXD2T5IFPA_TXD2_NT6IFPA_TXD3R6IFPA_TXD3_NP6IFPB_TXCW5IFPB_TXC_NW6IFPB_TXD4W3IFPB_TXD4_NW2IFPB_TXD5AA2IFPB_TXD5_NAA3IFPB_TXD6AB1IFPB_TXD6_NAA1IFPB_TXD7AB3IFPB_TXD7_NAB2
IFPAB_RSETU6
IFPC_TXCV1IFPC_TXC_NW1IFPC_TXD0T1IFPC_TXD0_NR1IFPC_TXD1T3IFPC_TXD1_NT2IFPC_TXD2V2IFPC_TXD2_NV3
IFPCD_RSETJ3
BUFRST_N A6
STEREO F7
SWAPRDY A7THERMDN C9THERMDP B9
ROM_SCLK D2ROM_SI F3
ROM_SO D3ROMCS_N D1
C192 3.3P_0402_50V8C~D@1 2
T80 PAD~D
C276 0.01U_0402_16V7K~D
1 2
C181 3.3P_0402_50V8C~D@1 2
R605909_0402_1%~D1@
12
C209 3.3P_0402_50V8C~D@1 2
T90 PAD~D
R82
848
7_04
02_1
%~D
2@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FBA_PLLAVDD
+IFPC_IOVDD
+DACA_VDD
+PEX_PLLDVDD
+MIOBCAL_PD_VDDQ
+PEX_PLLAVDD
+PLLVDD
+DACB_VDD
+IFPCD_PLLVDD
+IFPAB_PLLVDD
+IFPAB_IOVDD
+DACB_VDD+DACA_VDD
+G72_PLLVDD
+G72_PLLVDD
+FBA_PLLAVDD
+FBA_PLLVDD
+FBA_PLLVDD
+PLLVDD
+GPU_CORE
+3.3V_RUN
+1.25V_GFX_PCIE
+3.3V_RUN
+3.3V_RUN
+1.25V_GFX_PCIE
+1.8V_RUN
+PEX_PLLAVDD
+1.8V_RUN
+1.8V_RUN+1.8V_RUN
+3.3V_RUN
+IFPC_IOVDD
+2.5V_RUN
+2.5V_RUN
+1.25V_GFX_PCIE
+3.3V_RUN
+1.25V_GFX_PCIE
+1.25V_GFX_PCIE
+15V_ALW
+3.3V_ALW2+1.25V_RUN
+1.25V_RUN
+1.25V_GFX_PCIE
+1.25V_GFX_PCIE
+1.8V_RUN
+1.8V_RUN
+2.5V_RUN
RUNPWROK38,39,42,48
1.25V_GFX_PCIE_ON39
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 Power
54 66Thursday, March 01, 2007
Compal Electronics, Inc.
1808mA
40mA
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
20mA180mA
40mA
40mA
70mA140mA
For G8x use. NC for G7x
+2.5V_RUN for G7x+1.25V_GFX_PCIE for G8x.
+2.5V_RUN for G7x+1.8V_RUN for G8x.
+2.5V_RUN for G7x+1.8V_RUN for G8x.
Populate R825 for G72MVPopulate R35 for G86MV.R825,R35 place overlap
Populate C251, C255 for G86and G72 solution per Nvidia
C25
20.
1U_0
402_
10V7
K~D
1
2
C26
647
00P_
0402
_25V
7K~D
1
2
C62
0.1U
_040
2_10
V7K~
D
1
2
C21
30.
1U_0
402_
10V7
K~D
1
2
C24
40.
022U
_040
2_16
V7K~
D
1
2
C25
54.
7U_0
603_
6.3V
4Z~D
1
2
C30
247
0P_0
402_
50V7
K~D
1
2
C21
947
0P_0
402_
50V7
K~D
1
2
C23
747
00P_
0402
_25V
7K~D
1
2
C28
80.
1U_0
402_
10V7
K~D
1
2
C20
447
00P_
0402
_25V
7K~D
1
2
C24
00.
022U
_040
2_16
V7K~
D
1
2
C27
122
00P_
0402
_50V
7K~D
1
2
L22BLM18AG121SN1D_0603~D
12
C72
4.7U
_060
3_6.
3V4Z
~D
1
2
C28
00.
022U
_040
2_16
V7K~
D
1
2
C29
50.
1U_0
402_
10V7
K~D
1
2
C24
247
0P_0
402_
50V7
K~D
1
2
C21
20.
1U_0
402_
10V7
K~D
1
2
T7PAD
C28
5
0.01
U_0
402_
16V7
K~D
1
2
L14BLM18AG121SN1D_0603~D
1 2
C33
710
U_0
805_
10V4
Z~D
1
2
C27
222
0P_0
402_
50V7
K~D
1
2
C18
710
U_0
805_
4VAM
~D
1
2
L20
BLM18AG121SN1D_0603~D
1@1 2
C32
44.
7U_0
603_
6.3V
4Z~D
1
2
C27
70.
1U_0
402_
10V7
K~D
1
2
C30
84.
7U_0
603_
6.3V
4Z~D
1
2
C21
81U
_060
3_10
V4Z~
D
1
2
C70
4.7U
_060
3_6.
3V4Z
~D
1
2
L55
BLM18AG121SN1D_0603~D
2@1 2
L21BLM18AG121SN1D_0603~D
1@
1 2
R300100K_0402_5%~D@
12
L16BLM18AG121SN1D_0603~D
1 @1 2
C61
10U
_080
5_4V
AM~D
1
2
C23
547
00P_
0402
_25V
7K~D
1
2
C26
90.
022U
_040
2_16
V7K~
D
1
2
G
D
SQ98
2N7002W-7-F_SOT323-3~D
@
2
13
C27
80.
022U
_040
2_16
V7K~
D
1
2
C31
847
00P_
0402
_25V
7K~D
1
2
C24
90.
1U_0
402_
10V7
K~D
1
2
L18BLM18AG121SN1D_0603~D
12
C2390.1U_0402_10V7K~D
1
2
C24
70.
1U_0
402_
10V7
K~D
1
2
C19
12.
2U_0
603_
6.3V
6K~D
1
2
C22
047
00P_
0402
_25V
7K~D
1
2
Q97SI4810DY-T1-E3_SO8~D @
365
78
2
4
1
C21
547
00P_
0402
_25V
7K~D
1
2
L54
BLM18AG121SN1D_0603~D
2@1 2
C85
470P
_040
2_50
V7K~
D
@
1
2
C27
40.
1U_0
402_
16V4
Z~D
1
2
C26
50.
022U
_040
2_16
V7K~
D
1
2
C30
00.
1U_0
402_
10V7
K~D
1
2
C18
84.
7U_0
603_
6.3V
4Z~D
1
2
C26
347
00P_
0402
_25V
7K~D
1
2
C20
610
U_1
206_
6.3V
7K~D
1
2
C23
80.
1U_0
402_
10V7
K~D
1
2
Part 4 of 5
POW
ER
U10D
G86-620-A2_BGA533~D
VDD_27T16VDD_28T17VDD_29U12VDD_30U13VDD_31U15VDD_32U16VDD_33W13VDD_34W15VDD_35W16
VDD_17N17 VDD_16N11 NV_PLLAVDDN9 VDD_14M17 VDD_13M16 VDD_12M15
VDD_26T15
VDD_6L16
VDD_10M13
VDD_5L15 VDD_4L13 VDD_3L12 VDD_2J11 VDD_1J10 VDD_0J9
VDD_11M14
VDD_18R9VDD_19R11VDD_20R17VDD_21T9VDD_22T11VDD_23T12VDD_24T13VDD_25T14
VDD_9M12
PEX_IOVDD_0 W17PEX_IOVDD_1 W18PEX_IOVDD_2 AB10PEX_IOVDD_3 AB11PEX_IOVDD_4 AB14
VDD_7M9VDD_8M11
PEX_IOVDD_5 AB15
VDD_LP_0W9VDD_LP_1W10
VDD33_0F13VDD33_1F14VDD33_2J12VDD33_3J13VDD33_4J15VDD33_5J16
PLLVDD H4
FBA_PLLAVDD D13
FBA_PLLVDD D14
FBCAL_PD_VDDQ D15
FBVTT_0E15FBVTT_1F15FBVTT_2F16FBVTT_3J17FBVTT_4J18FBVTT_5L19FBVTT_6N19FBVTT_7R19FBVTT_8U19FBVTT_9W19
PEX_IOVDDQ_0 AA4PEX_IOVDDQ_1 AB5PEX_IOVDDQ_2 AB6PEX_IOVDDQ_3 AB7PEX_IOVDDQ_4 AB8PEX_IOVDDQ_5 AB9PEX_IOVDDQ_6 AB12PEX_IOVDDQ_7 AB13PEX_IOVDDQ_8 AB16PEX_IOVDDQ_9 AB17
PEX_IOVDDQ_10 AB18
PEX_PLLAVDD Y6PEX_PLLDVDD AA5
MIOB_VDDQ_0 K5MIOB_VDDQ_1 K6MIOB_VDDQ_2 L6
MIOBCAL_PD_VDDQ J5
IFPA_IOVDD W4IFPB_IOVDD Y4IFPC_IOVDD L4
IFPAB_PLLVDD V5
IFPCD_PLLVDD M4
DACA_VDD AE2DACB_VDD F8
FBVDDQ_0F17FBVDDQ_1F19FBVDDQ_2J19FBVDDQ_3J22FBVDDQ_4L22FBVDDQ_5M19FBVDDQ_6P22FBVDDQ_7T19FBVDDQ_8U22FBVDDQ_9Y22 CLAMP D11
VDD_LP_3W12 VDD_LP_2W11
PEX_IOVDD_6 AB20PEX_IOVDD_7 AB21
PEX_IOVDDQ_11 AB19PEX_IOVDDQ_12 AC9PEX_IOVDDQ_13 AC11PEX_IOVDDQ_14 AC12PEX_IOVDDQ_15 AC16PEX_IOVDDQ_16 AC17PEX_IOVDDQ_17 AC19PEX_IOVDDQ_18 AC20
MIO_A_VDDQ_0 F6MIO_A_VDDQ_1 G6MIO_A_VDDQ_2 J6
C29
60.
1U_0
402_
10V7
K~D
1
2
C29
447
0P_0
402_
50V7
K~D
1
2
G
D
S
Q14SI1303DL-T1-E3_SOT323-3~D
2
13
L23
BLM18AG121SN1D_0603~D
1 2
PJP2PAD-OPEN 4x4m1 2
C31
347
0P_0
402_
50V7
K~D
1
2
C57
10U
_080
5_4V
AM~D
1
2
C23
40.
1U_0
402_
10V7
K~D
1
2
L510NH_LQG15HS10NJ02D_5%_0402~D
12
C25
70.
022U
_040
2_16
V7K~
D
1
2
L15
BLM18AG121SN1D_0603~D
12
C25
447
00P_
0402
_25V
7K~D
1
2
C20
110
00P_
0402
_50V
7K~D
1
2
L27BLM18AG121SN1D_0603~D
2@ 1 2
C19
847
0P_0
402_
50V7
K~D
1
2
C25
347
00P_
0402
_25V
7K~D
1
2
C28
94.
7U_0
603_
6.3V
4Z~D
1
2
C71
4.7U
_060
3_6.
3V4Z
~D
1
2
C73
10U
_080
5_10
V4Z~
D
1
2
C24
50.
022U
_040
2_16
V7K~
D
1
2
C32
82.
2U_0
603_
6.3V
6K~D
1
2
C20
510
U_0
805_
4VAM
~D
1
2
C24
80.
1U_0
402_
10V7
K~D
1
2
C29
20.
022U
_040
2_16
V7K~
D
1
2
G
D
S
Q152N7002W-7-F_SOT323-3~D
2
13
C23
32.
2U_0
603_
6.3V
6K~D
6.6
1
2
C27
90.
1U_0
402_
10V7
K~D
1
2
C21
40.
1U_0
402_
10V7
K~D
1
2
C25
80.
022U
_040
2_16
V7K~
D
1
2
C29
10.
1U_0
402_
10V7
K~D
1
2
C2430.1U_0402_10V7K~D
1
2
C25
1
0.1U
_040
2_10
V7K~
D
1
2
R244470K_0402_5%~D
@
12
C31
747
0P_0
402_
50V7
K~D
1
2
C19
70.
1U_0
402_
10V7
K~D
1
2
C29
80.
1U_0
402_
10V7
K~D
1
2
C30
34.
7U_0
603_
6.3V
4Z~D
1
2
R29
210
0K_0
402_
5%~D
@
12
C30
60.
1U_0
402_
10V7
K~D
1
2
C21
647
00P_
0402
_25V
7K~D
1
2
C24
60.
1U_0
402_
10V7
K~D
1
2
R3545.3_0402_1%~D2@
12
C31
147
00P_
0402
_25V
7K~D
1
2
C27
50.
01U
_040
2_16
V7K~
D
1
2
C23
00.
1U_0
402_
10V7
K~D
1
2
C23
60.
1U_0
402_
10V7
K~D
1
2
C31
50.
1U_0
402_
10V7
K~D
2@
1
2
C22
10.
1U_0
402_
10V7
K~D
1
2
C24
10.
1U_0
402_
16V4
Z~D
1
2
C27
30.
022U
_040
2_16
V7K~
D
1
2
C25
90.
1U_0
402_
10V7
K~D
1
2
C26
10.
1U_0
402_
10V7
K~D
1
2 C28
10.
022U
_040
2_16
V7K~
D
1
2
R6110K_0402_5%~D
1 2
L17BLM18AG121SN1D_0603~D
1@12
C29
047
00P_
0402
_25V
7K~D
1
2
C31
44.
7U_0
603_
6.3V
4Z~D
2@
1
2
L53BLM18AG121SN1D_0603~D
2@
1 2
C26
022
00P_
0402
_50V
7K~D
1
2
R82560.4_0402_1%~D 1@
12
G
D
S
Q99
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
C63
1U_0
603_
10V4
Z~D
1
2
C59
4.7U
_060
3_6.
3V4Z
~D
1
2
C30
74.
7U_0
603_
6.3V
4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 Ground
55 66Thursday, March 01, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Populate R824 for G72MVPopulate R174 for G86.
R174,R824 place overlap
R17
424
.9_0
402_
1%~D
2@
12
T89PAD~D
R82
440
.2_0
402_
1%~D
1@
12
GN
D
Part 5 of 5
U10E
G86-620-A2_BGA533~D
GND_0B2GND_1B5GND_2B8GND_3B11GND_4B14GND_5B17GND_6B20GND_7B23GND_8B26GND_9E2GND_10E5GND_11E8GND_12E11GND_13E14GND_14E17GND_15E20GND_16E23GND_17E26GND_18F11GND_19H2GND_20H6GND_21H23GND_22H26GND_23J14GND_24K9GND_25K19GND_26L2GND_27L5GND_28L11GND_29L14GND_30L17GND_31L23GND_32L26GND_33N12GND_34N13GND_35N14GND_36N15GND_37N16GND_38P2GND_39P5GND_40P9GND_41P11GND_42P12GND_43P13GND_44P14GND_45P15GND_46P16GND_47P17GND_48P19GND_49P23GND_50P26GND_51R12GND_52R13GND_53R14GND_54R15GND_55R16GND_56U2GND_57U5GND_58U11GND_59U14
FBCAL_PU_GND E13FBCAL_TERM_GND H22
FBA_PLLGND C15
PLLGND H5
PEX_PLLGND AA6
MIOBCAL_PU_GND M3
IFPAB_PLLGND V6IFPCD_PLLGND M6
GND_85 AF2GND_86 AF3GND_87 AF6GND_88 AF9GND_89 AF12GND_90 AF15GND_91 AF18GND_92 AF21GND_93 AF24GND_94 AF26
GND_60 U17GND_61 U23GND_62 U26GND_63 V9GND_64 V19GND_65 W14GND_66 Y2GND_67 Y5GND_68 Y23GND_69 Y26GND_70 AC2GND_71 AC8GND_72 AC14GND_73 AC23GND_74 AC26GND_75 AD8GND_76 AD9GND_77 AD11GND_78 AD12GND_79 AD14GND_80 AD16GND_81 AD17GND_82 AD19GND_83 AD20GND_84 AC5
R75
740
.2_0
402_
1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSA_RN[0:7]
DQMA#[0:7]
DQSA_WP[0:7]
FBAA[0:11]
FBAD[0:63]
FBBA[2:5]
FBAA4
FBAA5
FBBA2
FBBA4
FBBA3
FBBA5
FBAA3
FBAA2
CLKA0
VREF_SW_A2
DQSA_RN0
DQSA_WP2
FBAD6
FBAD2
FBARAS#
FBA_VREF2
DQMA#2
FBAA8
FBAD14
FBAD15
FBAA7
FBAD21
FBAD0
DQSA_WP1
FBAA2
FBAD12
DQMA#0
FBAD28
FBAD13
FBAD1
DQSA_RN2
FBACS0#
FBAA10
FBAA3
FBAD4
DQMA#3
FBA_BA1
FBAA5
FBAA0
FBAD24
FBAD20
DQMA#1
FBAD7
FBACAS# FBAD27
FBAD30
FBAD8
DQSA_RN3
FBAWE#
FBA_BA0
DQSA_WP0
FBAA6
FBAA4
FBAD22
FBA_VDDA0
FBAD16
FBAD19
FBACS1#
FBAA11
FBAD29FBAD25
FBAD10
DQSA_RN1
FBA_VREF0
FBAD5
FBAD3
CLKA0
FBAA9
FBAD23
FBAD11
CLKA0#
FBA_VDDA1
DQSA_WP3
FBAD31
FBAD18
FBAD17
CLKA0#
FBA_CKE
FBAA1
FBAD26
FBAD9
FBAD37
FBA_CKE
FBA_BA1
FBAA11
FBAD55FBAD51
FBAD47
FBAD61
FBAD35
DQSA_RN7
FBBA4
FBAD54
FBAD43
FBAA7
FBAD52
FBAD59
FBA_VDDA2
FBAWE#
FBBA3
FBAA9
FBAD49
FBAD57
FBAD63
DQSA_RN4
CLKA1#
DQMA#7
FBBA2
FBAD50
FBAA10
FBAA0
FBBA5
FBAD48
FBAD58
FBAD34
FBAD33
FBA_RST#
DQSA_RN6
FBACS0#
FBA_VREF3
FBAA8
FBA_VDDA3
FBA_BA0
FBAA6
FBAD46
FBAD62
CLKA1
FBACAS#
FBA_VREF1
DQMA#6
DQMA#4
FBAD40
FBAD60
FBA_RST#
DQSA_RN5
DQSA_WP5DQSA_WP7DQSA_WP4
DQMA#5 FBAD45
FBAA1
FBARAS#
DQSA_WP6
FBAD53
FBAD41
FBAD56
FBAD38
FBAD32
FBACS1#
FBAD42
FBAD44
CLKA1
FBAD39FBAD36
CLKA1#
VREF_SW_A1
VREF_SW_A1 VREF_SW_A2
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN +1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN +1.8V_RUN
FBA_BA053FBA_BA153
FBA_RST#53
FBACAS#53FBAWE#53FBACS0#53
FBARAS#53
FBA_CKE53
FBACS1#53
FBAA[0:11] 53
FBBA[2:5] 53
FBAD[0:63] 53
DQSA_WP[0:7] 53
DQMA#[0:7] 53
DQSA_RN[0:7] 53
CLKA053CLKA0#53 CLKA1#53
CLKA153
GPIO10_SW_VREF 52,53 GPIO10_SW_VREF 52,53
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 External DDR
56 66Thursday, March 01, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
10mil10mil
10mil10mil
Place below decoupling caps close U11 VDD Pins
Place below decoupling caps close U11 VDDQ Pins
Place below decoupling caps close U14 VDD Pins
Place below decoupling caps close U14 VDDQ Pins
Change to 220ohm/100MHzChange to 220ohm/100MHz
R177,R826 place overlapand close to U50
VREF=0.7 x VDDQ for G86 trun on, 0.4x VDDQ when trun off
VREF=VDDQ x Rb/(Ra+Rb)
Populate R826 for G86Populate R177 for G72MV.
Populate R827 for G86Populate R172 for G72MV.
R172,R827 place overlapand close to U49
R829,R830 for G86R402,R403 for G72MV.R829,R402 and R830,R403 place overlap
VREF=0.7 x VDDQ for G72MV trun on, 0.5x VDDQ when trun off
R831,R832 for G86R404,R405 for G72MV.R831,R404 and R832,R405 place overlap
C95
5
470P
_040
2_50
V7K~
D
1
2
C95
4
470P
_040
2_50
V7K~
D
1
2
C93
6
0.1U
_040
2_10
V7K~
D
1
2
C913 0.047U_0402_16V4Z~D 1 2
C90
9
0.1U
_040
2_10
V7K~
D
1
2
R739
121_0402_1%~D
1 2
C92
6
0.1U
_040
2_10
V7K~
D
1
2
G
D
SQ67
2N7002W-7-F_SOT323-3~D
2
13
C96
1
1000
P_04
02_5
0V7K
~D
1
2
C91
0
0.1U
_040
2_10
V7K~
D
1
2
C92
3
470P
_040
2_50
V7K~
D
1
2
C91
8
0.1U
_040
2_10
V7K~
D
1
2
R734
121_0402_1%~D
1 2
R831487_0402_1%~D 2@
1 2
R741
121_0402_1%~D
1 2
C96
7
100P
_040
2_50
V8J~
D
1
2
C92
0
0.01
U_0
402_
16V7
K~D
1
2
C94
4
4.7U
_060
3_6.
3V6M
~D
1
2
R74
7
1.18
K_0
402_
1%~D
1
2
R74
924
0_04
02_5
%~D
12
C93
4
4.7U
_060
3_6.
3V6M
~D
1
2
R74
2
1.18
K_04
02_1
%~D
1
2
C91
7
0.1U
_040
2_10
V7K~
D
1
2
R752
10K_0402_5%~D
12
R735
121_0402_1%~D
1 2
R404909_0402_1%~D
1@
1 2
C96
5
100P
_040
2_50
V8J~
D
1
2
R177120_0402_5%~D1@
12
C90
8
0.1U
_040
2_10
V7K~
D
1
2
C94
8
0.01
U_0
402_
16V7
K~D
1
2
C91
9
0.1U
_040
2_10
V7K~
D
1
2
R82
724
3_04
02_1
%~D
2@
12
C93
1
1000
P_04
02_5
0V7K
~D
1
2
C93
3
100P
_040
2_50
V8J~
D
1
2
R832487_0402_1%~D 2@
1 2
C91
1
0.1U
_040
2_10
V7K~
D
1
2
C94
9
0.01
U_0
402_
16V7
K~D
1
2
R74
4
511_
0402
_1%
~D 12
C92
4
100P
_040
2_50
V8J~
D
1
2
C96
4
470P
_040
2_50
V7K~
D
1
2
C92
2
1000
P_04
02_5
0V7K
~D
1
2
R830487_0402_1%~D2@
1 2
C94
5
0.1U
_040
2_10
V7K~
D
1
2
C915 0.047U_0402_16V4Z~D 1 2
R405909_0402_1%~D
1@
1 2
C93
0
0.01
U_0
402_
16V7
K~D
1
2
C93
7
0.1U
_040
2_10
V7K~
D
1
2
C96
0
1000
P_04
02_5
0V7K
~D
1
2
R736
121_0402_1%~D
1 2
C91
6
4.7U
_060
3_6.
3V6M
~D
1
2
R733
121_0402_1%~D
1 2
C94
1
0.01
U_0
402_
16V7
K~D
1
2
R748 240_0402_5%~D
1 2
L83 BLM18PG181SN1_0603~D 12
R402909_0402_1%~D
1@
1 2
C914 0.047U_0402_16V4Z~D 1 2
C94
7
0.1U
_040
2_10
V7K~
D
1
2
C92
8
0.1U
_040
2_10
V7K~
D
1
2R
743
1.18
K_04
02_1
%~D
1
2
R403909_0402_1%~D1@
1 2
R172120_0402_5%~D1@
12
C93
5
4.7U
_060
3_6.
3V6M
~D
1
2
C95
8
100P
_040
2_50
V8J~
D
1
2
C93
8
0.1U
_040
2_10
V7K~
D
1
2
U49
K4J52324QE-BC14_FBGA136~D
DQ0 B2DQ1 B3DQ2 C2DQ3 C3DQ4 E2DQ5 F3DQ6 F2DQ7 G3DQ8 B11DQ9 B10
DQ10 C11DQ11 C10DQ12 E11DQ13 F10DQ14 F11DQ15 G10DQ16 M11DQ17 L10DQ18 N11DQ19 M10DQ20 R11DQ21 R10DQ22 T11DQ23 T10DQ24 M2DQ25 L3DQ26 N2DQ27 M3DQ28 R2DQ29 R3DQ30 T2DQ31 T3
A0K4A1H2A2K3A3M4A4K9A5H11A6K10A7L9A8/APK11A9M9A10K2A11L4BA0G4BA1G9
DM0E3DM1E10DM2N10DM3N3
WDQS0D2WDQS1D11WDQS2P11WDQS3P2
VREFH1VREFH12RFU1J2RFU2J3
RAS#H3CAS#F4WE#H9CS#F9
CKEH4CKJ11CK#J10
VDDQ R1VDDQ R4VDDQ R9VDDQ R12VDDQ V1VDDQ V12
VDDA2VDDA11
VDDQ A1VDDQ A12VDDQ C1VDDQ C4VDDQ C9VDDQ C12VDDQ E1VDDQ E4VDDQ E9VDDQ E12VDDQ J4VDDQ J9VDDQ N1VDDQ N4VDDQ N9VDDQ N12
VSSQ
B1VS
SQB4
VSSQ
B9VS
SQB1
2VS
SQD
1VS
SQD
4VS
SQD
9VS
SQD
12VS
SQG
2VS
SQG
11VS
SQL2
VSSQ
L11
VSSQ
P1VS
SQP4
VSSQ
P9VS
SQP1
2VS
SQT1
VSSQ
T4VS
SQT9
VSSQ
T12
VSS
A3VS
SA1
0VS
SG
1VS
SG
12VS
SL1
VSS
L12
VSS
V3VS
SV1
0
VDDF1VDDF12VDDM1VDDM12VDDV2VDDV11
ZQA4MFA9
RDQS0D3RDQS1D10RDQS2P10RDQS3P3
VSSAJ1VSSAJ12
VDDA K1VDDA K12
SENV4RESETV9BA2H10
C94
6
0.1U
_040
2_10
V7K~
D
1
2
C92
5
4.7U
_060
3_6.
3V6M
~D
1
2
C95
0
0.01
U_0
402_
16V7
K~D
1
2
C95
6
470P
_040
2_50
V7K~
D
1
2
R73
751
1_04
02_1
%~D
12
L85 BLM18PG181SN1_0603~D 12
C95
3
1000
P_04
02_5
0V7K
~D
1
2
C96
2
470P
_040
2_50
V7K~
D
1
2
L84 BLM18PG181SN1_0603~D 12
C94
2
0.01
U_0
402_
16V7
K~D
1
2
R745
511_0402_1%~D
12
C95
9
100P
_040
2_50
V8J~
D
1
2
C95
2
1000
P_04
02_5
0V7K
~D
1
2
R829487_0402_1%~D2@
1 2
C93
2
470P
_040
2_50
V7K~
D
1
2
R738
511_0402_1%~D
12
G
D
SQ662N7002W-7-F_SOT323-3~D
2
13
R740
121_0402_1%~D
1 2
C92
7
0.1U
_040
2_10
V7K~
D
1
2
C95
1
0.01
U_0
402_
16V7
K~D
1
2
C92
9
0.01
U_0
402_
16V7
K~D
1
2
C96
3
470P
_040
2_50
V7K~
D
1
2
C912 0.047U_0402_16V4Z~D 1 2
C93
9
0.01
U_0
402_
16V7
K~D
1
2
C92
1
0.01
U_0
402_
16V7
K~D
1
2
R82
624
3_04
02_1
%~D
2@
12
R74
61.
18K_
0402
_1%
~D
1
2
C95
7
100P
_040
2_50
V8J~
D
1
2
C94
3
4.7U
_060
3_6.
3V6M
~D
1
2
C96
6
100P
_040
2_50
V8J~
D
1
2
R732
121_0402_1%~D
1 2
C94
0
0.01
U_0
402_
16V7
K~D
1
2
U50
K4J52324QE-BC14_FBGA136~D
DQ0 B2DQ1 B3DQ2 C2DQ3 C3DQ4 E2DQ5 F3DQ6 F2DQ7 G3DQ8 B11DQ9 B10
DQ10 C11DQ11 C10DQ12 E11DQ13 F10DQ14 F11DQ15 G10DQ16 M11DQ17 L10DQ18 N11DQ19 M10DQ20 R11DQ21 R10DQ22 T11DQ23 T10DQ24 M2DQ25 L3DQ26 N2DQ27 M3DQ28 R2DQ29 R3DQ30 T2DQ31 T3
A0K4A1H2A2K3A3M4A4K9A5H11A6K10A7L9A8/APK11A9M9A10K2A11L4BA0G4BA1G9
DM0E3DM1E10DM2N10DM3N3
WDQS0D2WDQS1D11WDQS2P11WDQS3P2
VREFH1VREFH12RFU1J2RFU2J3
RAS#H3CAS#F4WE#H9CS#F9
CKEH4CKJ11CK#J10
VDDQ R1VDDQ R4VDDQ R9VDDQ R12VDDQ V1VDDQ V12
VDDA2VDDA11
VDDQ A1VDDQ A12VDDQ C1VDDQ C4VDDQ C9VDDQ C12VDDQ E1VDDQ E4VDDQ E9VDDQ E12VDDQ J4VDDQ J9VDDQ N1VDDQ N4VDDQ N9VDDQ N12
VSSQ
B1VS
SQB4
VSSQ
B9VS
SQB1
2VS
SQD
1VS
SQD
4VS
SQD
9VS
SQD
12VS
SQG
2VS
SQG
11VS
SQL2
VSSQ
L11
VSSQ
P1VS
SQP4
VSSQ
P9VS
SQP1
2VS
SQT1
VSSQ
T4VS
SQT9
VSSQ
T12
VSS
A3VS
SA1
0VS
SG
1VS
SG
12VS
SL1
VSS
L12
VSS
V3VS
SV1
0
VDDF1VDDF12VDDM1VDDM12VDDV2VDDV11
ZQA4MFA9
RDQS0D3RDQS1D10RDQS2P10RDQS3P3
VSSAJ1VSSAJ12
VDDA K1VDDA K12
SENV4RESETV9BA2H10
L86 BLM18PG181SN1_0603~D 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3VL
BAR2_SIZE
SUB_VENDOR
PCI_IOBAR
PCI_DEVID1
PEX_PLL_EN_TERM100
3GIO_ADR_2
PCI_DEVID4
3GIO_ADR_1
PCI_DEVID0
RAM_CFG0RAM_CFG1RAM_CFG2RAM_CFG3
PCI_DEVID2PCI_DEVID3
3GIO_ADR_0
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
XTALSSIN52
RAM_CFG352
PCI_DEVID052
BAR2_SIZE52
PCI_DEVID352
RAM_CFG252
PCI_DEVID152
PCI_IOBAR52
3GIO_ADR_253
SUB_VENDOR53
RAM_CFG152
PCI_DEVID252
RAM_CFG052
3GIO_ADR_153
PEX_PLL_EN_TERM10053PCI_DEVID452
3GIO_ADR_053
XTALOUTBUFF52
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
NVG86 Spread Spectrum & Strapping
57 66Thursday, March 01, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
-1.75% (DOWN)
S0
±0.875% (CENTER)
0
1
S0 Internal pull up
0001
0010
0011
8Mx32 DDR monolithic (32bit)
300MHz, 1.8V
1.8V I/O
300MHz, 1.8V
4Mx32 DDR generic (64bit)
300MHz, 1.8V
4Mx32 DDR generic (32bit)
8Mx32 DDR (Samsung K4D55323QF-GC)
8Mx32 DDR monolithic (64bit)
1.8V I/O
For GDDR1
For GDDR3
Infineon 16Mx32
500MHz, 1.8V
Hynix 16Mx32
500MHz, 1.8V
Samsung 16Mx32
500MHz, 1.8V
MIOB_VSYNC
VBIOS on card (pull high)0VBIOS with system BIOS (pull down)
0001
1001
ROM_TYPE[1:0]
RAM_CFG[3:0]
G72MV STRAPS
0100
PEX_PLL_TERM MIOAD0
01
ValueSTRAPS PIN DESCRIPTION
MIOBD10 Parallel=00, SERIAL AT25F=01 DEFAULT,Serial SST45VF=10, LPC=11
SUB_VENDOR
0
MIOAD1
1100
0010
*
MIOBD0
MIOBD1
MIOBD8
MIOBD9
Device ID strapping
DEVID3 DEVID2 DEVID1 DEVID0
G72GLM
G72M
G72MV
1
0
1
1
0
1
0
0
1
0
0
1
G86MV 1 10 1
R37
02K
_040
2_5%
~D
@
12
R46
2K_0
402_
5%~D
12
R52
2K_0
402_
5%~D
12
L19BLM18AG121SN1D_0603~D
1 2
C29
710
U_0
805_
10V4
Z~D
1
2
R53
2K_0
402_
5%~D
@
12
R805 0_0402_5%~D
12
R801 0_0402_5%~D
12
U21
P1819GF-08SR_SO8~D
XIN/CLKIN1VSS2D_C3ModOUT4 REFCLK 5PD# 6VDD 7XOUT 8
C28
2
0.1U
_040
2_10
V7K~
D
1
2
R44
2K_0
402_
5%~D
12
R47
10K_
0402
_5%
~D@
12
R32
2K_0
402_
5%~D
@
12
R798 0_0402_5%~D
12
R800 0_0402_5%~D
12
R55
10K_
0402
_5%
~D
12
R45
10K_
0402
_5%
~D@
12
R36
02K
_040
2_5%
~D
@
12
R43
2K_0
402_
5%~D
@
12
R40
2K_0
402_
5%~D
12
R54
2K_0
402_
5%~D
@
12
R19
8
10K_
0402
_5%
~D
12
R18310K_0402_5%~D
12
R51
2K_0
402_
5%~D
12
R56
10K_
0402
_5%
~D
12
R18
90_
0402
_5%
~D 12
R57
2K_0
402_
5%~D
2@
12
R33
2K_0
402_
5%~D
12
R799 0_0402_5%~D
12
R802 0_0402_5%~D
12
R19
910
K_04
02_5
%~D
12
R18
42K
_040
2_5%
~D
@
12
R49
2K_0
402_
5%~D
1@
12
R37
12K
_040
2_5%
~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Changed-List History
58 66Monday, February 26, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
38 08/2/2006 Pop R108, depop R106Compal BID change to X01 X011
18 08/10/2006 Compal Change SOT23 package to SOT323 package Change Q102, Q59 to SOT323 package X012
73 08/21/2006 Compal BITS issue WI86517 (S5 state back driver issue) Change R324 pin1 connect from +3.3V_ALW to +3.3V_SUS
4 41 08/21/2006 Compal Bits issue WI84312 (Derating issue) Change R151 from 30 ohm to 75 ohmHW
HW
HW
HW
X01
X01
235 Populate R761 and change value from 100k to 10k. Change R761 pin1 connect from +3.3V_ALW to +3.3V_SUSBits issue WI86509Compal08/21/2006 X01HW
6 39 08/21/2006 Compal Bits issue WI86511HW Add R401 (100K) for signal BC_DAT pull up to +3.3V_ALW X01
7 37 08/21/2006 Compal Bits issue WI86512 X01Change R131 to no-stuff and from 4.7k to 100k per SMSC HW
8 23 HW 08/21/2006 Compal Bits issue WI86516 R509 PU for SIO_EXT_SMI# change from +3.3V_ALW to+3.3V_SUS to prevent backdrive through the ICH in S4/S5 X01
08/21/20069Swap PSID GPIO from ECE5018 pin 71 with MEC5025ITP_DBRESET# pin 55 Bits issue WI86518Compal X01HW38,39
10 08/21/2006 Compal Bits issue WI8653238,39 HW Swap BEEP (ECE5018 GPIOB[6]) with PLTRST_DELAY#(MEC5025 SGPIO46) X01
Bits issue WI86752Compal08/21/2006 X01Change pull-up rail for R773 from +5V_SUS to +3.3V_SUSHW1811
08/30/2006 Compal Bits issue WI8653012 21 HW X01Move SB_NB_PCIE_RST# to GPIO4/PIRQG# pinF12 per M08design
Bits issue WI86529Compal09/7/2006 X01HW2113 Move SB_WLAN_PCIE_RST# to GPIO3/PIRQF# U32 pin G11 perM08 direction, add test point T1 on pin F18
09/7/2006 CompalBits issue WI86376. Due to increase in number ofpayloads the BIOS is carrying X01
Change U23 from ( ST M25P80 8M bit ) to ( MXICMX25L1605AM2C 16M bit )14 39 HW
09/7/2006 Compal15 54 Bits issue WI87262. Add depopulated soft start capacitor Add C85 (470PF_0402) across R244 X01HW
09/11/200616 43 Compal Bits issue WI90535Change Q5 to MMBT3906WT1G, R15 to 150 ohm. Add R638 onLED_WLAN_OUT# pull up to +3.3V_WLAN. Add R639 (10K ohm)in series on LED_WLAN_OUT#
HW X01
09/14/200617 7 Compal Briscoe ESD/EMI Improvement Requests on PT Remove ITP port and just keep ITP test point HW X01
18 09/14/200634 HW Compal Bits issue WI90713 No stuff C16 X01
19 09/14/200643 HW Compal Bits issue WI90712 Remove R73, R178, C192, and C193 X01
20 43 HW 09/14/2006 Compal Bits issue WI90705 Add SMBus isolation circuit for WLAN,R640,R645,R660,R662,Q45,Q46 X01
21 34 HW 09/14/2006 Compal Bits issue WI90696 JMINI1 connect to +3.3V_RUN. Removed C427 X01
22 12 HW 09/14/2006 Compal Shunt caps on LVDS for improving WWAN Add C181,C192,C193,C196,C207,C209 cross LVDS signals X01
23 27 HW 09/14/2006 Compal Bits issue WI90516 Remove C759 from mic amp bias circuit X01
24 26 HW 09/14/2006 Compal Bits issue WI90487 Populate R541to cut BEEP level in half X01
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Changed-List History
59 66Monday, February 26, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
18,52 09/14/2006Connect THERMTRIP_VGA# from U10 pinB13 to U10 pin A13.Populate R186 for THERMTRIP_VGA# pull upCompal Bits issue WI90207 X0125 HW
HW43 09/14/2006 Compal Bits issue WI89637 Populate EMI Clips Clip1, Clip2, Clip3, Clip4, Clip6 X0126
HW23 09/14/2006 Compal Bits issue WI89409 No stuff R516, add R690 (8.2K ohm) for pull up ICH8 pinAF22 to +3.3V_SUS X0127
25 HW 09/14/2006 Compal28 Bits issue WI89407Add Q68, Q69, R691, R692 for HDDC_EN and MODC_ENcircuits X01
29 41 HW 09/14/2006 Change connect R765 pin1, R623 pin1, R621 pin1, R766pin1, R637 pin1, R300 pin1 from +5V_ALW to +5V_ALW2Compal Bits issue WI89394 X01
Change R387,R389 from 1M to 2.7K. Add R778,R779 forAUX_ON,AC_OFF30 37,39 HW 09/14/2006 X01Compal Bits issue WI89379
Change R730 from 100K to 4.7K ohm31 39 HW 09/15/2006 X01Compal Bits issue WI92249
32 57 Remove R39HW 09/15/2006 Compal Bits issue WI92188. The MIO_A_D0 signal has an internalpull-down in the GPU X01
33 53,55 HWU10 (NV86) pin F11,F12 connect to test point T89,T90for testing and debug09/18/2006 Compal Bits issue WI92289 X01
34 23 HW 09/18/2006 Compal PLTRST_DELAY# move from ECE5018 GPOB[6] to ICH8 GPIO38 Bits issue WI92296 X01
35 34 Bits issue WI92287,WI90716 R660 and R662 connected to CLK_SCLK and CLK_SDATA. X01HW 09/18/2006 Compal
36 X01Populate SSCG U21,R189,R198,R199,L19,C297,C282,R166.depopR165. Populate RS232 C152,153,154,155,156,157,158,159. Resume ICH_AZ_MDC_BITCLK C656,R123,C128.Add R790,R791,C232, C267. Change L63,L65 from 0603sizeto 0805size. Add C309,C316 for LOM. Add C427,C463 forLVDS. Add fuse F3, R792 for CRT. Populate C660, R545 (10ohm),C721 (10P)
EMI solutions HW57,37,22,33,28,19,20
Compal09/18/2006
37 23,36 HW Bits issue WI92298 Move SIO_EXT_SCI# from to ICH8 GPIO11/SMBALERT# pin AG22to GPO12 pin AC19. Remove D22 and R761 and net DOCK_DET# X0109/18/2006 Compal
38 23 HWICH8 Pin AG22 tie to LOM_ICH_SMBALERT#. Add R793 (0 ohm)series on LOM_ICH_SMBALERT# and LOM_SMB_ALERT#. ChangeR730 pull up rail from +3.3V_ALW to +3.3V_LAN. Add R807pull up to +3.3V_SUS for LOM_ICH_SMBALERT#
X0109/18/2006 Compal
39 X01Move ALW_PWRGD_3V_5V from MEC5025 pin 18 to MEC5025pin 29. Remove 3.3V_5V_SUS_PWRGD from MEC5025 pin 2939 HW Bits issue WI9230109/18/2006 Compal
40 38,39Swap DOCK_SMB_PME and DOCK_SMB_ALERT# from MEC5025 pin3and ECE5028 pin76 X01HW 09/18/2006 Compal Bits issue WI92305
41 39,42 HW 09/18/2006 Removed 3.3V_LAN_PWRGD from MEC5025 KSO15/GPIO5.Remove U52,Q83,D29,R89,R98,R381,C784,C182,C183,C184 X01Compal Bits issue WI92308
42 Compal09/18/2006HW39 Add R795 (10K ohm) pull down for MEC5025 pin 14 X01Bits issue WI92312
43 Compal29 HW 09/19/2006 Populate R671~R678 and C866~C869. Change L69~L76 from24NH to 36NH inductor X01EMI issue
44 27 CompalHW 09/19/2006 Bits issue WI90510 Add R796,R797 (0ohm) between L47/L48 and C728/C730 X01
45 57 HW Compal09/20/2006 EMI request Add R798~R803 for strap damping X01
Bits issue WI92299
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Changed-List History
60 66Monday, February 26, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
18 09/20/2006 Compal46 HW Bits issue WI92860 Depop Q39 and R427 X01
HW Bits issue WI92858Change R669 to from 1.15K to 1.13K. Depop C771 & C772.Change C861 and C862 to 22pF X0128 09/20/2006 Compal47
HW Bits issue WI92857 Add no-stuff series 0-ohm for ITP_DBRESET# on ECE5028 X0148 38 09/20/2006 Compal
HW Bits issue WI93157 Remove R586 and make JMDC pin2 NC49 33 X0109/21/2006 Compal
HW Bits issue WI93158 Depop Q45, Q4650 34 09/21/2006 Compal X01
HW51 Bits issue WI93403 C484 change to 33pF, C861/C862 change to 22pF 6 09/25/2006 Compal X01
No Populate C866-C869/R671-R67852 HW Bits issue DF86424 X0129 09/26/2006 Compal
53 Add D37-D40 for stick point signalsEMI requestHW40 X01Compal09/26/2006
54 32 HW Bits issue DF94094 Add FUSE4,FUSE509/27/2006 Compal X01
55 9 HW Bits issue WI9492309/28/2006 Compal C329,C330 chagne back to 10 0805 X6S X01
56 18 HW 10/05/2006 Compal Bits issue WI94892 Populate R771, C750, R772, Q102, R773 X01
57 Bits issue WI95910Compal10/05/2006HW30 X01Change R603 from 6.2k to 5.9k.Change C805 from 820pF to 270pF
58 10/05/2006 Compal Bits issue WI9593238,2327,6 HW
No stuff R227, R221, C89, C93, C97, c401, C92, r72, C90,C94. No stuff C775-C781, C785. No stuff R514 (no iAMT).Populate R515.
X01
36 HW Dell10/14/2006 Bits issue WI97539Added signal DOCK_DET# to JDOCKBpin137, pin205 andQ3pin259
Add 0.1 uf (0402) caps on +Vcc_Core to Gnd. Fourtotal, bottom of board. (C870 ~ C873)Bits issue WI97837Dell10/17/2006HW960
X02
X02
23 HW 10/18/2006 DellBits issue WI98222 (Change for ASF2.0 due to ICH8M errata ) 1. No stuff R502, R503
2. Connect the pad of R503.2 to the pad of R498.23. Connect the pad of R502.1 to the pad of R499.2
61 X02
Board ID Changed to X02Dell10/24/2006HW Populated R106, R107. Depopulated R108, R109.3862 X02
Dell10/24/2006HW The DevID for G86 on Briscoe needs to be updated to 10113862 X02Bits issue WI98660
63 23 HW 11/16/2006 Dell Bits issue WI104573 X02Add R816,C874 for USB_IDE#. R817,C875 for SIO_EXT_WAKE#.R819,C876 for PCIE_MCARD1_DET#. R820,C878 forUSB_MCARD1_DET#. R818,C877 for USB_MCARD2_DET#. Removenet RSVD_GPIO6 and R513
64 6,23,34 HW 11/16/2006 Dell Bits issue WI103311 Change R309 from 8.2K to 2.2K. No stuff R820.No stuff R550 X02
65 39 HW 11/18/2006 X02Change C379 from 22pF to 33pF per KDS X'tal reportDell Bits issue WI103986
Change net name from +5V_ALW2 to +3.3V_ALW2 at R618.1,R626.1, R623.1, R621.1, R766.1, R765.1, R637.1, R300.66 HW Bits issue WI105207 X0325,41 11/20/2006 Compal
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Changed-List History
61 66Monday, February 26, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Dell11/21/2006HW2867 X02Bits issue WI105200Change L64,L66,L67,L68 from BLM18AG601SN1D toBK1608LM182. Change R668 to L88 BK1608LM182.Change L63,L65 from BLM21AG601SN1D to BK2125LM182.
Dell11/21/2006HW6,54,57 X02Depop R697,change R286 to 0 ohm.Pop L53,depop L16.PopL27,C314,C315.Depop L20,L21,pop L54,L55.Depop L17.Bits issue WI10571268
38,39 HW 11/21/2006 DellChange R794 pin1 from +5V_ALW to +3.3V_ALW.Change R245 pin1 from +3.3V_ALW to +5V_ALW X02Bits issue WI105754
26 HW 11/21/2006 DellAdd 100kohm resistor R721 between U35 pin 40 and+3.3V_RUN and 1000pF cap C759 X0270 Bits issue WI105758. Updates for potential Back Drive
69
Please populate R820 with a 4.7k-ohm resistor. Movesignal PCIE_MCARD2_DET# from ICH8m GPIO20 pinAE11 toPIRQH#/GPIO5 pinB3. Delete R457 and netICH_GPIO5_PIRQH#. Populate R550
21,23,34 HW X0212/1/2006 Dell71 Bits issue WI106999
41 HW Populate C208 72 12/1/2006 Dell Bits issue WI107466. +2.5V_LAN in-rush current test fai. X02
73 6 HW 12/5/2006 Change R286 from 0 ohm to 33 ohmsDell Bits issue WI107881 X02
74 27 HW 12/6/2006 Dell Bits issue WI107896 Change R554 from 10K to 0 ohm X02
75 36,38 HW 12/6/2006 Dell Bits issue WI108259. Per M08 GPIO map rev A15 Change list Change net DOCK_SMB_PME to DOCK_SMB_PME# X02
HWChange C177,C179,C178,C366,C338,C365 toEEFSX0D221E7 220uFBits issue WI108223Dell12/6/2006976 X02
HW Bits issue WI109622. Per NB8M PUN document Change R35 from 60.4 ohm to 40.2 ohm77 52 12/12/2006 Dell X02
HW78 55 12/13/2006 Bits issue WI109627 Change R174 from 40.2 ohm to 30 ohmDell X02
79 HW39 12/14/2006 Dell Bits issue WI110179Add EC_FLASH_PAD pin1 connect to +3.3V_ALW,pin2 connectto R76 pin1 and R80 pin1 X02
HW2780 Bits issue WI110158Dell12/15/2006 X02Add R822 (1M_0402) from Pin 10 (C1P) pin of MAX9789Ato ground
81 26 X02Add R823 (10K_0402) to ground on pin 47 of STAC9205(U37)HW 12/18/2006 Dell Bits issue WI110749
82 Bits issue WI111288Dell12/20/2006HW29 X02Change R683 from 150ohms to 110 ohms, R684from150ohms to 200ohms
83 12/25/2006 Dell Change AC Coupling Cap SPEC for PCIE12,2328 HW
Change C500~C531,C664,C666~C670,C851,C853 from 0.1uF Y5Vto 0.1uF X7R X02
84 1/5/2007 Dell54,55 HW Bits issue WI113179Change R174 to 24.9 ohm for G86, Add R824 40.2 ohm forG72. Change R35 to 45.3 ohm G86, add R825 60.4 ohm forG72MV
X03
85 56 HW 1/5/2007 Dell Bits issue WI113180 Add R826,R827 243 ohm for G86 X03
86 53,56 HW 1/5/2007 Dell Bits issue WI113227 Add R828,R829,R830,R831,R832 487 ohm for G86 X03
87 38 HW 1/5/2007 Dell Chagne Board ID to X03 Populate R108, de-pop R106 X03
Dell1/8/2007HW688 X03Change U10 value to G86-620-A2. Add R833=147 ohm withR697 use 1@ for G72. R286=33 ohm use 2@ for G86.Change R48 note to "Reserved for GFx debug".
Bits issue WI113588
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.4
Changed-List History
62 66Wednesday, March 07, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
89 1/26/2007 Dell Bits issue WI115658. M08 GPIO map rev A16 change X03Change ECE5028 GPIOF4 from BID2 to CHIPSET_ID.38 HW
90 X0323 2/12/2007 Dell Bits issue WI121957 Add R834 (1M_0402_1%) for ICH_LAN_RST#HW
Bits issue WI121438Dell2/12/20072791 Change R565 from 10K to 100k ohmHW
Bits issue DF11681392 41 2/12/2007 DellHW Depop C194, changed C815 from 4700pF to 2200pF
93 54 2/14/2007 Dell Modify pop option symbol for G72M/G86M power beadHW L53,L27,L55,L54, with 2@, L16,L17,L21, L20, with 1@
94 57 2/14/2007 Dell Modify NV strap tableHW Change GDDR3 table from 500 MHz to 700 MHz
95 18 2/26/2007HW Dell Bits issue WI124164 populate C640 = 10uF for G72MV. Add 1@ for C640
96 54 57 HW 2/26/2007 Dell Bits issue WI124408 Add note "Populate C251, C255 for G86 and G72 solutionper Nvidia". Add 2@ for C314, C315, R805 and R57. Add1@ for R49.
97 54 HW 2/27/2007 Dell Bits issue WI123608 Change C233 from X5R to X7R
X03
X03
X03
X03
X03
X03
X03
98 23 HW 2/27/2007 Dell Bits issue WI125173. Per Intel's latest recommendation Change R834 from 1M to 10K X03
100 18 52 HW 2/28/2007 Dell Bits issue WI124613. Need to connect THERMTRIP_VGA to thethermal sensor for G86 Add 2@ for R756, R187, Q76, C203 X03
99 54 HW 2/28/2007 Dell Bits issue WI123608 Change C233 back to X5R X03
101 18 HW 3/1/2007 Dell Bits issue WI125873. Populate circuit for THERMTRIP_MCH# Populate R427 and Q39 X03
102 27 HW 3/7/2007 Dell Bits issue WI127300 Change U40 from 74AHC1G08 to 74AHCT1G08 X03
5
5
4
4
3
3
2
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1
1
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C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
0.6
Changed-List History 1
63 66Monday, February 26, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
1 0.1
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2 PWR
3 PWR
4 PWR
5
PWR
6
7
8
9
10
11
12
13
14
15
48/50
9/14
change the AL CAP to 2000hrchange PC380 from SF10004M08L to SF000000S8L.change PC381 from SF10004M08L to SF000000S8L.change PC382 from SF10004M08L to SF000000S8L.
45 change to correct parts for 15ALW
change to PSL of DELL
change PD55 from SCSB717F08L to SCS00001U8L.change PD56 from SCSB717F08L to SCS00001U8L.
48
44
44 PWR
change PH2 from SL20000030L to SL200000F8L
change PL1 from SM01001680L to SM010008U0L.
change PL2 from SM01001418L to SM010009C8L.change PL34 from SM01001418L to SM010009C8L.
LA-3302P
remove PR437, PR438, PR441, PQ93 and PQ94.
BITS-WI89364The 0.9V_DDR_VTT_PWRGD net is not used at the MEC5025.The 0.9V_DDR_VTT_PWRGD net should be no connect at the MEC5025 pin 73.
BITS-WI91011change to correct current limits
Change PR383 from 124K(SD03412438L) to 150K(SD03415038L).Change PR382 from 187K(SD03418738L) to 226K(SD03422638L).
Depopulate PR415 and PR416 resistors.BITS-WI91278following DELL rule
BITS-WI91289be compliant with the reference schematic.
BITS-WI91295 Implement changes to 1.25V_RUN and GPU Core regulators
Add PC410 10uF, 1206, 25V at the input rail (+PWR_SRC) of the 1.25V_RUN regulator.Change PR460 from 0 ohm(SD01300008L) to 1 ohm(SD013100B8L).Change PR459 from 0 ohm (SD01300008L) to 1 ohm(SD013100B8L).Change PR449 ground connection from AGND to PGND.
Change PR408 from 75K(SD03475028L) to 82.5K(SD00000278L). BITS-WI91372following DELL rule
BITS-WI91682DC IN schematic changes.
PWR
PWR
PWR
PWR
PWR
PWR
PWR
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
DELL
Elick
DELL
DELL
DELL
DELL
46
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
DELL
DELL
DELL
DELL
DELL
DELL
47
44
51
49
47
45
45 PWR 9/14 DELL BITS-WI90985following DELL rule
Change PC285 pin 2 pad connection from PGND to AGND.
0.1
9/14 DELL 0.1PWR BITS-WI90988Change PQ83 from FDS8880 to BSC079N03SG PPAK
45
change to PSL of DELL
change to PSL of DELL
PWR 9/15 DELL 0.1BITS-WI92173correct the current limit on GPU CORE regulator
Change PR451 from 140K(SD03414038L) to 182K(SD03418238L)51
Change PR274 from 4.7 ohm(SD000006T8L) to 33 ohm(SD014330A8L). Populate PR373 and PD54.
Change PL1 from SM01001680L to SM010008U0L.Change PQ100 from SI2301BDS(SB923010020) to PQ100A depopulated IMD2A(SB000009N8L).Change PQ101 from SI2301BDS(SB923010020) toPQ100B depopulated IMD2A(SB000009N8L).Change PR12 from 10K,0603(SD01310028L) to 4.7K,0805(SD00247018L).
Change PQ83 from SB000004U8L to SB000004D8L.
5
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3
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2
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C C
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Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.6
Changed-List History 2
64 66Monday, February 26, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
20
16 PWR
17
21
22
23
24
25
26
27
51 9/15 DELL BITS-WI92161correct the current limit on 1.25V_RUN regulator.
Change PR453 from 140K(SD03414038L) to 205K (SD03420538L) 0.1
18
19
46 PWR 9/15 DELLBITS-WI91932correct the current limit on 1.8V output
Change PR202 from 61.9K(SD03461928L) to 100K (SD03410038L) 0.1
46 PWR 9/18 DELLBITS-WI92459follow BITS of DELL
change PR193 to be populate.change PR506 to be populate.change PR505 to be depopulate.
0.1
48 PWR 9/18 DELL
BITS-WI92462improve transients at load dump.and reduce jittering.
Add depopulate PR516(SD03410018L) and depopulate PC413(SE076103K8L)between pin 9 of PU11 and AGND.Add depopulated PC411(SE075472K8L),4700pF between pin 14 of PU11 and AGND .Add depopulated PC412(SE075472K8L),4700pF between pin 15 of PU11 and AGND
0.1
BITS-WI87245PWRGD signals are reversed coming from the wrong side of the IC.
Change the node name at pin 13 of PU25 from GFX_CORE_PWRGD to 1.25V_RUN_PWRGD.Change the node name at pin 28 of PU25 from 1.25V_RUN_PWRGD to GFX_CORE_PWRGD .Remove +3.3V_RUN node connected to pin 2 of PR462.Remove +3.3V_ALW node connected to pin 1 of PR483.Remove +3.3V_ALW node connected to pin 1 of PR450.Remove totally PR462 pad, PR483, PR450.
0.151 PWR 9/18 DELL
51 PWR 9/20 Elick change GPU_CORE voltage change PR446 from 10k to 13.7k(SD03413728L) 0.1
44 PWR 9/21 DELLBITS-WI91682change PL1 from BK1608HM to BLM18BD102SN1D. change PL1 from SM010008U0L to SM010007C8L. 0.1
0.148/50 PWR 9/21 DELL
BITS-WI87563change populate PC380 from 25CE100AX to 25CE100LSchange PC381 from 25CE100AX to 25CE100LSchange PC382 from 25CE100AX to 25CE100LS
change populate PC380 from SF000000S8L to SF000000T8L.change PC381 from SF000000S8L to SF000000T8L.change PC382 from SF000000S8L to SF000000T8L.
match Maxim's response time of ICM input to comparator.
ICM is voltage source and does not need this component.Increase BW from 20kHz to 25kHz while maintaining 80degrees phase margin.
following DELL rule
49
49
49
49
PWR
PWR
PWR
PWR
9/29
9/29
9/29
9/29
DELL
DELL
DELL
DELL
change PR361 from 0 Ohm (SD02800008L) to 8.45K (SD00000068L).change PC254 from 0.01uF 25V (SE068103K8L) to 0.1uF 16V (SE076104K8L).
depopulate PR150.
change PR148 from 4.7K (SD03447018L) to 10K (SD03410028L).
depopulate PD54 and PR373
0.1
0.1
0.1
0.1
28 48 PWR 10/27DELL
Add bead to connect +PWR_SRC to +CPU_PWR_SRC Add PL47(SM01002078L) to parallel PJP30.
0.2
5
5
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4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.6
Changed-List History 2
65 66Monday, February 26, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PWR DELL10/2729BITS-WI99895This is to add an optional ultrasonic mode in case the regulators experience an audible noise.
45,46,47,51
Add PR517 0 ohm 0402(SD02800008L) between pin 29 of PU20 and AGND .Add PR519 0 ohm 0402(SD02800008L) between pin 29 of PU21 and AGND .Add PR520 0 ohm 0402(SD02800008L) between pin 29 of PU25 and AGND .Add PR518 0 ohm 0402(SD02800008L) between pin 26 of PU6 and AGND .
0.2
30 49 PWR 10/27 DELLBITS: WI102600 Change PR148 from 10K_0402_1% to 2.2K_0402_5%
change PR148 from 10k 0402 1%(SD03410028L) to 2.2k 0402 5%(SD02822018L) 0.3
31 45 PWR 11/20 DELLBITS-WI105406Add node name +3.3V_ALW2 for the traceconnected to the pin 5 (VREF3) of PU20.Populate PC285 with 0.1uF cap.
Add node name +3.3V_ALW2 between pin5 of PU20 and PC285.Populate PC285. 0.3
32 49 PWR 12/06 DELLBITS-WI106278make sure that PC113, PC114 and PC379 are X5R/X7R caps, need to stuff PC379.
change PC379 is populated. 0.3
33 48 PWR 12/06 DELL
BITS-WI108229Change PC187 from 10nF to 15nF. Change PR258 from 2.21K to 1.69K. Populate PR516 with 1K resistor. Populate C413 with 0.01uF.
change PR187 from 10nF(SE076103K8L) to 15nF(SE076153K8L).change PR258 from 2.21K(SD03422118L) to 1.69K(SD00000JB8L).populate PC413.populate PR516.
3451
PWR 01/04 ELICK EMI CLK issue
Add PL3 to parallel PJP54.add PC414 to connect between GPU_CORE to GND.add PC415 to connect between GPU_CORE to GND.
0.3
0.3
35 49 PWR 01/25 ELICK change to new part number for PSL
change PR138 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512 FOR M08 PROJECTS)change PR145 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512 FOR M08 PROJECTS)
0.4
change PL2 from SM010009C8L(TAIYO FBMJ4516HS720NT 1806) to SM01000BI0L(KC FBCA-K5B-302340-L1-T 1812 ).change PL32 from SM010009C8L(TAIYO FBMJ4516HS720NT 1806) to SM01000BI0L(KC FBCA-K5B-302340-L1-T 1812 ).
change bead to 9A 1812 in DC-IN.36 44 PWR 01/26 ELICK 0.4
37 45/47/51 PWR 02/05 DELLBITS-WI119950Increase current limits for 3.3V, 1.5V and GPU_CORE regulators.
change PR382 from 226K to 267k (SD02822018L).Change PR408 from 82.5K to 100K(SD03410038L).Change PR451 from 182K to 205K(SD03420538L) . 0.4
38 49 PWR 02/06 DELLadditional 1206 resistor on +VCHGR for Maxim solution. add an unpopulation PR522 (1.8K 1206 1%(SD00000JN8L))between
+VCHGR to PGND. 0.4
39 49 PWR 02/12 DELL delete 1206 resistor on +VCHGRnot to implement for Maxim solution.
delete an unpopulate PR520 (1.8K 1206 1%(SD00000JN8L))between +VCHGR to PGND. 0.4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-3302P 0.6
Changed-List History 2
66 66Thursday, March 01, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
40 51 PWR 02/26 DELLBITS-WI123151GPU Core Voltage for G86MV is staying at 1.15V all the time
Nostuff: PR447, PR457, PC370, PR452, PQ98, PR461, PC371, PR458, PQ99, PR454, PR455.Change 2@PR449 from 20.5K to 18.7K 0402 1%(SD03418728L ) Add 2@PR522 = 196K, 0402. <-- This would be a 2@ resistor added in parallel to the existing PR451
0.4