3 PHASE MULTILEVEL INVERTER USING.pdf

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  • 3 PHASE MULTILEVEL INVERTER USING BIDIRECTIONAL CHOPPER CELL Project report submitted in partial fulfillment of the requirements for the award Of the degree of BACHELOR OF TECHNOLOGY IN ELECTRICAL AND ELECTRONICS ENGINEERING By K.MANJU NAGA SRI (08241A0221) G.RAMYA (08241A0236) B.VANI (08241A0253) B.SHRUTHI (09245A0206) Under the guidance of Mr.E.VENKATESWARULU Associate Professor

    Department of Electrical and Electronics Engineering GOKARAJU RANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY, BACHUPALLY, HYDERABAD-72 2012

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  • GOKARAJU RANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY HYDERABAD, ANDHRA PRADESH DEPARTEMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

    C E R T I F I C A T E This is to certify that the project report entitled 3-PHASE MULTILEVEL INVERTER USING BIDIRECTIOAL CHOPPER CELL that is being submitted by K.MANJU NAGA SRI, G.RAMYA, B.VANI, B.SHRUTHI in partial fulfillment for the award of the degree of Bachelor of technology in Electrical and Electronics Engineering to the Jawaharlal Nehru Technological University in a record of bonafide work carried out by them under my guidance and supervision. The results embodied in this project report have not been submitted to any other University or Institute for the award of any Graduation degree. Mr.P.M.Sarma Mr.E.Venkateswarlu External examiner HOD, EEE Assistant Professor,EEE GRIET, Hyderabad GRIET, Hyderabad (Internal Guide)

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  • ACKNOWLEDGEMENT This is to place on record my appreciation and deep gratitude to the persons without whose support this project would never seen the light of day. We immensely be grateful to Prof.P.S.Raju, Director, G.R.I.E.T. and Prof.Jandhyala N Murthy, Principal, G.R.I.E.T. for having permitted us to carry out this project. I wish to express my propound sense of gratitude to DR.Satyendra Saxena, G.R.I.E.T for his guidance, encouragement, and for all the facilities to complete this project. I also express my sincere thanks to Prof.P.M.Sarma, Head of the department, G.R.I.E.T for extending his help. I have immense pleasure in expressing my thanks and deep sense of gratitude to my guide Mr.E.Venkateswarlu, Assistant Professor, Department of Electrical Engineering, G.R.I.E.T for his guidance throughout this project. Finally I express my sincere gratitude to Mr.M.Chakravarthy, Associate Professor, Department of Electrical and Electronics Engineering, G.R.I.E.T and all the members of faculty and my friends who contributed their valuable advice and helped to complete the project successfully.

    K.MANJU NAGASRI (08241A0221)

    G.RAMYA (08241A0236)

    B.VANI (08241A0253)

    B.SHRUTHI (09245A0206)

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  • ABSTRACT This report comprises of the operation of 3 phase multilevel inverter using bidirectional chopper cells. This report gives the detailed overview about basic operation of inverter, types of inverters. The difference of 3 phase multilevel inverter using bidirectional chopper cells and normal basic inverters is shown Simulation for a 2 level inverter using bidirectional has been performed .The simulations have been carried out in PSIM software. Total Harmonic Distortion (THD) calculations have been done practically. Output voltages at different frequencies and voltages have been observed during simulation. Output voltages have been observed in the C.R.O.

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  • CONTENTS

    Chapter 1: INTRODUCTION

    1.1Inverter 1

    1.2Types of Inverter 1

    Chapter 2: MULTILEVEL INVERTER

    2.1 Multilevel Concept 6

    2.2 Types of Multilevel Inverters 8

    2.2.1 Diode Clamped Multilevel Inverter 9

    2.2.2 Flying Capacitor Multilevel Inverter 11

    2.2.3 Cascaded Bridge Multilevel Inverter 14

    2.2.4 Multilevel Inverter Using Bidirectional Chopper Cell 17

    Chapter 3: SIMULATION

    3.1 Description 20

    3.2 Calculations 23

    3.3 Results 24

    3.4 Output Graphs 25

    iii

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  • 3.5 Output voltage waveforms at different frequencies 26

    3.6 Pulses to Mosfets 28

    Chapter 4: . HARDWARE DESCRIPTION 4.1 Power Supply Circuit 31

    4.2 Main Circuit 33

    4.3 Driver Circuit 34

    4.4 Over View Of entire circuit 35

    4.5 Output Wave Form 36

    Chapter 5:CONCLUSION & SCOPE OF FUTURE 37

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  • References 38

    Appendix A 39

    Appendix B 45

    Appendix C 46

    Appendix D 47

    Appendix E 53

    Appendix F 57

    Appendix G 60

    v

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  • LIST OF FIGURES

    Fig 1.1 (a) circuit diagram (b) voltage waveforms

    Fig 2.1 Three-phase multi level power processing system

    Fig 2.2 Schematic single pole of multi level inverter by a switch

    Fig 2.3 Typical output voltage of a five level Multi Level Inverter

    Fig 2.4 Diode Clamped Multilevel Inverter

    Fig 2.5 line voltage waveform for 6 level diode clamped inverter

    Fig 2.6 Diode clamped six level inverter voltage levels and

    corresponding switch states

    Fig 2.7 Three phase six level structure of a flying capacitor

    Fig 2.8 Switching States

    Fig 2.9 Single phase structure of a multilevel cascaded H bridge inverter

    Fig 2.10 Output phase voltage waveform of an 11-level cascade inverter

    with 5 separate dc sources

    Fig 2.11 Bidirectional Chopper Cell

    Fig 3.1 Circuit diagram

    Fig 3.2 Output voltage

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  • Fig 3.3 Output Current

    Fig 3.4 Output Voltage at Vin=5V, at F=20HZ

    Fig 3.5 Output Voltage at Vin=5v, F=40HZ

    Fig 3.6 Output Voltage at Vin =5v,F=50Hz

    Fig 3.7 Output Voltage at Vin =5v,F=60Hz

    Fig 3.8 Output Voltage at Vin=5v,F=100Hz

    Fig 3.9 Output Voltage at Vin=5v, F=50Hz

    Fig 3.10 Output Voltage at V=5v, F=150HZ

    Fig 3.11 Pulses to Mosfets M1, M2

    Fig 3.12 Pulses to Mosfets M3, M4

    Fig 3.13 Pulses to Mosfets M5, M6

    Fig 3.14 Pulses to Mosfets M7, M8

    Fig 3.15 Pulses to Mosfets M9, M10

    Fig 3.16 Pulses to Mosfets M11, M12

    Fig 4.1 Power supply Circuit for microcontroller

    Fig 4.2 Main Circuit

    vii

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  • Fig 4.3 Driver Circuit

    Fig 4.4 Overview of entire circuit

    Fig 4.5 Output wave form

    viii

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  • CHAPTER 1 INTRODUCTION 1.1 INVERTER

    Inverter:

    Inverter is a device that converts electrical power from dc form to ac form using electronic

    circuits.

    Fig 1.1 (a) circuit diagram (b) voltage waveforms

    A single-phase inverter, in which M1 & M2 Conduct for half a period and M3 & M4 conduct for

    the other half. The output voltage can be controlled by varying the conduction time of the

    transistors.

    Static Switches: Since the power devices can be operated as static switches or contactors, the

    supply to these switches could be either AC or DC, and the switches are called as AC static

    switches or DC switches.

    1.2 Types of inverters:

    1. Square wave

    11

  • 2. Modified square wave

    Multilevel

    Pure sine wave

    Resonant inverter

    Grid tie inverter

    Synchronous inverter

    Stand-alone inverter

    Solar inverter

    icro-inverter

    3.

    4.

    5.

    6.

    7.

    8.

    9.

    10. Solar m

    11. Air conditioner inverter

    12. CCFL inverter

    1 .Square wave:

    The square wave output has a high harmonic content, not suitable for certain AC loads

    such as motors or transformers. Square wave units were the pioneers of inverter development.

    2. Modified sine wave:

    The output of a modified square wave, quasi square, or modified sine wave inverter is

    similar to a square wave output except that the output goes to zero volts for a time before

    switching positive or negative. It is simple and low cost (~$0.10USD/Watt) and is compatible

    with most electronic devices, except for sensitive or specialized equipment, for example certain

    laser printers, fluorescent lighting, audio equipment .Most AC motors will run off this power

    source albeit at a reduction in efficiency of approximately 20%[2].

    3 .Multilevel:

    12

  • Multilevel inverter is a power electronic system that synthesizes a desired voltage from several

    levels of direct current voltage as inputs. The advantages of using multilevel topology include

    reduction of power ratings of power devices and lower cost. There are three topologies - diode

    clamped inverter, flying capacitor inverter and cascaded inverter.

    4. Pure sine wave:

    A pure sine wave inverter produces a nearly perfect sine wave output (less than 3% total

    harmonic distortion) that is essentially the same as utility-supplied grid power. Thus it is

    compatible with all AC electronic devices. This is the type used in grid-tie inverters. Its design is

    more complex, and costs more per unit power. The electrical inverter is a high-power electronic

    oscillator. It is so named because early mechanical AC to DC converters were made to work in

    reverse, and thus were "inverted", to convert DC to AC.

    5. Resonant inverter:

    Resonant inverters are based on electrical resonance current oscillations.Resonant inverters

    are electrical inverters based on resonant current oscillation. In series resonant inverters the

    resonating components and switching device are placed in series with the load to form an under

    damped circuit. The current through the switching devices fall to zero due to the natural

    characteristics of the circuit. If the switching element is a thyristor, it is said to be self-

    commutated.

    6. Grid tie inverter:

    A grid-tie inverter (GTI) is a special type of inverter that converts direct current (DC)

    electricity into alternating current (AC) electricity and feeds it into an existing electrical grid.

    GTIs are often used to convert direct current produced by many renewable energy sources, such

    as solar panels or small wind turbines, into the alternating current used to power homes and

    businesses. The technical name for a grid-tie inverter is "grid-interactive inverter". They may

    also be called synchronous inverters. Grid-interactive inverters typically cannot be used in

    standalone applications where utility power is not available.

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  • Inverters take DC power and invert it to AC power so it can be fed into the electric utility

    company grid. The grid tie inverter must synchronize its frequency with that of the grid (e.g. 50

    or 60 Hz) using a local oscillator and limit the voltage to no higher than the grid voltage. A high-

    quality modern GTI has a fixed unity power factor, which means its output voltage and current

    are perfectly lined up, and its phase angle is within 1 degree of the AC power grid. The inverter

    has an on-board computer which will sense the current AC grid waveform, and output a voltage

    to correspond with the grid.

    Grid-tie inverters are also designed to quickly disconnect from the grid if the utility grid goes

    down. This is an NEC requirement that ensures that in the event of a blackout, the grid tie

    inverter will shut down to prevent the energy it produces from harming any line workers who are

    sent to fix the power grid.

    7. Synchronous inverter:

    A synchronous inverter is an inverter that additionally feeds power to and from the public

    power grid. During a period of overproduction from the generating source, power is routed into

    the power grid, thereby being sold to the local power company. During insufficient power

    production, it allows for power to be purchased from the power company.

    8. Stand-alone inverter:

    A stand-alone inverter is an electrical inverter that converts direct current into alternating

    current independently of a utility grid. Stand-alone inverters are often used to convert direct

    current produced by many renewable energy sources like solar panels or small wind turbines,

    into the alternating current used to power homes and small industries. These types of inverters

    are mostly used in residential buildings, in remote locations which are devoid of the utility grid

    and are powered by renewable energy sources.

    9. Solar inverter:

    A solar inverter, or PV inverter, converts the variable direct current output of a photovoltaic

    (PV) solar panel into a utility frequency alternating current that can be fed into a commercial

    electrical grid or used by a local, off-grid electrical network. It is a critical component in a

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  • photovoltaic system, allowing the use of ordinary commercial appliances. Solar inverters have

    special functions adapted for use with photovoltaic arrays, including maximum power point

    tracking and anti-islanding protection.

    10. Solar micro-inverter:

    A solar micro-inverter converts direct current from a single solar panel. Micro-inverters contrast with conventional string or central inverter devices, which are connected to multiple

    solar panels.

    11. Air conditioner inverter:

    An air conditioner inverter modulates the frequency of the alternating current to control the

    speed of the air conditioner motor to achieve continuous adjustment of temperature control.

    12. CCFL inverter:

    A CCFL inverter powers a cold cathode fluorescent lamp.

    15

  • CHAPTER 2

    MULTILVEL INVERTER

    2.1 Multi Level Concept

    For a three-phase inverter system, as shown in Fig 1, with an input DC voltage of Vdc

    given to series connected capacitors, which constitute the energy tank for the inverter. The

    Multilevel inverter is connected to these nodes. Each capacitor has the same voltage Em which is

    given by Em = Vdc / (m-1) , where m is denotes the number of levels.

    .

    The term level is referred to as the number of nodes to which the inverter can be accessible.

    Fig 2.1Three-phase multi level power processing system

    16

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    17

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    18

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  • switching device is required to block only a voltage level of Vdc, the clamping diodes require

    different ratings for reverse voltage blocking. Using phase a of Figure 1 as an example, when all

    the lower switches Sa1 through Sa5 are turned on, D4 must block four voltage levels, or 4Vdc.

    Similarly, D3 must block 3Vdc, D2 must block 2Vdc, and D1 must block Vdc. If the inverter is

    designed such that each blocking diode has the same voltage ratings the active switches, Dn will

    require n diodes in series; consequently, the number of diodes required for each phase would be

    (m-1) (m-2). Thus, the number of blocking diodes is quadratically related to the number of

    levels in a diode-clamped converter .

    Advantages:

    All of the phases share a common dc bus, which minimizes the capacitance requirements of the

    converter. For this reason, a back-to-back topology is not only possible but also practical for uses

    such as a high-voltage back-to-back inter-connection or an adjustable speed drive.

    The capacitors can be pre-charged as a group.

    Efficiency is high for fundamental frequency switching.

    Disadvantages:

    Real power flow is difficult for a single inverter because the intermediate dc levels will tend

    to overcharge or discharge without precise monitoring and control.

    The number of clamping diodes required is quadratically related to the number of levels,

    which can be cumbersome for units with a high number of levels.

    20

  • FIGURE 2.4

    DIODE CLAMPED MULTILEVEL INVERTER

    Fig 2.5line voltage waveform for 6 level diode clamped inverter

    Fig 2.6.diode clamped six level inverter voltage levels and corresponding switch states

    2.2.2 FLYING CAPACITOR MULTILEVEL INVERTER:

    The structure of this inverter is similar to that of the diode-clamped inverter except that

    instead of using clamping diodes, the inverter uses capacitors in their place. The circuit topology

    of the flying capacitor multilevel inverter is shown in Figure 2. This topology has a ladder

    21

  • structure of dc side capacitors, where the voltage on each capacitor differs from that of the next

    capacitor. The voltage increment between two adjacent capacitor legs gives the size of the

    voltage steps in the output waveform.

    Fig 2.7Three phase six level structure of a flying capacitor

    One advantage of the flying-capacitor-based inverter is that it has redundancies for inner

    voltage levels; in other words, two or more valid switch combinations can synthesize an output

    voltage. Table 2 shows a list of all the combinations of phase voltage levels that are possible for

    the six-level circuit shown in Figure 1, Unlike the diode-clamped inverter, the flying capacitor

    inverter does not require all of the switches that are on (conducting) be in a consecutive series.

    Moreover, the flying-capacitor inverter has phase redundancies, whereas the diode clamped

    inverter has only line-line redundancies. These redundancies allow a choice of

    charging/discharging specific capacitors and can be incorporated in the control system for

    balancing the voltages across the various levels.

    In addition to the (m-1) dc link capacitors, the m-level flying-capacitor multilevel inverter will

    require (m-1) (m-2)/2 auxiliary capacitors per phase if the voltage rating of the capacitors is

    identical to that of the main switches. One application proposed in the literature for the

    multilevel flying capacitor is static var generation.

    Advantages:

    22

  • Phase redundancies are available for balancing the voltage levels of the capacitors.

    Real and reactive power flow can be controlled. The large number of capacitors enables the

    inverter to ride through short duration outages and deep voltage sags.

    Disadvantages:

    Control is complicated to track the voltage levels for all of the capacitors. Also, pre-charging all

    of the capacitors to the same voltage level and startup are complex.

    Switching utilization and efficiency are poor for real power transmission.

    The large numbers of capacitors are both more expensive and bulky than clamping diodes in

    multilevel diode-clamped converters. Packaging is also more difficult in inverters with a high

    number of levels

    .

    Fig 2.8SWITCHING STATES

    23

  • 2.2.3 CASCADED H BRIDGES:

    A single-phase structure of an m-level cascaded inverter is illustrated in Figure 31.1. Each

    separate dc source (SDCS) is connected to a single-phase full-bridge, or H-bridge, inverter. Each

    inverter level can generate three different voltage outputs, +Vdc, 0, and Vdc by connecting the dc

    source to the ac output by different combinations of the four switches, S1, S2, S3, and S4. To

    obtain +Vdc, switches S1 and S4 are turned on, whereas Vdc can be obtained by turning on

    switches S2 and S3. By turning on S1 and S2 or S3 and S4, the output voltage is 0. The ac outputs

    of each of the different full-bridge inverter levels are connected in series such that the

    synthesized voltage waveform is the sum of the inverter outputs. The number of output phase

    voltage levels m in a cascade inverter is defined by m = 2s+1, where s is the number of separate

    dc sources. An example phase voltage waveform for an 11-level cascaded H-bridge inverter with

    5 SDCSs and 5 full bridges is shown in Figure 3.

    The phase voltage van = va1 + va2 + va3 + va4 + va5.

    For a stepped waveform such as the one depicted in Figure 4 with s steps, the Fourier Transform

    for this waveform follows

    24

  • Fig 2.9Single phase structute of a multilevel cascaded H bridge inverter

    Fig 2.10 Output phase voltage waveform of an 11-level cascade inverter with 5 separate dc sources

    The general features of a multi level inverter are as follows:

    The output voltage and power increase with number of levels. Adding a voltage involves adding main switching device to each phase.

    The harmonic content decreases as the number of levels increase and filtering requirements are reduced.

    With additional voltage levels, the voltage waveform has more free switching angles which can be pre-selected for harmonic elimination.

    In the absence of any PWM techniques, the switching losses can be avoided. Increasing output voltage and power does not require an increase in rating of individual

    device.

    Static and dynamic voltage sharing among the switching devices is built into the structure either through clamping diodes or capacitors.

    25

  • Since these do not encounter any voltage sharing problems, these multi level inverters can be easily applied for large motor drives and utility supplies.

    The fundamental output voltage is set by the dc bus voltage Vdc which can be controlled through a dc link.

    Power factor is close to unity. No electromagnetic induction is produced.

    In view of the above, the multi level inverters can be applied in the following

    situations:

    These are meant for high power applications, such as in utility systems for controlled sources of reactive power.

    In steady-state operation, an inverter can produce a controlled reactive current and operates as static volt-ampere reactive compensator (SVC / STATCON).

    These inverters reduce the size of compensator and improve its performance during power system contingencies.

    Because of the use of a high voltage inverter, it can be directly connected to high voltage system (e.g~13 kV) distribution system, eliminating the distribution transformer and

    reducing the system cost.

    The harmonic content of the inverter waveform can be reduced with appropriate control techniques, and thereby the efficiency can be improved.

    Keeping the above in view, the main two applications for multi level inverters are

    1. Reactive power compensation

    2. Back to back inter-tie

    3. Utility compatible adjustable speed drive.

    26

  • 2.2.4MULTILEVEL INVERTERS USING BIDIRECTIONAL CHOPPER

    CELLS:

    BIDIRECTIONAL CHOPPER CELLS:

    This BIDIRECTIONAL CHOPPER CELL has been used in this project for Multi Level

    inverters. This cell consists of two IGBTs, which are connected through a capacitor, known as

    flying capacitor. This is called as bidirectional, since when the firing is allowed to the gates,

    the IGBT switches act as if they are closed and conduct, else through the capacitor which is

    charged and discharged. Hence the name is bidirectional.

    The fig 2.5 indicates the stepped wave form of output voltage in case of diode clamped multi

    level inverter. The average of these steps is considered as the sinusoidal output.

    Due to the floating capacitor in this bidirectional chopper cell the steps in the wave for have

    been eliminated. The outputs for various levels of inverters and converters are also indicated

    after simulation. Harmonic contents used to eliminate the steps that would have been present in

    the waveform as in multi level cascaded system for which the average output is considered as

    sinusoidal. But due to this capacitor, even without firing signal for the gates of the IGBTs, the

    cell is able to send current through the circuit, and hence the steps are eliminated, giving out a

    complete sinusoidal waveform.

    As the levels are increased, the purity of waveform increases, reducing the harmonic content

    drastically in the output.

    Fig 2.11 BIDIRECTIONAL CHOPPER CELL

    27

  • The Bidirectional Chopper Cells consists of power transistors. Power transistors have controlled

    turn on and turn off characteristics. The transistors that are used as switching elements are

    operated in the saturations region, resulting in a low on state voltage drop. The switching speed

    of modern transistors is much higher than that of thyristors and they are extensively used in DC

    to DC and DC to AC converters, with inverse parallel connected diodes to provide bidirectional

    current flow.

    The power transistors can be classified broadly into five categories:

    a. Bipolar Junction Transistors (BJTs): A bipolar transistor is formed by adding a second p- or n- region to a p-junction diode. With two n-regions and one p-region, two

    junctions are formed and it is known as NPN transistor. With two p-regions and one n-

    region, it is called a PNP transistor. The three terminals are named as collector, emitter

    and base. A bipolar transistor has two junctions; collector-base junction (CBJ) and base-

    emitter junction (BEJ). It is a current-controlled device and requires base current for

    current flow in the collector.

    b. Metal Oxide Semiconductor Field Effect Transistors (MOSFETs): A power MOSFET is a voltage-controlled device. The switching speed is very high and

    switching times are nanoseconds. These do not have problems of second breakdown as in

    BJTs. These MOSFETS, however, have the problems of electro static discharge. It is

    relatively difficult to protect the MOSFETs in short circuit fault conditions.

    c. COOLMOS: This is a new technology for high voltage power MOSFETS, which implements a compensation structure in the vertical drift region of a MOSFET to

    improve the on-state resistance. It has a lower on-state resistance for the same package

    compared with that of other MOSFETs. The conduction losses are at least five times less

    as compared with those of the conventional MOSFET technology. It is capable of

    28

  • handling two to three times more output power as compared with that of conventional

    MOSFET in the same package. The active chip area of COOLMOS is approximately 5

    times smaller than that of standard MOSFET.

    d. Static Induction Transistors (SITs): An SIT is a high power, high frequency device. It is solid state version of the triode vacuum tube. It is a vertical structure device

    with short multi channels. It is not subjected to area limitation and is suitable for high

    speed, high power operation.

    e. Insulated-Gate Bipolar Transistors (IGBTs) : An IGBT combines the advantages of BJTs and MOSFET. An IGBT has high input impedance, like MOSFETs

    and low on-state conduction losses, like BJTs. However, there is no second breakdown

    problem as in BJTs. By chip design and structure, the equivalent drain to source

    resistance is controlled to behave like that of a BJT.

    29

  • CHAPTER 3

    SIMULATION

    Simulation of 2-level inverter with Bidirectional Chopper Cell

    Circuit Diagram:

    Fig 3.1 Circuit diagram

    3.1 Description:

    1. The connection diagram indicates the two level multi level inverter with two bidirectional

    chopper cells per phase, one level being in positive-half cycle and one level for negative-half

    cycle.

    2The supply input of Vdc =12V is given to two numbers distribution capacitors of 220F in

    series. Thus, the applied input voltage is shared equally by them, making the applied DC

    Voltage of 6V to each half.

    30

  • 3.This distributed DC voltage line is connected to three legs of bidirectional chopper cells

    positive-half (on top side) and negative-half (on bottom side) to form three- phase groups on

    positive-half and three-phase groups on negative-half.

    4. Output from each phase-group is connected to a filter inductance of 100 mH in each

    phase-group on both positive and negative half sides.

    5. Each phase is connected to R load of 10 ohms.

    6. After the load, the three phases are joined together to form star point and is connected to

    the midpoint of the two distributor capacitors as a return path.

    7. Voltmeters are provided to measure load voltages. Also, the load currents are measured by

    the ammeters provided in each phase.

    .

    8. The firing angles are so chosen for bidirectional chopper cells, that each leg contains the

    two firings which are equal to the level of the multi level inverter.

    9. The floating capacitor connected across each bidirectional cell is chosen as one 0.1mf.

    Since the bidirectional cells are connected in series, the connection of floating capacitors in

    this phase group becomes series connection when the gate signal is in switched off condition.

    This being a short interval of the firing angles, it is assumed that the floating capacitors are in

    series.

    Thus, the total effective floating capacitors capacitance for each leg half (phase group)

    becomes one half of this capacitance, i.e. 0.05mf.

    10. To make an equal firing distribution among the cells, when R phase is considered, the

    firings are chosen with max 2 angles to maintain the level of inverter, which is equal to 2 i.e.

    0 /180 means 0 to 180 is on. The negative-half of the R phase firing is chosen as 180 / 360,

    31

  • such that this phase is shifted by 180 degrees with respect to the positive side of sinusoidal

    wave.

    11. Similarly, the Y & B phases are selected with a phase difference of 120 degrees with

    each another. Their corresponding negative halves are chosen by adding further 180 degrees

    to the respective positive phase groups. Thus, the firing angles have been decided.

    Simulation Control: Time step: 1E-005; Total time: 0.20 sec

    Parameters : Input voltage Vdc, Distribution Capacitances C1 & C2 = 220uf

    Firing Angles (in degrees)

    Table 3.1

    PHASE GATES TRIGGERING

    ANGLE(DEGREES)

    R PHASE Gr1, Gr2 : 50 2

    Gr3, Gr4 : 50 4

    0 / 180

    180 /360

    Y PHASE Gy1, Gy2 : 50 2

    Gy3, Gy4 : 50 4

    120 / 300

    -60/120

    B PHASE Gb1, Gb2 : 50 2

    Gb3,Gb4 : 50 4

    -120 / 60

    60 /240

    32

  • Other Parameters

    Filter Inductances: Lr1, Lr2; Ly1, Ly2; Lb1 & Lb2 = 100 mH each

    R phase floating capacitors Cr1 to Cr2: 0.1mf

    Y phase floating capacitors Cy1 to Cy2: 0.1mf

    B phase floating capacitors Cb1 to Cb2: 0.1mf

    Load: Resistance Rr, Ry & Rb = 10 ohms

    3.2 Calculations:

    The calculations are made to find out duration in terms of time constants which are offered due

    to the passive elements used in the respective circuit.

    i. The time constant for each phase group is given by:

    1 = (LC) = (100 x 10-3 x 0.05 x 10-3) = 2.23ms.

    ii. The supply is available for a maximum firing angle of 60, the frequency being

    50 Hz. The time period 2 for 90 is 90 / (50 x 360) = 4.3 ms.

    33

  • 3.3Results:

    The following tables indicate the outputs obtained for multi level inverter of four level by

    simulating the circuit through PSIM.

    Table 1: Indicates the parameters maintained in the circuit and simulated output results

    indicating the values of phase voltages, Line voltages and load current with a series R load of

    10ohms connected at the output side.

    These tables indicate the various parameters maintained in each case study and the

    values obtained by simulation of the circuit diagram indicated in fig 3.1. These circuits have

    switches according to firing angles.

    TABLE1

    Level Vdcin Cd Cc Lf/leg Maxno.offirings

    VL(Vry)

    Volts

    IL(Amps)

    2 15 2x220F 0.1f 100Mh 2 10 1.5

    34

  • 3.4 Output Graphs:

    Fig 3.2 Output voltage

    Fig 3.3 Output Current

    35

  • 3.5 0utput voltages at different frequencies

    Table 3.2

    FREQUENCY(HZ) OUTPUTVOLTAGE(VOLTS)

    OUTPUTGRAPHS

    20HZ 7V

    40HZ 7V

    50HZ 10V

    60HZ 10.5V

    36

  • 80HZ 5V

    100HZ 4V

    120 3.5V

    150 2.5V

    37

  • 3.6 PULSES TO MOSFETS

    PULSE TO MOSFETS M1, M2:

    PULSES TO MOSFETS M3,M4:

    PULSES TO MOSFETS M5, M6:

    38

  • PULSES TO MOSFETS M7, M8:

    39

  • PULSES TO MOSFETS M9,M10

    PULSES TO MOSFETS M11,M12

    40

  • CHAPTER 4

    HARDWARE DESCRIPTION

    4.1 POWER SUPPLY SECTION

    4.1.1 Power Supply to the Microcontroller:

    Figure 4: Power supply Circuit for microcontroller

    Power supply block consists of following units:

    1) Step down transformer.

    2) Full wave rectifier circuit.

    3) Input filter.

    4) Voltage regulators.

    5) Output filter.

    6) Indicator unit.

    41

  • Step down transformer: The step-down transformer is used to step down the supply voltage of 230v ac from mains to

    lower values, as the various devices used in this project require reduced voltages. The outputs

    from the secondary coil which is center tapped are the ac values of 0v, 15v and-15v.The

    conversion of these ac values to dc values is done using the full wave rectifier unit.

    Rectifier Unit: The rectifier circuit is used to convert the ac voltage into its corresponding dc voltage.

    The most important and simple device used in rectifier circuit is the diode. The simple function

    of the diode is to conduct when forward biased and not to conduct in reverse bias.

    Regulator unit:

    Regulator regulates the output voltage to a specific value. The output voltage is

    maintained irrespective of the fluctuations in the input dc voltage. Whenever there are any ac

    voltage fluctuations, the dc voltage also changes.

    Regulators used in this application are:

    1.7805 which provides 5v dc

    2.7812 which provide 12v dc

    Output Filter: This filter is fixed after the Regulator circuit to filter any of the possibly found

    ripples in the output received finally. Capacitors used here are of value 10UF.

    42

  • 4.2 MAIN CIRCUIT:

    Fig 4.2 Main circuit

    This board has inverter circuit along with the 12V power supply. The output of the IC IR2110 is

    given to the mosfets gate terminals. This inverter is a 2 level inverter which takes 12V DC as an

    input and gives out 3-phase AC.

    Inverter circuit consists of 3 legs each representing one of the 3 phases; each leg has 2

    bidirectional chopper cells, one on the top and one at the bottom. Top cell is responsible for

    positive half of the AC output, bottom cell is responsible for negative half of the ac output..

    43

  • 4.3 DRIVER CIRCUIT:

    Fig 4.3 Driver circuit

    This board contains driver circuit; it also consists of microcontroller circuit for producing gate

    pulses for the mosfets used in the inverter circuit.

    The driver circuit has got two ICS

    1. 74HCT245 (for improving current level to a sufficient value in order to drive the mosfets)

    ..

    2. Ir2110 (for improving voltage level to a sufficient value in order to drive the mosfets)

    44

  • 4.3 OVERVIEW OF THE ENTIRE CIRCUIT:

    Fig 4.4 over view of entire circuit

    45

  • 4.4 OUTPUT WAVEFORM OF ONE OF THE PHASES IN CRO:

    4.5 Output Waveform

    46

  • CHAPTER -5

    CONCLISION AND FUTURE SCOPE OF STUDY

    5.1 Conclusion:

    It is observed that in multilevel inverter using bidirectional chopper cells sinusoidal output is

    obtained instead of stepped a output as in case of other types of inverters.

    5.2Future scope of study:

    This project can be an application in UPS.

    47

  • REFERENCES

    Microcontrollers by Masjidi

    www.wikipedia.com/8051

    www.isis.com/proteus

    Muhammad H.Rashid Power Electronics circuits, Devices and Applications third Edition

    2006.

    www.irf.com/technical-info/appnotes/an-978.pdf

    www.irf.com/product-info/datasheets/data/ir2110.pdf

    www.alldatasheet.com/datasheet-pdf/pdf/15580/PHILIPS/74HCT245D.html

    APPENDIX A

    48

  • GENERAL INFORMATION OF P SIM PACKAGE

    A.1 INTRODUCTION

    PSIM is a simulation package specifically designed for power electronics and

    motor control. With fast simulation and friendly user interface, PSIM provided a powerful

    simulation environment for power electronics, analog and digital control and motor drive

    system studies.

    This simulation package covers three add-on modules viz.

    Motor Drive Module Digital Control Module Sim Coupler Module

    The Motor Drive Module has built in machine models and mechanical load models for drive

    system studies.

    The Digital Control Module provides discrete elements such as zero-order hold, Z-domain

    transfer function blocks, quantization blocks, digital filters, for digital control analysis.

    The Sim Coupler Module provides interface between PSIM and Matlab/SIMULINK for co-

    simulation.

    49

  • The PSIM simulation package consists of three programs:

    Circuit Schematic Program PSIM PSIM simulator Waveform processing program SIMVIEW

    The manual describes various chapters consisting of

    Circuit structure Software/Hardware requirement Parameter specification format Power and control circuit components Specification of transient analysis and A.C. Analysis Use of schematic program SIMVIEW Error and warning messages

    A.2 CIRCUIT STRUCTURE

    The circuit is represented in PSIM in four blocks viz.,

    Power Circuit Control circuit Sensors Switch controllers

    50

  • Switch

    Controller

    Controlcircuit

    Sensors

    Powercircuit

    The Power circuit consists of switching devices, RLC branches, transformers, and coupled

    inductors.

    The Control circuit is represented in block diagram, This also contains components in s

    domain and z domain, logic components (such as logic gates and flip flops), and nonlinear

    components (such as multipliers and dividers) are used in the control circuit.

    Sensors measure power circuit voltages and currents and pass the values to the control

    circuit.

    Gating signals are then generated from the control circuit and sent back to the power circuit

    through switch controllers to control switches.

    A.3 SOFTWARE/HARDWARE REQUIREMENT

    PSIM runs in Microsoft Windows environment 98/NT/2000/XP on personal computers. The

    minimum RAM memory is 32MB.

    51

  • A.3.1 INSTALLING THE PROGRAM

    A quick installation guide is provided in the flier PSIM-quick guide and on the CD_ROM.

    Some of the files in the PSIM directory are as follows:

    Psim.dll describes PSIM simulator Psim.exe describes PSIM circuit schematic editor Simview.exe describes Wave form processor SIMVIEW Psim.lib, psimimage.lib PSIM libraries *.hlp Help files *.sch Sample schematic circuit files

    File extensions used in PSIM are:

    *.sch PSIM schematic file (binary) *.cct PSIM netlist file (text) *.txt PSIM simulation output file (text) *.fra PSIM ac analysis file (text) *.smv SIMVIEW wave form file (binary)

    A.5 SIMULATING A CIRCUIT

    To simulate the sample one-quadrant chopper circuit chop.sch:

    Start PSIM. Choose OPEN from the file menu to load the file chop.sch

    52

  • From the SIMULATE menu, choose Run PSIM to start the simulation. The simulation results will be saved to file chop.txt. Any warning messages occurred in the

    simulation will be saved to file message.doc

    If the option AUTO-RUN SIMVIEW is not selected in the options menu, from the simulate menu, choose Run SIMVIEW to start SIMVIEW. If the Option Auto run

    SIMVIEW is selected, SIMVIEW is launched automatically. In SIMVIEW the curves

    for display are selected.

    A.6 COMPONENT PARAMETER SPECIFICATION AND

    FORMAT

    The Parameter dialog window of each component in PSIM has three tabs:

    Parameters Other information Color

    The Parameters in the PARAMETERS tab are used in the simulation.

    The information in the OTHER INFO tab is not used in the simulation. It is for reporting

    purposes only and will appear in the parts list in VIEW/ELEMENT LIST in PSIM.

    Information such as device rating, manufacturer, and part number can be stored under the

    OTHER INF tab.

    The component color can be set in the COLOR tab.

    Parameters under the Parameters tab can be a numerical value or a mathematical expression. A

    resistance for example can be expressed in one of the following ways:

    53

  • 12.5

    12.5k

    12.5Ohm

    12.5kOhm

    25./2.Oh

    R1+R2

    R1*0.5+Vo+0.7)/Io

    Where R1, R, Vo, and Io are symbols defined either in a parameter file or in a main circuit if this

    resistor is in a sub-circuit.

    Power of ten suffix letters is allowed in PSIM.

    The following suffix letters are supported:

    G 109

    M 106

    k or K 103

    m 10-3

    u 10-6

    n 10-9

    p 10-12

    54

  • APPENDIX B

    SOFTWARE USED PROTEUS

    It is used for the real time simulation of the Circuits involving complex ICs,

    Microcontrollers, Electromechanical devices etc.

    System components

    ISIS Schematic Capture - a tool for entering designs.

    55

  • APPENDIX C

    SOFTWARE USED KEILuVISION

    Keil was founded in 1986 to market add-on products for the development tools provided by many of the silicon vendors. Keil implemented the first C compiler designed from the ground-up specifically for the 8051 microcontroller. Keil provides a broad range of development tools like ANSI C compiler, assemblers, debuggers and simulators, linkers, IDE, library managers, real-time operating systems and evaluation for 8051, 251, ARM, and XC16x/C16x/ST10 families.

    Compiling a C program in EAGLE

    56

  • APPENDIX D

    DATA SHEET IR2110

    Features Floating channel designed for bootstrap operation

    Fully operational to +500V or +600V

    Tolerant to negative transient voltage dV/dt immune

    Gate drive supply range from 10 to 20V

    Under voltage lockout for both channels

    3.3V logic compatible

    Separate logic supply range from 3.3V to 20V

    Logic and power ground 5V offset

    CMOS Schmitt-triggered inputs with pull-down

    Cycle by cycle edge-triggered shutdown logic

    Matched propagation delay for both channels

    Outputs in phase with inputs

    OFFSET VOLTAGE (IR2110) 500V max.

    IO+/- 2A / 2A

    OUTPUT VOLTAGE 10 - 20V

    ton/off (typ.) 120 & 94 ns

    Delay Matching (IR2110) 10 ns max.

    Description

    The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with

    independent high and low side referenced output channels. Proprietary HVIC and latch immune

    CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible

    with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high

    pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are

    matched to simplify use in high frequency applications. The floating channel can be used to drive

    57

  • an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500

    or 600 volts.

    PIN DIAGRAM

    IR2110

    58

  • 59

  • 60

  • 61

  • 62

  • APPENDIX E

    DATA SHEET 74HCT245

    FEATURES Octal bidirectional bus interface Non-inverting 3-state outputs Output capability: bus driver GENERAL DESCRIPTIONS The 74HC/HCT245 are high-speed Si-gate CMOS devices and are pin compatible with

    low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC

    standard no. 7A.The 74HC/HCT245 are octal transceivers featuring non-inverting 3-state bus

    compatible outputs in both send and receive directions. The 245 features an output enable

    (OE) input for easy cascading and a send/receive (DIR) for direction control. OE controls the

    outputs so that

    the buses are effectively isolated. The 245 is similar to the 640 but has true (non-inverting) outputs.

    74HCT245

    63

  • PIN DIAGRAM

    64

  • 65

  • FUNCTIONAL BLOCK DIAGRAM

    66

  • APPENDIX F

    DATA SHEET- IRFZ44N

    FEATURES:

    1 Advanced Process Technology

    2Ultra Low On-Resistance

    3Dynamic dv/dt Rating

    4175C Operating Temperature

    5Fast Switching

    6 Fully Avalanche Rated

    Advanced HEXFET Power MOSFETs from International Rectifier utilize advanced processing

    techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with

    the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well

    known for, provides the designer with an extremely efficient and reliable device for use in a wide

    variety of applications.

    The TO-220 package is universally preferred for all commercial-industrial applications at power

    dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of

    the TO-220 contribute to its wide acceptance throughout the industry.

    67

  • 68

  • 69

  • APPENDIX G

    DATA SHEET AT89C51 Features

    8K Bytes of In-System Reprogrammable Flash Memory

    Endurance: 1,000 Write/Erase Cycles

    Compatible with MCS-51 Products

    Fully Static Operation: 0 Hz to 24 MHz

    Three-level Program Memory Lock

    256 x 8-bit Internal RAM

    32 Programmable I/O Lines

    Three 16-bit Timer/Counters

    Eight Interrupt Sources

    Programmable Serial Channel

    Low-power Idle and Power-down Modes

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of

    Flash programmable and erasable read only memory (PEROM). The device is manufactured

    using Atmels high-density nonvolatile memory technology and is compatible with the industry-

    standard 80C51 and 80C52 instruction set and pin out. The on-chip Flash allows the program

    memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.

    By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a

    powerful micro computer which provides a highly-flexible and cost-effective solution to many

    embedded control applications.

    VCC Supply voltage.

    GND Ground.

    70

  • Port 0:

    Port 0 is an 8-bit open drain bi-directional I/O port. As output port, each pin can sink eight TTL

    inputs. When 1s are written to port 0 pins, the pins can be used as high impedance

    Inputs. Port 0 can also be configured to be the multiplexed low order address/data bus during

    accesses to external program and data memory. In this mode, P0 has internal pullups.

    Port 0 also receives the code bytes during Flash programming and outputs the code bytes during

    programverification. External pullups are required during program verification.

    Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers

    can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by

    the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being

    pulled low will source current (IIL) because of the internal pull ups. In addition, P1.0 and P1.1

    can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter

    2 trigger input (P1.1/T2EX), respectively. Port 1 also receives the low-order address bytes during

    Flash programming and verification

    Port 2 Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers can

    sink/source four TTL inputs .When 1s are written to Port 2 pins, they are pulled high by

    The internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally being

    pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order

    address byte during fetches from external program memory and during accesses to external data

    memory that uses 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong

    internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit

    addresses (MOVX @ RI), Port 2emits the contents of the P2 Special Function Register.

    Port 2 also receives the high-order address bits and some control signals during Flash

    programming and verification.

    Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can

    sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by

    71

  • the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally being

    pulled low will source current (IIL) because of the pull-ups .Port 3 also receives some control

    signals for Flash programming and verification.

    Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

    device.

    ALE/PROG Address Latch Enable is an output pulse for latching the low byte of the address

    during accesses to external memory. This pin is also the program pulse input (PROG) during

    Flash programming .In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator

    frequency and may be used for external timing or clocking purposes. Note, however, that one

    ALE pulse is skipped during each access to external data

    memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With

    the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is

    weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external

    execution mode.

    PSEN : Program Store Enable is the read strobe to external program memory. When the

    AT89C52 is executing code from external program memory, PSEN is activated twice each

    machine cycle, except that two PSEN activations are skipped during each access to external data

    memory.

    EA/VPP: External Access Enable. EA must be strapped to GND inorder to enable the device to

    fetch code from external program memory locations starting at 0000H up to FFFFH. Note,

    however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be

    strapped to VCC for internal program executions. This pin also receives the 12-volt

    programming enable voltage(VPP) during Flash programming when 12-voltprogramming is

    selected.

    XTAL1: Input to the inverting oscillator amplifier and input to the

    internal clock operating circuit.

    72

  • XTAL2: Output from the inverting oscillator amplifier.

    PIN DIAGRAM:

    73

  • 74