2900 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 62, NO....

2900 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 62, NO. 9, SEPTEMBER 2015

Reliability of Crystalline Indium–Gallium–Zinc-Oxide Thin-Film Transistors Under

Bias Stress With Light IlluminationKyung Park, Hyun-Woo Park, Hyun Soo Shin, Jonguk Bae, Kwon-Shik Park,

Inbyeong Kang, Kwun-Bum Chung, and Jang-Yeon Kwon

Abstract— We investigate the effect of crystalline indium–gallium–zinc-oxide (c-IGZO) thin films on device performance,and evaluate the device reliability of c-IGZO under positive/negative bias stress with/without illumination. The crystalstructure of deposited-IGZO thin film is controlled by annealingtemperatures, and the transition from an amorphous to acrystalline structure is observed at above 800 °C. Even thoughthe c-IGZO thin-film transistors (TFTs) exhibit lower carriermobility, compared with amorphous IGZO (a-IGZO) TFTs,the remarkable improvement of the device reliability for thec-IGZO TFTs is observed especially under the bias stress withillumination. This comes from lower defect density comparedwith the a-IGZO film.

Index Terms— Crystallization, electronic structure,indium–gallium–zinc-oxide (IGZO) thin-film transistors (TFTs),oxide semiconductor, reliability.

I. INTRODUCTION

AMORPHOUS oxide semiconductor (AOS) thin-filmtransistors (TFTs) have considerably attracted attention

for high-end and large area displays, such as active-matrixliquid crystal displays, active-matrix organic light-emittingdiodes, and flexible displays, due to their high field-effectmobility, good uniformity, low process temperature, andhigh transparency to visible light. On the other hand,these displays are not easily realized by the conventional

Manuscript received April 9, 2015; revised July 11, 2015; acceptedJuly 15, 2015. Date of publication August 5, 2015; date of current versionAugust 19, 2015. This work was supported in part by the Ministry of Science,ICT and Future Planning, Korea, through the IT Consilience Creative Program,supervised by the Institute for Information and Communications TechnologyPromotion, under Grant IITP-2015-R0346-15-1008, and in part by DonggukUniversity through the Dongguk University Research Fund of 2014. Thereview of this paper was arranged by Editor B. Kaczer.

K. Park is with the Yonsei Institute of Convergence Technology,Yonsei University, Incheon 406-840, Korea (e-mail: [email protected]).

H.-W. Park and K.-B. Chung are with the Division of Physics andSemiconductor Science, Dongguk University, Seoul 100-715, Korea (e-mail:[email protected]; [email protected]).

H. S. Shin, J. Bae, K.-S. Park, and I. Kang are with the LG DisplayResearch and Development Center, LG Display, Paju 413-811, Korea (e-mail:[email protected]; [email protected]; [email protected];[email protected]).

J.-Y. Kwon is with the Yonsei Institute of Convergence Technology,Yonsei University, Incheon 406-840, Korea, and also with the School ofIntegrated Technology, Yonsei University, Incheon 406-840, Korea (e-mail:[email protected]).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2015.2458987

Si-based technology, such as amorphous Si (a-Si) andlow-temperature poly-Si (LTPS), because the a-Si exhibitedthe lack of reliability and the LTPS was also difficult toobtain the large area uniformity, which were required for high-performance display applications [1]. However, despite theseadvantages of the AOSs, most of the AOSs fundamentallyhave instability issues, due to electrical stress and environmentconditions, such as light, temperature, and humidity duringdriving devices [2]–[4]. It has already been reported that thementioned instability, the shifts of threshold voltage (Vth),comes from the trapping of charge carrier betweenoxide semiconductor and gate insulator or semiconductoritself [5]–[7]. Electron trapping at the interface betweengate dielectric and oxide semiconductor by positive biasstress (PBS) or oxygen absorption to the AOS surface byambient conditions, which can serve as a suppressor for thecarrier concentration, could generate the positive Vth shift dueto reduction of the carrier concentration. On the other hand,the trapped holes, which were generated by either negativebias stress or light illumination, could cause the negativeVth shift. This is one of the key barriers for realizing thehigh-performance displays, because the driving transistors areoperated under electrical bias as well as exposure of visiblelight. Until now, many studies have been proposed to improvethe device instability, such as altering the device structure, gateinsulator material, annealing condition, and semiconductormaterial, as well as using a passivation layer [8]–[11]. Most ofthe proposed techniques were based on an amorphous structureitself. Here, we suggest another approach to overcome thedevice instability, not on the basis of the amorphous structure.

Recently, the c-axis aligned crystal (CAAC)-indium–gallium–zinc-oxide (IGZO) TFTs were reported as atransistor for display driving [12], [13]. Interestingly, ithas been reported that the CAAC-IGZO TFTs exhibitedsuperior reliability against various stress conditions, such asbias stress and/or light illumination. It was caused by the lowerdefect levels of a CAAC-IGZO film than the conventionalamorphous IGZO (a-IGZO), which is a widely investigatedmaterial [13]. In addition, the authors insisted that only aspecific crystal structure with CAAC shows the improvedreliability of a device. Even though this is a remarkableenhancement for realizing the high-performance displays,it is not yet clear that this enhancement comes from the

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PARK et al.: RELIABILITY OF c-IGZO TFTs UNDER BIAS STRESS WITH LIGHT ILLUMINATION 2901

specific crystal structure (CAAC) or the conventionalphase transformation from amorphous to crystalline. If theconventional crystalline structure also shows the improvedreliability like the CAAC structure, it is strongly expected thatthe possibility of various technologies for crystallization canbe opened for a high reliable device.

In this paper, we studied the effects of the crystallineIGZO (c-IGZO), which was used as a channel materialin a TFT structure, on the device performance, speciallyfocused on the device instability. The crystal structure and themicrostructure of the IGZO thin films were preferentiallyinvestigated before measuring the electrical properties offabricated-IGZO TFTs, in order to confirm the film structureaccording to the annealing temperature. After that, theelectrical properties of the c-IGZO TFTs as a function ofthermal treatment were measured compared with the conven-tional a-IGZO TFTs, without applying any stress conditions.Finally, the effects of c-IGZO on the device reliability weresystematically analyzed under both the PBS and the negativebias stress, with/without light illumination with a constantwavelength and intensity. In addition, to understand the perfor-mance of an evolution device, depending on the crystallizationin IGZO, the band structure and the electronic structure ofunoccupied states in the conduction band (CB) and band-edgestates of the IGZO thin films were investigated as a functionof the annealing temperature. Based on experimental results,we propose that the clear relationship between the devicereliability and the c-IGZO, as well as the crystal structureitself, plays an important role in the device reliability ratherthan the specific crystal structure such as a CAAC structure.

II. EXPERIMENTAL DETAILS

A. Fabrication Procedures of IGZO TFTs

A bottom-gated IGZO TFT was fabricated on ahighly doped p-type Si wafer with a resistivity of0.001 ∼ 0.005 � · cm, which was used as both substrateand gate electrode. A thermally grown 100-nm-thickSiO2 was used as a gate insulator. The overall process flowof the fabricated-IGZO TFT used in this paper is shownin Fig. 1. Then, a 100-nm-thick IGZO was deposited onSiO2/p+ Si using a RF sputtering system with an IGZO targethaving a In2O3:Ga2O3:ZnO molar ratio of 1:1:1 and patternedwith 1000 μm × 500 μm by a liftoff process. The RF powerof 100 W and a pressure of 5 mtorr were measuredin an Ar and O2 mixture gas during IGZO deposition.The oxygen partial pressure [P(O2) ∼ O2/Ar + O2] wasmaintained at the constant value of ∼1.6% during theIGZO deposition. To eliminate the interaction between anelectrode and a channel by thermal treatment, all samples wereannealed before the source/drain (S/D) electrode formationusing a tube furnace at temperatures of 300 °C, 600 °C,800 °C, and 1000 °C in air ambient for 1 h, respectively.After that, a 150-nm-thick Mo was deposited usinga dc sputtering system and patterned via a liftoff processas the S/D electrode. The channel length and width of thea-IGZO TFTs, used in this experiment, were fixed at 50 and100 μm, respectively. For a detailed material crystallization

Fig. 1. Schematic of overall bottom-gated IGZO TFT fabrication.(a) SiO2/p+ Si substrate. (b) IGZO deposition with a pattern of 1000 μm ×500 μm by the RF sputtering system. (c) Postdeposition annealing using tubefurnace with various temperatures in air ambient for 1 h. (d) Patterned Mo asa S/D electrode. (e) Plan-view image of the device used in this paper.

process of the samples as a function of the annealingtemperature, the stacked IGZO/SiO2/Si samples werefabricated without patterning process.

B. Analysis and Electrical Properties of IGZO Thin Films

The crystallization process of the IGZO thin films wasconfirmed by X-ray diffraction (XRD) and high-resolutiontransmission electron microscopy (HR-TEM). The chemicalcomposition and film density in IGZO with elevating annealingtemperature were investigated by inductively coupled plasmaatomic emission spectroscopy (ICP-AES) and Rutherfordbackscattering (RBS), respectively.

Both electrical characteristics and reliability of thefabricated TFT devices were measured using a semiconductorparameter analyzer (Keithley SCS-4200) under dark ambient.In addition, the band alignments, including the bandgapand band offset, were investigated by spectroscopicellipsometry (SE) and X-ray photoelectron spec-troscopy (XPS). The SE spectra were obtained by arotating analyzer system with an auto retarder, in the rangeof 0.75–6.4 eV, with incident angles of 65°, 70°, and 75°.The XPS spectra were measured using a monochromaticAlKα X-ray source, with a pass energy of 20 eV. Finally, toexamine the electronic structure near the CB, near-edge X-rayabsorption spectroscopy experiments were performed usingtotal electron yield mode in BL-10D of Pohang AcceleratorLaboratory in Korea.

III. RESULTS AND DISCUSSION

A. Properties of IGZO Thin Films Depending on Temperatures

Fig. 2(a) shows the XRD spectra obtained from annealedIGZO films at 300 °C, 600 °C, 800 °C, and 1000 °C. It ishard to find the diffraction peaks of crystalline phase for theIGZO films annealed at 300 °C and 600 °C. It indicates thatthe IGZO thin film could maintain an amorphous phase of upto 600 °C. However, when annealed at 800 °C, a spectrumwith the hexagonal In2Ga2ZnO7 (102) and (105) peaks has


Fig. 2. (a) XRD spectrum obtained from the samples annealed at differenttemperatures. (b) Chemical composition of deposited-IGZO thin film byanalyzing the ICP-AES.

Fig. 3. Cross-sectional bright field HR-TEM image showing the crystallinityof IGZO annealed at (a) 300 °C, (b) 600 °C, (c) 800 °C, and (d) 1000 °C.Insets of (a)–(d): SAED patterns with various annealing temperatures.

been produced. These spectrums provide a critical clue tounderstand the crystallization of the IGZO thin films, indi-cating that the crystallization of the IGZO thin film probablystarted in local areas at the temperature between 600 °C and800 °C. There was no significant variation of peak intensitybetween 800 °C and 1000 °C, which means that the changeof crystallinity in the entire films was not observed withincreasing temperature. Interestingly, the chemical composi-tion in the IGZO thin films, obtained from the ICP-AES, asshown in Fig. 2(b), showed a little change by the annealingtemperatures. It is noted that the IGZO thin films, whichwere annealed at above 800 °C, obviously had a crystallinestructure with a small change of chemical composition in theIGZO films, through the XRD and ICP-AES analysis.

For the detailed microstructural study of the IGZO thinfilms, as a function of the annealing temperature, theHR-TEM technique was performed. Fig. 3(a)–(d) shows theHR-TEM images, which are consistent with the XRD results.Both the devices annealed at 800 °C and 1000 °C exhibitedthe localized crystallization of the IGZO thin films.

Fig. 4. Representative transfer curves of the a-IGZO TFT as a function ofthe annealing temperatures at 300 °C, 600 °C, 800 °C, and 1000 °C.

In addition, to analyze in detail the crystalline structure,selected area electron diffraction (SAED) was analyzed, asshown in Fig. 3(a)–(d). As a result, there were clear crystallinespots with various directions in the pattern of annealingat 800 °C and 1000 °C, suggesting that the IGZO thin films hada polycrystalline structure. The halo pattern was observed inthe pattern of annealing at 300 °C and 600 °C, which indicatesan amorphous structure. Another interesting result is that thecrystallinity of IGZO annealed with 1000 °C was slightlyincreased in Fig. 3(d), although there was no observationin the change of the crystallinity on the IGZO films by theXRD spectrum.

B. Electrical Characteristics of IGZO TFTsDepending on Temperatures

To study the effects of the crystallinity of thedeposited-IGZO thin films on the device performance,the electrical properties of the IGZO TFTs were measuredusing probe-station under dark ambient. Fig. 4 shows therepresentative transfer characteristics of the IGZO TFTs asa function of the annealing temperature; a measurement ofthe source-to-drain current (IDS) with the gate voltage (VG)varying from −40 to 40 V at a fixed drain voltage (VD)of 10 V and the electrical properties of all devices aresummarized in Table I. As shown in Fig. 4, a transfer curveof the IGZO TFT as a function of the annealing temperaturecan be divided by two groups on the basis of Vth characteristicas follows: regions 1 (300 °C and 600 °C: a-IGZO) andregions 2 (800 °C and 1000 °C: c-IGZO). The TFT deviceshaving an amorphous structure, which were annealed at300 °C and 600 °C, exhibited relatively higher mobilityand lower swing than those with a polycrystalline structureannealed at 800 °C and 1000 °C. When the c-IGZO was usedas a channel layer replacing the conventional a-IGZO, theVth tended to negatively shift, and the device performance wasslightly deteriorated. In the case of mobility, as the annealingtemperature was increased, the mobility gradually decreasedfrom 10 to 2 cm2/V · s. The grain boundaries generatedfrom the crystallization can disturb the carrier transportationin the IGZO channel. Here, it is notable that the c-IGZOTFTs have a negative Vth compared with the a-IGZO TFTs,


TABLE I

ELECTRICAL PROPERTIES OF IGZO TFTs AS A FUNCTION OF

ANNEALING TEMPERATURE, SUCH AS MOBILITY,

SUBTHRESHOLD SWING, AND Vth

Fig. 5. (a) Extinction coefficient measured by SE. (b) XPS spectra nearvalence band. (c) Schematic energy level diagram including the relative energyposition of the Fermi level (EF) with respect to the conduction band minimumand valence band maximum.

despite of slight performance deterioration. This Vthdifference was probably caused by defect levels, whichare mainly located near valence band (VB) and caused byoxygen vacancy. In addition, to explain the evolution ofdevice performance behavior, depending on an annealingtemperature, more in-depth studies were systematicallyinvestigated by analyzing the band structure of IGZO withrespect to the annealing temperature and the results aredescribed in detail.

C. Band Structure of IGZO Thin FilmsDepending on Temperatures

Fig. 5(a)–(c) shows the bandgap (Eg) and the VB spectrameasured by the SE and XPS, and the schematicenergy level diagram of InGaZnO as a function of the

Fig. 6. Change of V1 nA versus stress time and various stress conditions.(a) and (b) PBS (VG = 40 V). (c) and (d) Negative bias (VG = −40 V)stress. (b) and (d) Device was exposed with a constant light illumination.(a) and (c) Device was exposed without a constant light illumination.

annealing temperature, respectively. As the annealingtemperature is increased, the bandgap is increased from3.41 eV for 600 °C to 3.61 eV for 1000 °C. TheVB offset (�EVB) between the Fermi level and theVB maximum is slightly increased as well. As a result,the CB offset (�ECB = Eg − �EVB) is changed from0.26 to 0.41 eV depending on the annealing temperature,which represents the smaller value in the IGZO film annealedat 300 °C and 600 °C. The CB offset is strongly related tothe carrier concentration, and the smaller CB offset for thea-IGZO film indicates the higher carrier concentration [14].These results were well consistent with our result of thecarrier concentration, measured by hall measurement, andthus the higher electron mobility and performance in thea-IGZO TFT could be explained compared with thec-IGZO TFT. In summary, the large CB offset, which wascaused by high-annealing temperature, acts as a barrier tothe carrier generation, resulting in low mobility. However,such low mobility can be enough improved by usingthe conventional techniques, such as altering the cationcomposition and designing the pixel/module.

D. Device Reliability: a-IGZO Versus c-IGZO

After measuring the initial electrical properties of theIGZO TFTs, we evaluated the device reliability under bias andlight illumination stress as a function of the stress time. Thechange in V1 nA is shown in Fig. 6(a)–(d). Here, V1 nA denotesthe gate voltage at the IDS of 1 nA. During the PBS,it has already been known that V1 nA is positively shifteddue to electron trapping at the interface between the gateinsulator and the channel layer or channel itself. In addition,the light illumination can generate the photoinduced holes,which contribute to charge trapping and the negative shift ofV1 nA [15]. As shown in Fig. 6(a), after the PBS under thepositive bias of 20 V for 120 min, a large V1 nA of a devicewith a-IGZO was positively shifted due to much electron traps.However, there was a small V1 nA shift under positive biasillumination stress (PBIS), because the holes caused by light


illumination hindered the positive shift of V1 nA, as shownin Fig. 6(b). On the contrary, in the case of c-IGZO, theshift of V1 nA could not be nearly found under both the PBSand the PBIS, indicating that c-IGZO has less electron trapsdensity than a-IGZO. In other words, the high crystallinityof IGZO can cause a decrease in the electron trap density,resulting in improvement of the device stability. The resultsunder negative bias stress, as shown in Fig. 6(c) and (d), weresimilar to the former PBS and PBIS. In addition, in the case ofnegative bias illumination stress (NBIS), the light illuminationaccelerates the negative V1 nA shift, due to the synergy effectbetween the induced holes generated by the light illuminationand negative bias. In particular, after the NBIS for 120 min,V1 nA of the IGZO TFT with a crystal structure shows a littlechange, whereas that with an amorphous structure exhibitedan abundantly negative shift. This difference in V1 nA can beexplained by the deeply occupied subgap states near the VBmaximum due to oxygen vacancies, as mentioned above. Thissuggests that the amorphous structure contains more sites forthe charge trapping than the crystal structure. According tothe reported literatures, the defect levels in the bandgap of theIGZO as a function of the crystal structure were measuredusing the constant photocurrent method [16]–[18], which cananalyze the light absorption coefficient caused by defect levelsin the IGZO thin films [12], [19]. It was reported that theCAAC-IGZO had less defect levels than the conventionalIGZO, which leads to a better device reliability. In addition,c-IGZO has a larger cohesive energy than a-IGZO, because amore stable structure has a larger cohesive energy, resultingin a high film density, which is in relation with the defectlevels [19]. On the basis of these results, the density of theIGZO films used in this paper was analyzed according tothe annealing temperatures using the RBS. As a result, itwas found that the film density of the IGZO thin film wasslightly increased from 7.25×1017 to 7.32 × 1017 atoms/cm2

with the increasing annealing temperature from 300 °C to1000 °C. It means that the c-IGZO thin films have a filmdensity of ∼1%, which is higher than the conventional a-IGZOthin films, probably caused by low defect levels. Althoughthe increase in the film density by thermal treatment wassmaller than expected, it may be an important clue enoughto evaluate the change of film characteristics. Despite thissmall change in the film density, the crystallization of theIGZO thin films can obviously affect the device reliabilityregardless of the crystallinity and a specific crystal structure,such as a CAAC structure. Consequently, it can be supposedthat the reliability of the IGZO TFT, under various stressparameters, is clearly sensitive to the crystallinity of IGZO.Although a high-annealing temperature is needed for theIGZO crystallization, such high-annealing temperature can beeasily reduced using the conventional crystallization processdeveloped for Si material.

E. Near-Edge X-Ray Absorption Spectroscopy

To figure out the electronic structure of the unoccupiedstates in the CB and band-edge states of the IGZO films, theanalysis was done by X-ray absorption spectroscopy (XAS)measurements as a function of the annealing temperature,

Fig. 7. (a) Normalized XAS O K1 edge spectra (top) and second-derivativeO K1 edge spectra (bottom) as a function of annealing temperature,respectively. The Gaussian fits, from which the energy positions weredetermined by the minimum of second derivative, represent the crystal-fieldsplittings of sp orbitals. (b) Band-edge states below the CB at ∼530 eV wereshown as a function of annealing temperature.

as shown in Fig. 7. Renormalizations of the XAS spectrawere carefully performed by subtracting the X-ray beambackground and scaling of edge level from the raw data.The qualitative changes and the comparison of the CB fea-tures, such as the number and distribution of the unoccu-pied states, could be analyzed by the renormalizations ofXAS spectra [20]. The normalized oxygen K1 edge spectra ofthe IGZO films are directly related to the oxygen p-projectedstates of the CB, which consists of unoccupied hybridizationorbitals for In 5sp + O 2p, Ga 4sp + O 2p, and Zn 4sp +O 2p [21], [22].

Fig. 7 also includes the second-derivative analysis of theO K1 edge spectra. This analysis is sensitive to minute changesin the XAS spectral feature, which is very useful in interpretingthe crystal field splitting of representative orbital states. Basedon the second-derivative spectrum analysis, the Gaussian fits ofhybridized orbital states were carefully performed, includingthe band-edge states below the CB. Two distinct XAS peakscomposed of four Gaussian fits imply the hybridization ofIn 5s, Ga 4s, Zn 4s + O 2p and In 5p, Ga 4p, Zn 4p +O 2p from the low photon energy [21]. The interestingfinding is the sharpening of two peaks with the increase of


the annealing temperature, which indicates the crystal-fieldsplitting due to the changes of a physical structure under high-annealing temperature, resulting in improvement of the devicereliability. In addition, when the changes of the third andfourth Gaussian fits considered, the relative ratio of p orbitalhybridization with the directionality compared with s orbitalwith spherical symmetry is enhanced by the high annealingtemperature. This modification of the orbital hybridizationcould induce the degradation of device performance, becauseof the splitting of the unoccupied states and the mixture ofdirectional p orbitals. This can increase the device stabilityunder various stress conditions, despite of the difficulty ofcharge transport in the CB.

Another meaningful finding is the analysis of the band-edgestate below the CB, as shown in Fig. 7(b). The band-edgestates after high-annealing temperature at 1000 °C are dramati-cally reduced compared with the other annealing temperature.This change could be related to the relative decrease of anorbital boundary by the uniform composition of the orbitalhybridization, as compared with the IGZO film annealed at thelow temperature. As a result, the reduction of the band-edgestates within the bandgap is correlated to the improvementof reliability due to the decrease of the charge trapping andscattering.

IV. CONCLUSION

In summary, we investigated the reliability of thec-IGZO TFTs under the PBS/negative bias stress with lightillumination, compared with the conventional a-IGZO TFTs.The IGZO structure could affect the device performance,especially the Vth characteristic, according to the amorphousand crystalline structures. Furthermore, by increasing the crys-tallinity, the device stability was significantly improved; this isprobably due to the decrease of trap density between the gateinsulator and the channel layer or the channel itself. Thus, it isclear that the device reliability, which was induced by variousstress conditions, can be improved through the crystallizationof the IGZO film. In particular, this improvement is caused bythe crystallization itself, and not the specified crystal structure,such as the CAAC structure. Even though many reports havebeen focused on the AOS film for the last ten years, thecrystalline oxide semiconductor could be one of the keysolutions for the next-generation active matrix displays andelectronics because of their superior stability.

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Authors’ photographs and biographies not available at the time of publication.

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