2.5Gbps jitter generator

Part 1 final presentation

What is jitter?

• By definition, jitter is the short term variation of the significant instants of a digital signal from their ideal positions in time.

How does jittered signal look like?

Components of a jitter :random jitter and deterministic jitter

• Random jitter is generally assumed to follow a Gaussian distribution which is characterized by a mean ,

• and width .

• Deterministic jitter is limited, and is determined by its peak-to-peak value,

• .

rms

RJJ

DJppJ

Jitter measurement :eye diagrams

Why jitter is important?

Why jitter is important?

• The probability that the edge crosses

• the sampling point, causing a bit error, follows Gaussian distribution .

• The mean value is determined by the deterministic jitter component.

Jitter generation

• Random jitter is generated from the accumulation of random processes including thermal noise and shot noise.

• Deterministic jitter is the jitter generation from a variety of systematic effects.

The causes include duty-cycle distortion (DCD), intersymbol interference (ISI),

sinusoidal or periodic jitter (PJ) and crosstalk.

DCD example

ISI example

Crosstalk example

Crosstalk example

Eye diagram definitions

Effect of random jitter on BER budget

Jitter and BER budget:

• Assume we want to get BER of

This means

1210

-121 1 1 1Pr( ( ) ( - + ) ) = 10 ;

2 2 2 2

14.1

1 xLets test this result in MatLab , remebering that Q(x)= erfc( ) :

2 2>> (1/2*erfc(7.05/(sqrt(2))))

ans =

8.9459e-013

RJ DJ RJ DJPP PP

RJ DJrms pp

J UI J J UI J

J J UI

Jitter transfer and jitter tolerance

• Jitter transfer measures the clock recovery performance of a network or network element as a function of jitter frequency. It is measured by applying sinusoidal jitter of

specified amplitude and frequency,

to the data and measuring the output jitter amplitude atthat frequency, The jitter transfer is given by

Appl J (t) = A sin(2 f t)

out JA ( f ).

Tfer J out J Appl JX ( f ) = A ( f ) / A ( f ).

Jitter toleranceJitter tolerance measures the ability of a device or system, primarily at the receiving end, to track large amounts of jitter without degrading the BER. It is the amplitude of sinusoidal jitter

applied to a device that results in an equivalent 1 dB reduction in sensitivity. The measurement is performed by first measuring the BER of the Device Under Test (DUT) without applied jitter. The signal power is attenuated until the onset of errors or until a specified BER, typically , is exceeded …

Appl J (t) = A sin(2 f t)

1210

Jitter tolerance (continued)

The attenuation is reduced 1 dB and the signal is transmitted with applied sinusoidal jitter imposed on the clock. The jitter amplitude is increased until the onset of errors or the specified BER is exceeded. The resulting

jitter amplitude is the jitter tolerance at that frequency,

Jitter tolerance and transfer are primarily of interest in SONet/SDH/OTN applications.

Tol JA ( f ).

Jitter transfer masks

Test system block diagram

Jitter Generator schematic:input structure

Jitter Generator schematic:input structure

• AC coupling (RocketIO termination voltages are )

• End termination of differential line

• DC rebias

• Capacitive bypass filtering of reference

voltage VBB

TTX TRXV 2.5 ,V 1.8V V

output structure: ECL to CML translator / buffer 1:2

Connection to controller

lvcmos to lvpecl logic levels translator for LEN signal

Jitter Budget Calculation

• How much internal jitter do we generate? NB4N11M DJ = 20ps

NB4N11M RJ (rms) = 1ps SY100EP195 DJ = 25ps (DCD) SY100EP195 RJ (rms) = 0.2ps

RocketIO TX DJ = 15 ps (DCD)• Plus the jitter following from the ac- coupling, as well as low-pass effects (ISI). This amount will be estimated from Hyperlynx simulation

Jitter Budget Calculation

2 2 2(1 ) (0.2 ) ( _ ) 1.5RJ ps ps rocketIO RJ ps

internalDJ =(15+25+20)ps =60ps

Remembering that 14.1 and 400 @ 2.5 ,

( ) 400 14.1 1.5 60 315

RJ DJrms pp

DJpp generated

J J UI UI ps GHz

J ps ps ps ps

How to apply jitter modulation frequency?

• Modulation frequency is controlled by the rate of change of a digital control word to programmable

delay chip. Since the highest modulation frequency of interest in the SONET OC-48 mask is about it’s sufficient to change delays at about 50-100MHz, to rich specification frequency range

710 ,Hz

Example of periodic jitter generation