(240766019) Introduction to Embeded Systems

8/12/2019 (240766019) Introduction to Embeded Systems

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1. /mbedded systempower source(s) and the need for controlled powerdissipation.

2. /mbedded system Clock oscillator circ!it and clocking !nit. It lets a processor e)ec!te and

process instr!ctions.

3. Real time clock (RTC) timers and %ario!s timing needs of the system.-. Reset circuit and watc!dog timer.

0. System memories. 'In the second part of Chapter 2, we will learn the system memories in

detail*.

. System Inp!t !tp!t ""## ports, serial ni%ersal $synchrono!s 4ecei%er and ransmitter

($ART) and other ports, m!ltiple)ers and dem!ltiple)ers and interfacing b!ses. 'hese will be

dealt with in detail in Chapter 3*.

5. Interr!pt 6andler 'he latter part of Chapter - has the details*.

7. Interfacing !nits D$C "Digital to $nalog Con%erter# !sing +8 "+!lse 8idth od!lation#,

$DC "$nalog to Digital Con%erter#, 9/D and 9CD display !nits, keypad and keyboard, p!lse

dialer, modem and transcei%er

. 6ardware re;!ired for e)emplary embedded systems.

Different le%els of lang!ages that are !sed to de%elop the embedded software for

a system 'Chapter 0 details the highle%el programming aspects, = lang!age str!ct!res

and the application of these for coding embedded software*.

1. System de%ice dri%ers, de%ice management and m!ltitasking !sing an operating system "S#

and real time operating system "4S#. '4S "s# are dealt with in detail in Chapters and

1?, and case st!dies !sing 4Ss in Chapter 11*.

2. Software tools in system designing.

3. Software tools re;!ired in si) e)emplary cases.

-. +rogramming models for software designing. 'Software designing models are detailed in

Chapter *.

%&emplary applications of each type of embeddedsystem.

Designing an embedded system on a @9SI chip.

1. /mbedded SoC "System on Chip# and AS"C "$pplication Specific Integrated Circ!it# and

e)amples of their applications. hese !se "i# $pplication Specific Instr!ction +rocessor

"$SI+#, "ii# Intellect!al +roperty "I+# core, "iii# (ield +rogrammable Aate $rrays "(+A$# core

with single or m!ltiple processor !nits on an $SIC chip.2. Smart card an e)ample of the !nits of an embedded system on a chip "SoC#.


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$ system is a way of working, organiBing or doing one or many tasks according to a fi)ed plan,

program, or set of r!les. $ system is also an arrangement in which all its !nits assemble and work

together according to the plan or program. 9et !s e)amine the following two e)amples.

Consider a watch. It is a time-display system. Its parts are its hardware, needles and battery with

the bea!tif!l dial, chassis and strap. These parts organize to show the real time e%ery second andcontin!o!sly !pdate the time e%ery second. he systemprogram !pdates the display !sing three

needles after each second.It follows a set of rules. Some of these r!les are as follows: "i# $ll needles

mo%e clockwise only. "ii# $ thin and long needle rotates e%ery second s!ch that it ret!rns to same

position after a min!te. "iii# $ long needle rotates e%ery min!te s!ch that it ret!rns to same position

after an ho!r. "i%# $ short needle rotates e%ery ho!r s!ch that it ret!rns to same position after twel%e

ho!rs. "%# $ll three needles ret!rn to the same inclinations after twel%e ho!rs each day.

Consider a washing machine. It is an automatic clothes-washing system. he important hard

ware parts incl!de its stat!s display panel, the switches and dials for !serdefined programming, amotor to rotate or spin, its power s!pply and control !nit, an inner waterle%el sensor, a solenoid %al%e

for letting water in and another %al%e for letting water drain o!t. These parts organize to wash clothes

a!tomatically according to a program preset by a !ser. The system-program is to wash the dirty

clothes placed in a tank, which rotates or spins in preprogrammed steps and stages. It follows a set of

rules. Some of these r!les are as follows: "i# (ollow the steps strictly in the following se;!ence. Step

I: 8ash by spinning the motor according to a programmed period. Step II: 4inse in fresh water after

draining o!t the dirty water, and rinse a second time if the system is not programmed in watersa%ing

mode. Step III: $fter draining o!t the water completely, spin fast the motor for a programmed period

for drying by centrif!ging o!t water from the clothes. Step I@: Show the washo%er stat!s by a

blinking display. So!nd the alarm for a min!te to signal that the wash cycle is complete. "ii# $t each

step, display the process stage of the system. "iii# In case of an interr!ption, e)ec!te only the

remaining part of the program, starting from the position when the process was interr!pted. here canbe no repeti tion from Step I !nless the !ser resets the system by inserting another set of clothes and

resets the program.

$ comp!ter is a system that has the following or more components.

1. $ microprocessor

2. $ large memory comprising the following two kinds:

"a# +rimary memory "semiconductor memories 4$, 4 and fast accessible caches#

"b# Secondary memory "magnetic memory located in hard disks, diskettes and cartridge tapes

and optical memory in CD4#

3. Inp!t !nits like keyboard, mo!se, digitiBer, scanner, etc.

-. !tp!t !nits like %ideo monitor, printer, etc.0. etworking !nits like /thernet card, frontend processorbased dri%ers, etc.


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. I !nits like a modem, fa) c!m modem, etc.

An embedded system is one t!at !as computer-!ardware wit! software embedded in it as one of

its most important component' It is a dedicated comp!terbased system for an application"s# or

prod!ct. It may be either an independent system or a part of a larger system. $s its software !s!ally

embeds in 4 "4ead nly emory# it does not need secondary memories as in a comp!ter. $nembedded system has three main components:

1. It has hardware. (ig!re 1.1 shows the !nits in the hardware of an embedded system.

2. It has main application software. he application software may perform conc!rrently the series

of tasks or m!ltiple tasks.

3. It has a real time operating system "4S# that s!per%ises the application software and

pro%ides a mechanism to let the processor r!n a process as per sched!ling and do the conte)t

switch between the %ario!s processes "tasks#. 4S defines the way the system works. It

organiBes access to a reso!rce in se;!ence of the series of tasks of the system. It sched!les

their working and e)ec!tion by following a plan to control the latencies and to meet the

deadlines. '9atency refers to the waiting period between r!nning the codes of a task and the

instance at which the need for the task arises.* It sets the r!les d!ring the e)ec!tion of the

application software. $ smallscale embedded system may not need an 4S.$n embedded system has software designed to keep in %iew three constraints: "i# a%ailable system

memory, "ii# a%ailable processor speed and "iii# the need to limit power dissipation when r!nning the

system contin!o!sly in cycles of wait for e%ents, r!n, stop and wake!p.

here are se%eral definitions of embedded systems gi%en in books p!blished recently. Ai%en below

is a series of definitions from others in the field:8ayne 8olf a!thor of Computers as Components Principles of Embedded Computing System

esign!" E8hat is an embedded computing systemF 9oosely defined, it is any de%ice that incl!des a

programmable comp!ter b!t is not itself intended to be a generalp!rpose comp!terG and Ea fa) ma

chine or a clock b!ilt from a microprocessor is an embedded comp!ting systemG.

odd D. orton a!thor ofEmbedded #icrocontrollers: EEmbedded Systems are electronic systems

that contain a microprocessor or microcontroller, b!t we do not think of them as comp!ters the

comp!ter is hidden or embedded in the system.GDa%id /. Simon a!thor of $n Embedded Software Primer: E+eople !se the term embedded system

to mean any comp!ter system hidden in any of these prod!cts.G

im 8ilmsh!rst a!thor of $n Introduction to the esign of Small Scale Embedded System with

e%amples from PIC& 'C)* and +',C)' #icrocontrollers: "1# E$n embedded system is a system

whose principal f!nction is not comp!tational, b!t which is controlled by a comp!ter embedded

within it. he comp!ter is likely to be a microprocessor or microcontroller. he word embedded

implies that it lies inside the o%erall system, hidden from %iew, forming an integral part of greater

wholeG. "2# E$n embedded system is a microcontrollerbased, softwaredri%en, reliable, real time

control system, a! tonomo!s, or h!man or networkinteracti%e, operating on di%erse physical

%ariables and in di%erse en%ironments, and sold into a competiti%e and costconscio!s marketG.


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HIJ K J K

8e can classify embedded systems into three types as follows. 'Section 1.0 will gi%e e)amples of

each type later*:

1. Small Scale Embedded Systems: hese systems are designed with a single 7 or 1bit

microcontroller& they ha%e little hardware and software comple)ities and in%ol%e boardle%el

design. hey may e%en be battery operated. 8hen de%eloping embedded software for these, an

editor, assembler and cross assembler, specific to the microcontroller or processor !sed, are

the main programming tools. s!ally,


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hardware comple)ities. $n assembler is of little !se as a programming tool. hese systems

may also employ the readily a%ailable $SS+s and I+s "e)plained later# for the %ario!s

f!nctionsLfor e)ample, for the b!s interfacing, encrypting, deciphering, discrete cosine

transformation and in%erse transformation, C+I+ protocol stacking and network connecting

f!nctions. '$SS+s and I+s may also ha%e to be appropriately config!red by the systemsoftware before being integrated into the systemb!s.*

3. Sophisticated Embedded Systems: Sophisticated embedded systems ha%e enormo!s

hardware and software comple)ities and may need scalable processors or config!rable

processors and programmable logic arrays. hey are !sed for c!tting edge applications that

need hardware and software codesign and integration in the final system& howe%er, they are

constrained by the processing speeds a%ailable in their hardware !nits. Certain software

f!nctions s!ch as encryption and deciphering algorithms, discrete cosine transformation and

in%erse transformation algorithms, C+I+ protocol stacking and network dri%er f!nctions are

implemented in the hardware to obtain additional speeds by sa%ing time. Some of the f!nctions

of the hardware reso!rces in the system are also implemented by the software. De%elopment

tools for these systems may not be readily a%ailable at a reasonable cost or may not be

a%ailable at all. In some cases, a compiler or retargetable compiler might ha%e to be de%elopedfor these. '$ retargetable compiler is one that config!res according to the gi%en target

config!ration in a system.*

M II N K J

$n embedded system designer has to de%elop a prod!ct !sing the a%ailable tools within the gi%en

specifications, cost and time frame. 'Chapters 5 and 12 will co%er the design aspects of embedded

systems. See also Section 1.0.*

1. S.ills for Small Scale Embedded System esigner! $!thor im 8ilmsh!rst in the book

referred abo%e "see page -#, has said that the following skills are needed in the indi%id!al or

team that is de%eloping a smallscale system: E(!ll !nderstanding of microcontrollers with a

basic knowledge of comp!ter architect!re, digital electronic design, software engineering,

data comm!nication, control engineering, motors and act!ators, sensors and meas!rements,analog electronic design and IC design and man!fact!reG. Specific skills will be needed in

specific sit!ations. (or e)ample, control engineering knowledge will be needed for design of

control systems and analog electronic design knowledge will be needed when designing the

system interfaces. Oasic aspects of the following topics will be described in this book to

prepare the designer who already has a good knowledge of the microprocessor or

microcontroller to be !sed. "i# Comp!ter architect!re and organiBation. "ii# emories. "iii#

emory allocation. "i%# Interfacing the memories. "%# O!rning "a term !sed for porting# the

e)ec!table machine codes in +4 or 4 "Section 2.3.1#. "%i# se of decoders and

dem!ltiple)ers. "%ii# Direct memory accesses. "%iii# +orts. "i)# De%ice dri%ers in assembly. ")#

Simple and sophisticated b!ses. ")i# imers. ")ii# Interr!pt ser%icing mechanism. ")iii# C

programming elements. ")i%# emory optimiBation. ")%# Selection of hardware and

microcontroller. ")%i# se of IC/ "InCirc!it /m!lators#, crossassemblers and testing

e;!ipment. ")%ii# Deb!gging the software and hardware b!gs by !sing test %ectors. Oasic

knowledge in the other areasLdata comm!nication, control engineering, motors and act!ators,

sensors and meas!rements, analog electronic design and IC design and man!fact!reLcan

be obtained from the standard te)tbooks a%ailable.


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$ designer interested in smallscale embedded systems may not need at all concepts of

interr!pt latencies and deadlines and their handling, the 4S programming tools described in

Chapters

and 1? and program designing models gi%en in Chapter .

2. S.ills for #edium Scale Embedded System esigner!


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mostly in the form of an IC chip& alternati%ely, it co!ld be in core form in an $SIC or at a SoC. Core

means a part of the f!nctional circ!it on the @9SI chip.

$n embedded system processor chip or core can be one of the following"

1. Aeneral +!rpose +rocessor "A++#:

a. icroprocessor. '4efer to Section 1.2.2.*b. icrocontroller. '4efer to Section 1.2.3.*

c . /mbedded +rocessor. '4efer to Section 1.2.-.*

d. Digital Signal +rocessor "DS+#. '4efer to Section 1.2.0.*

e. edia +rocessor. '4efer to $ppendi) / Section /.1.*

2. $pplication Specific System +rocessor "$SS+# as additional processor '4efer to Section

1.2..*

3. !ltiprocessor system !sing Aeneral +!rpose processors "A++s# and $pplication Specific

Instr!ction +rocessors "$SI+s# '4efer to Section 1.2.5.*

-. A++ core "s# or $SI+ core "s# integrated into either an $pplication Specific Integrated Circ!it

"$SIC#, or a /ery 0arge Scale Integrated Circuit "@9SI# circ!it or an (+A$ core integrated

with processor !nit"s# in a @9SI "$SIC# chip. '4efer to Section 1..*

(or a system designer, the following are important considerations when selecting a processor:1. Instr!ction set.

2. a)im!m bits in an operand "7 or 1 or 32# in a single arithmetic or logical operation.

3. Clock fre;!ency in 6B and processing speed in illion Instr!ctions +er Second ""PS#.

'4efer to $ppendi) O for an alternate metric D!yrystone for processing performance.*

-. +rocessor ability to sol%e the comple) algorithms !sed in meeting the deadlines for their

processing.

H I JI KM NISH N

H N

H

.

he C+ is a !nit that centrally fetches and processes a set of generalp!rpose instr!ctions. he C+

instr!ction set "Section 2.-# incl!des instr!ctions for data transfer operations,$01 operations,stac.

operations, input and output "I# operations andprogram control,se2uencing andsuper3ising opera

tions. he general p!rpose instr!ction set "refer to $ppendi) $, Section $.1# is always specific to a

specific C+. $ny C+ m!st possess the following basic f!nctional !nits.1. $ control !nit to fetch and control the se;!ential processing of a gi%en command or instr!ction

and for comm!nicating with the rest of the system.2. $n $9 for the arithmetic and logical operations on the bytes or words. It may be capable of

processing 7, 1, 32 or - bit words at an instant.


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R"SC processors and processor instr!ctionset will be e)plained later in $ppendices $ and O.*R"SCs

are used w!en t!e system needs to perform intensie computation for e&ample in a speec!

processing system'

6ow does a system designer select a microprocessorF his will be e)plained in Section 2.2.

"

H N # H

II

W!st as a microprocessor is the most essential part of a comp!ting system, a microcontroller is themost essential component of a control or comm!nication circ!it. A microcontroller is a single-c!ip*+S" unit (also called ,microcomputer) w!ic! t!oug! !aing limited computational capabilities

possesses en!anced input-output capabilities and a number of on-c!ip functional units. '4efer toSection 1.3 for %ario!s f!nctional !nits.* icrocontrollers are partic!larly s!ited for !se in embeddedsystems for realtime control applications with on-chipprogram memory and de%ices.

(ig!re 1.2 shows the f!nctional circ!its present "in solid bo!ndary bo)es# in a microcontroller. It

also shows the applicationspecific !nits "in dashed bo!ndary bo)es# in a specific %ersion of a gi%enmicrocontroller family. $ few of the latest microcontrollers also ha%e high comp!tational ands!perscalar processing capabilities. '(or the meaning of s!perscalar architect!re, refer to Section2.1.* $ppendi) C gi%es the comparati%e f!nctionalities of select microcontroller representati%es fromthese families.

Important microcontroller chips for embedded systems are !s!ally among the following fi%estreams of families gi%en in able 1.2.

J I

Stream

Stream 1

Stream 2

Stream 3

Stream -

Stream 0Q

X ther pop!lar microcontrollers are as follows. "i# 6itachi 67) family and S!per6

5))). "ii# its!bishi 5-?, 55??, 1C and 32C families. "iii# ational

Semicond!ctor C+7 and C41 1C. "i%# oshiba 9CS ??S "%# e)as Instr!ments

S+ -3? for low %oltage battery based system. "%i# Sams!ng S$7. "%ii# Uiglog U7?

and eU7?K 7?)7 icrocontroller %ersions "typically 7?177 eight bit processor or 7?37 si)teen

bit processor# with each, thereare the - kO memory, 3 timers and 2 D$ channels.Q

4efer Sections 1.2.- and O.1

(ig!re 1.3 shows commonly !sed microcontrollers in the small, medi!m and largescale embed

ded systems. In Section C.1 "refer to ables C.1.1 to C.1.3 therein# those feat!res will be described

that ha%e to be considered by a system designer before choosing a microcontroller as a processing

!nit.


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K K K Q#

>S H

H I J

" K JH .I 1

(or fast, precise and intensi%e calc!lations and for comple) real time applications, the microcontrollersand microprocessors mentioned abo%e do not s!ffice. $n electronics warfare system, for e)ample, an$d%anced 8arning and Control System "$8$CS#, which also associates tracking radar, is an e)am pleof a comple) realtime system. Special microprocessors and microcontrollers, often called embed


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JI JI " 2 "3

W!st as a microprocessor is the most essential !nit of a comp!ting system, a digital signal processor

"DS+# is an essential !nit of an embedded system for a large n!mber of applications needing process

ing of signals. /)emplary applications are in image processing, m!ltimedia, a!dio, %ideo, 6D@,

DS+ modem and telecomm!nication processing systems. DS+s also find !se in systems forrecogniBing an image pattern or a D$ se;!ence fast. $ppendi) D describes in detail the embedded

system DS+s.

he DS+ as a A++ is a single chip @9SI !nit. It possesses the comp!tational capabilities of a

microprocessor and also has a !ltiply and $cc!m!late "$C# !nit"s#. owadays, a typical DS+ has

a 1 ) 32 $C !nit.$ DS+ pro%ides fast, discretetime, signalprocessing instr!ctions. It has @ery 9arge Instr!ction

8ord "@9I8# processing capabilities& it processes Single Instr!ction !ltiple Data "SID# instr!c

tions fast& it processes Discrete Cosine ransformations "DC# and in%erse DC "IDC# f!nctions

fast. he latter are a m!st for fast e)ec!tion of the algorithms for signal analysing, coding, filtering,

noise cancellation, echoelimination, compressing and decompressing, etc.

Important DS+s for the embedded systems are from three streams as gi%en in able 1.3.

J I

S N N "

Stream

Stream 1

Stream 2

Stream 3

> (or e)ample, S32?C2ZZ for fi)ed point DS+ at clock speed of 2?? 6B. 4efer

to Section D.- for a detailed description.

Q H

..I J . K " 2 " 3

9ately a new class of embedded systems has emerged. Systems additionally incorporates the $pplica

tion Specific System processor $SS+ chip"s# or core "s# in its design. hese ha%e been recently

become a%ailable.

$ss!me that there is an embedded system for realtime %ideo processing. 4ealtime processing

need in embedded systems arises for digital tele%ision, high definition @ decoders, set!p bo)es,

D@D "Digital @ideo Disc# players, 8eb phones, %ideoconferencing and other systems. he process

ing needs a %ideo compression and decompression system, which incorporates an +/A 2 or +/A- standard. '+/A stands for otion +ict!re /)pert Aro!p.* +/A 2 or +/A - compression of

signals is done before storing or transmitting& decompression is done before retrie%ing or recei%ing

these signals. (or +/A compression algorithms, if a A++ embedded software is r!n, separate

DS+"s# are re;!ired to achie%e realtime processing. $n $SS+ that is dedicated to these specific tasks


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alone pro%ides a faster sol!tion. he $SS+ is config!red and interfaced with the rest of the embedded

system.

$ss!me that there is an embedded system that interconnects !sing a specific protocol the system

!nits thro!gh a specific b!s architect!re to another system. $lso, ass!me that there is a need for

s!itable encryption and decryption. 'he o!tp!t bit stream encryption protects the messages or designfrom passing to an !nknown e)ternal entity.* (or these tasks, besides embedding the software, it may

also be necessary to embed some 4S feat!res. 'Section 1.-.*. If the software alone is !sed for the

abo%e tasks, it may take a longer time than a hardwired sol!tion for applicationspecific processing.

$n $SS+ chip pro%ides s!ch a sol!tion. (or e)ample, an $SS+ chip 'from i2Chip "http:

www.i2Chip.co m #* has a C+, D+, I+, $4+, and /thernet 1?1?? $C "edia $ccess Control#

hardwired logic incl!ded into it. he chip from i2Chip, 831??$, is a !ni;!e hardwired Internet con

necti%ity sol!tion. !ch needed C+I+ stack processing software for networking tasks is th!s a%ail

able as a hardwired sol!tion. his gi%es o!tp!t fi%e times faster than a software sol!tion !sing the

system=s A++. It is also an 4Sless sol!tion. sing the same microcontroller in the embedded

system to which this $SS+ chip interfaces, /thernet connecti%ity can be added. '(or terms C+,

D+, I+, $4+, /thernet 1?1?? and $C, refer to a s!itable reference book on comp!ter networking.

4efer to Internet and 7eb Technologies by 8a9:amal& Tata #c;raw-,ill& 66& to !nderstand themeaning of each bit in these protocols.*

$nother $SS+ e)ample is


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embedded system. '$ edia processor, described in $ppendi) /, is an alternate sol!tion in place of

!se of m!ltiprocessors for real time %ideo processing.*

S

H .D H

Q , # , # 1# 5>

" 7 J J J " 7.J J H .

ost systems ha%e apower supply of their own. he s!pply has a specific operation range or a range

of %oltages. @ario!s !nits in an embedded system operate in one of the following fo!r operation

ranges:

"i# 0.?@ > ?.20@

"ii# 3.3@ > ?.3@"iii# 2.? > ?.2@

"i%# 1.0@ > ?.2@$dditionally, a 12@ > ?.2@ s!pply is needed for a flash "a memory form !sed in systems like latest

digital cameras# or /lectrically /rasable and +rogrammable 4ead nly memory "//+4# when

present in the microcontroller of an embedded system and for 4S232C serial Interfaces "Section 2#.

'9ately, flash memory needed s!pply %oltages are 0@ or less.*

@oltage is applied on the chips of an embedded system as follows. he flow of %oltage and the

connections depend on the n!mber of s!pply pins pro%ided within the processor pl!s the pins in the

associated chips and circ!its. he pins are in pairs, consisting of the s!pply in and the gro!nd line.

he following points ha%e to be taken care of while connecting the s!pply rails "lines#:

1. $ processor may ha%e more than two pins of @DD

and @SS

. his distrib!tes the power in

all the sections and red!ces interference between sections. here sho!ld be aseparate radio fre;!ency interference bypassing capacitor as close as possible toeach pair of @

DDand @

SSpins in the system processor as well as in other !nits.

2. S!pply sho!ld separately power the "a# e)ternal I dri%ing ports "b# timers and "c# clock andreset circ!its. Clock and reset circ!its "Sections 1.3.2 and 1.3.3# need to be specially designed

to be free from any radio fre;!ency interference. $n I de%ice may dissipate more power than

the other internal !nits of the processor. $ timer may dissipate a constant power e%en in 7ait

state. 6ence, these three circ!its are powered separately.

3. (rom the s!pply, there sho!ld be separate interconnections for pairs of @DD

and @SS

pins, analog gro!nd, analog reference and analog inp!t %oltage lines, the $DC !nitdigital gro!nd and other analog parts in the system. $n $DC needs stringent

noisefree s!pply inp!ts.Certain systems do not ha%e a power so!rce of their own: they connect to an e)ternalpower supply

or are powered by the !se of c!arge pumps. "1# etwork Interface Card "IC# and Araphic $ccelera

tor are e)amples of embedded systems that do not ha%e their own power s!pply and connect to +C

powers!pply lines. "2# $ charge p!mp consists of a diode in the series followed by a charging

capacitor. he diode gets forward bias inp!t from an e)ternal signal& for e)ample, from an 4S signal


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in the case of the mo!se !sed with a comp!ter. Charge p!mps bring the power from a nons!pply line.

'inepins C port has a signal called 4e;!est o Send "4S#. It is an acti%e low signal. ost of the

time it is in inacti%e state logic


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CS circ!it, power dissipates only at the instance of change in inp!t. herefore, !nnecessary

glitches and fre;!ent inp!t changes increase power dissipation. @9SI circ!it designs ha%e a !ni;!e

way of a%oiding power dissipation. $ circ!it design is made s!ch that it eliminates all remo%able

glitches, thereby eliminating any fre;!ent inp!t changes.

!ote 1 he processor goes into a stop state when it recei%es a Stop instr!ction. he stop state alsoocc!rs in the following conditions: "1# n disabling the clock inp!ts to the processor. "2# n stopping

the e)ternal clock circ!it f!nctions. "3# n the processor operating in a!tosh!tdown mode. 8hen in

stop state, the processor disconnects with the b!ses. 'O!ses become in tristate.* he stop state can

change to a r!nning state. he transition to the r!nning state is either beca!se of a !ser interr!pt or

beca!se of the periodically occ!rring wake!p interr!pts.

!ote 2 he processor goes into a waiting state either on recei%ing "i# an instr!ction for 7ait, which

slows or disables the clock inp!ts to some of the processor !nits incl!ding $9, or "ii# when an

e)ternal clockcirc!it becomes nonf!nctional. he timers are still operating in the waiting state. he

waiting state changes to the r!nning state when either "i# an interr!pt occ!rs or "ii# a reset signals.

!ote 3 +ower dissipation red!ces typically by 2.0 m8 per 1?? k6B red!ced clock rate. So

red!ction from 7??? k6B to 1?? k6B red!ces power dissipation by abo!t 2?? m8, which is nearlysimilar to when the clock is nonf!nctional. '4emember, total power dissipated "energy re;!ired# may

not re d!ce. his is beca!se on red!cing the clock rate the comp!tations will take a longer time at the

lower clock rate and the total energy re;!ired e;!als the power dissipation per second m!ltiplied by

the time.* he power 20 m8 is typically the resid!al dissipation needed to operate the timers and few

other !nits. Oy operating the clock at lower fre;!ency or d!ring the powerdown mode of the

processor, the ad%antages are as follows: "i# 6eat generation red!ces. "ii# 4adio fre;!ency

interference also then red!ces d!e to the red!ced power dissipation within the gates. '4adiated 4(

"4adio (re;!ency# power depends on the 4( c!rrent inside a gate, which red!ces d!e to increase in


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After t!e power supply t!e clock is t!e ne&t important unit of a system. $ processor needs a cloc"

oscillator circ!it. he clock controls the %ario!s clocking re;!irements of the C+, of the system

timers and the C+ machine cycles. he machine cycles are for

"i# fetching the codes and data from memory and then decoding and e)ec!ting at the processor,

and

"ii# transferring the res!lts to memory.

he cloc. controls the time for e)ec!ting an instr!ction. he clock circ!it !ses either a crystal

"e)ternal to the processor# or a ceramic resonator "internally associated with the processor# or an

e)ternal oscillator IC attached to the processor. "a# he crystal resonator gi%es the highest stability in

fre;!ency with temperat!re and drift in the circ!it. he crystal in association with an appropriate

resistance in parallel and a pair of series capacitance at both pins resonates at the fre;!ency, which is

either do!ble or single times the crystalfre;!ency. (!rther, the crystal is kept as near as feasible to

two pins of the processor. "b# he internal ceramic resonator, if a%ailable in a processor, sa%es the !se

of the e)ternal crystal and gi%es a reasonable tho!gh not %ery highly stable fre;!ency. '$ typical drift

of the ceramic resonator is abo!t ten min!tes per month compared to the typical drift of 1 or 0 min!tes

per month of a crystal*. "c# he e)ternal ICbased clock oscillator has a significantly higher power

dissipation compared to the internal processorresonator. 6owe%er, it pro%ides a higher dri%ing capa

bility, which might be needed when the %ario!s circ!its of embedded system are conc!rrently dri%en.

(or e)ample, a m!ltiprocessor system needs the clock circ!it, which sho!ld gi%e a high dri%ing capa

bility and enables control of all the processors conc!rrently.

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$ timer circ!it s!itably config!red is the system-clock, also called realtime clock "4C#. $n 4C is

!sed by the sched!lers and for realtime programming. $n 4C is designed as follows: $ss!me a

processor generates a clock o!tp!t e%ery ?.0 ms. 8hen a system timer is config!red by a software

instr!ction to iss!e timeo!t after 2?? inp!ts from the processor clock o!tp!ts, then there are 1????

interr!pts "ticks# each second. he 4C ticking rate is then 1? k6B and it interr!pts e%ery 1?? ms. he

4C is also !sed to obtain softwarecontrolled delays and timeo!ts.ore than one timer !sing the system clock "4C# may be needed for the %ario!s timing and

co!nting needs in a system. 4efer to Section 3.2 for a description of timers and co!nters.


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In a system, there are %ario!s types of memories. (ig!re 1.- shows a chart for the %ario!s forms ofmemories that are present in systems. hese are as follows: "i# Internal 4$ of 20 or 012 bytes in amicrocontroller for registers, temporary data and stack' "ii# Internal 4+4/+4 for abo!t

- kO to 1 kO of program "in the case of microcontrollers#. "iii# /)ternal 4$ for the temporarydata and stack "in most systems#. "i%# Internal caches "in the case of certain microprocessors#. "%#//+4 or flash "in many systems sa%ing the res!lts of processing in non%olatile memory: fore)ample, system stat!s periodically and digitalcamera images, songs, or speeches after a s!itableformat compression#. "%i# /)ternal 4 or +4 for embedding software "in almost all nonmicrocontrollerbased systems#. "%ii# 4$ emory b!ffers at the ports. "%iii# Caches "in s!perscalermicroprocessors#. '4efer to Sections 2.1 and 2.3 for f!rther details of these.*

J

able 1.- gi%es the f!nctions assigned in the embedded systems to the memories. 4 or +4

or /+4 embeds the embedded software specific to the system.

J I

# H N

emory eeded (!nctions

4 or /+4 Storing $pplication programs from where the processor fetches the instr!ctioncodes. Storing codes for system booting, initialiBing, Initial inp!t data and

Strings. Codes for 4S. +ointers "addresses# of %ario!s ser%ice ro!tines.

4$ "Internal and Storing the %ariables d!ring program r!n and storing the stack. Storing inp!t or

/)ternal# and 4$ o!tp!t b!ffers, for e)ample, for speech or image.

for b!ffer

//+4 or (lash Storing non%olatile res!lts of processing.

Caches Storing copies of instr!ctions and data in ad%ance from e)ternal memories

and storing temporarily the res!lts d!ring fast processing.

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he system gets inp!ts from physical de%ices "s!ch as, for e)ample, the keyb!ttons, sensors and

transd!cer circ!its# thro!gh the inp!t ports. $ controller circ!it in a system gets the inp!ts from the

sensor and transd!cer circ!its. $ recei%er of signals or a network card gets the inp!t from a comm!

nication system. '$ comm!nication system co!ld be a fa) or modem, a broadcasting ser%ice*. Signalsfrom a network are also recei%ed at the ports. Consider the system in an $!tomatic Chocolate @ending

achine. It gets inp!ts from a port that collects the coins that a child inserts. +res!me that only a

child wo!ld !se this wonder machineH Consider the system in a mobile phone. he !ser inp!ts the

mobile n!mber thro!gh the b!ttons, directly or indirectly "thro!gh recall of the n!mber from its

memory#. $ panel of b!ttons connects to the system thro!gh the inp!t port or ports. +rocessor

identifies each inp!t port by its memory b!ffer address"es#, called port address"es#. W!st as a memory

location holding a byte or word is identified by an address, each inp!t port is also identified by the

address. T!e system gets t!e inputs by t!e read operations at t!e port addresses .

T!e system !as output ports t!roug! w!ic! it sends output bytes to t!e real world' $n o!tp!t

may be to an 9/D "9ight /mitting diode# or 9CD "9i;!id Crystal Display# panel. (or e)ample, a

calc!lator or mobile phone system sends the o!tp!tn!mbers or an SS message to the 9CD display.

$ system may send o!tp!t to a printer. $n o!tp!t may be to a comm!nication system or network. $control system sends the o!tp!ts to alarms, act!ators, f!rnaces or boilers. $ robot is sent o!tp!t for

its %ario!s motors. /ach o!tp!t port is identified by its memoryb!ffer address"es# "called port

address#. he system sends t!e output by a write operation to t!e port address'

here are also generalp!rpose ports for both the inp!t and o!tp!t "I# operations. (or e)ample, a

mobile phone system sends o!tp!t as well as gets inp!t thro!gh a wireless comm!nication channel.

/ach I port is also identified by an address to which the read and write operations both take place.

4efer to Section 3.1 for the details regarding ports. here are two types of "0# ports1 Parallel and

Serial. (rom a serial port, a system gets a serial stream of bits at an inp!t or sends a stream at an

o!tp!t. (or e)ample, thro!gh a serial port, the system gets and sends the signals as the bits thro!gh a

modem. $ serial port also facilitates long distance comm!nication and interconnections. $ serial port

may be a Serial $ART port a Serial Sync!ronous port or some other Serial "nterfacing port.

'$4 stands for ni%ersal $synchrono!s 4ecei%er and ransmitter*.

$ system port may get inp!ts from m!ltiple channels or may ha%e to send o!tp!t to m!ltiple

channels. $ demultiple&er takes the inp!ts from %ario!s channels and transfers the inp!t from a select

channel to the system. $ multiple&er takes the o!tp!t from the system and sends it to another system.$ system might ha%e to be connected to a n!mber of other de%ices and systems. (or networking

the systems, there are different types of b!ses: for e)ample, I2C, C$, SO, IS$, /IS$ and+CI. '4efer to Sections 3.3, 3.- and $ppendi) ( for b!ses in detail.*

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ow ass!me that the integrator operates with a d!al "pl!smin!s# s!pply. $lso ass!me that when

an integrator circ!it gi%es an o!tp!t of 1.?23 @olt, the p!lse width is 1??M of total p!lse time period

and _1.?2- @olt when the width is ?M. 8hen the width is made 20M by red!cing by half the %al!e in

an o!tp!t control register, the integrator o!tp!t will be ?.012 @olt& at 0?M the o!tp!t will be ?.? @olt.

(rom this information, finding the form!lae to obtain con%erted bits for a gi%en +8 register bitsranging from ???????? to 11111111 in both the sit!ations is left as an e)ercise for the reader.

he $DC in the system microcontroller can be !sed in many applications s!ch as Data $c;!isition

System "D$S#, analog control system and %oice digitiBing system. S!ppose a system needs to read an

analog inp!t from a sensor or transd!cer circ!it. If con%erted to bits by the $DC !nit in the system,

then these bits, after processing, can also gi%e an o!tp!t. his pro%ides a control for a!tomation by a

combined !se of $DC and D$C feat!res.he con%erted bits can be gi%en to the port meant for digital display. he bits may be transferred to

a memory address, a serial port or a parallel port.

$ processor may process the con%erted bits and generate a +!lse Code od!lated "+C# o!tp!t.

+C signals are !sed digitiBing the %oice in the digital format*.Important points abo!t the $DC are as follows:

1. /ither a single or d!al analog reference %oltage so!rce is re;!ired in the $DC. It sets either theanalog inp!t=s !pper limit only or the lower and !pper limits both. (or a single referenceso!rce, the lower limit is set to ?@ "gro!nd potential#. 8hen the analog inp!t e;!als the lowerlimit the $DC generates all bits as ?s, and when it e;!als the !pper limit it generates all bits as1s. '$s an e)ample, s!ppose in an $DC the !pper limit or reference %oltage is set as 2.200@olt. 9et the lower limit reference @oltage be ?.200@. Difference in the limits is 2 @olt.herefore, the resol!tion will be "220# @olt. If the 7bit $DC analoginp!t is ?.200@, thecon%erted 7 bits will be ????????. 8hen the inp!t is "?.200@ > 1.???@# \ 1.200@, the bitswill be 1???????. 8hen the analog inp!t is "?.200@ > ?.0?@#, the con%erted bits will be?1??????. '(rom this information, finding a form!la to obtain con%erted bits for a gi%enanalog inp!t \ % @olt is left as an e)ercise for the reader*.

2. $n $DC may be of eight, ten, twel%e or si)teen bits depending !pon the resol!tion needed for

con%ersion.3. he start of the con%ersion signal "SC# signal or inp!t initiates the con%ersion to 7 bits. In a

system, an instr!ction or a timer signals the SC.-. here is an end of con%ersion "/C# signal. In a system, a flag in a register is set to indicate

the end of con%ersion and generate an interr!pt.0. here is a con%ersion time limit in which the con%ersion is definite.. $ Sample and 6old "S6# !nit is !sed to sample the inp!t for a fi)ed time and hold till

con%ersion is o%er.

$n $DC !nit in the embedded system microcontroller may ha%e m!ltichannels. It can then takethe inp!ts in s!ccession from the %ario!s pins interconnected to different analog so!rces.

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A system re2uires an interfacing circuit and software to display t!e status or message for a line for

multi-line displays or flas!ing displays' $n 9CD screen may show !p a m!ltiline display of charac

ters or also show a small graph or icon "called pictogram#. $ recent inno%ation in the mobile phone

system t!rns the screen bl!e to indicate an incoming call. hird generation system phones ha%e bothimage and graphic displays. $n 9CD needs little power. It is powered by a s!pply or battery "a solar

panel in the calc!lator#. 9CD is a diode that absorbs or emits light on application of 3 @ to - @ and 0?

or ? 6B %oltagep!lses with c!rrents less than T0? m$. he p!lses are applied with the same polarity

on crystal front and back plane for no light, or with opposite polarity for light. 6ere polarity at an

instance means logic


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0"> 2> 3 \ M

$ system may need linking to another instr!ment or system. he I/// -77 A+IO "Aeneral +!rpose

Interface O!s# link is a standard b!s originally de%eloped by 6+ '6ewlett +ackard* that links the

meas!ring and instr!mentation systems. he embedded system !sed in the instr!mentation systems

!ses this interfacing standard.

\ M J > KJ J 5 K ,J 7J

he b!ses and !nits in the embedded system hardware need to be linked and interfaced. ne way todo this is to incorporate a glue logic circuit. 'Instead of !sing indi%id!al gates, b!ffers and decoders,

we !se the gl!e logic circ!it.* $ gl!e circ!it is a circ!it that is placed "gl!ed# for all the b!s logicactions between circ!its and between all chips and main chips "processors and memories#. he gl!elogic circ!it of an embedded system may be a circ!it for interconnecting the processor to e)ternalmemo ries so that the appropriate chipselect signals, according to the system memory, map each ofthe memory chips 'Section 2.0*. he gl!e logic circ!it also incl!des a circ!it to interconnect theparallel and serial ports to the peripherals. '4efer to Chapter 3 for more information on ports.* hegl!e circ!it simplifies the o%erall embedded system circ!it greatly. $n e)ample of the !se of the gl!ecirc!it is to connect the processor, memories and the ports interfacing the 9CD display matri) andthe keypad.

+rogramming and config!ring one of the followings gi%es a gl!e circ!it. "i# +$9 "+rogrammable$rray 9ogic#. "ii# A$9 "Aeneric $rray 9ogic#. "iii# +9D "+rogrammable 9ogic De%ice#. "i%# C+9D"Combined +9D#. "%# (+A$. hese de%ices are config!rable and programmable by a system called

deice programmer.+$9 has the $D_4 logic arrays. +$9 implements only the combinational logic circ!it. A$9 isanother array logic, an ad%anced %ersion of +$9, which pro%ides se;!ential circ!it implementation. Itth!s pro%ides the latches, co!nters and register circ!its also. +9D is another logic de%ice that isprogrammable. $ 4 is also a +9D. C+9D is a combination circ!it integrated with a +9D. It is alogic de%ice for implementing mi)ed f!nctions, analog and digital. $ C+9D also helps in the controlf!nctions and designing a +9C "+rogrammable 9ogic Controller#. (+A$ has a macro cell, which is acombination of gates and flipflops. $n array has n!mber of macro cells. he links within the array orin between macro cells are f!sable by a de%ice programmer in these de%ices.

,K , # ,Q -

H

,J 7J 5 #N 1 .IJ HJ

able 1.0 lists the hardware !nits that m!st be present in the embedded systems. Si) e)amples ha%e

been chosen to represent systems of %arying sophistication. hese are:


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Y $!tomatic chocolate %ending machine "Case st!dy for its programming has been gi%en inSection 11.1#,

Y Data ac;!isition System,Y 4obot,Y obile +hone,

Y $dapti%e Cr!ise Control "$CC# system with car string stability "Case st!dy for itsprogramming

has been gi%en in Section 11.3# andY @oice+rocessor and Storage System "inp!t, compression, store, decompression, recording

and replay#.4emember, 4Cs, imers, Idlemode, +owerdown mode, 8atchdog timer and Serial I +ort,

$4 port and gl!elogic circ!it are needed practically in all the applications and ha%e, therefore, notlisted in the able. he %al!es gi%en here refer to a typical system only.

J I

Q >,

6ardware4e;!ired

+rocessor

+rocessor Internal O!s 8idth in Oits

CISC or 4ISC +rocessor $rchitect!re

Caches and

+4 or 4 emory

//+4

> (lash

4 $

Interr!pts6andler

Inp!t_o!tp!t

+orts


27/49

6ardware4e;!ired

ranscei%er

A+IO Interface

4eal time detection of an e%ent or

signal "Capt!re and Compare time on an

+!lse 8idth od!lation for D$C

$nalog to Digital con%ersion "bits#

od!lation

Demod!lation

Digital Signal +rocessing Instr!ctions

on linear controller Instr!ctions

N 4efer to case st!dy in Section 11.1. J 4efer to case st!dy 11.2. String stability means maintaining a consX /)cessi%e need of 4$ is d!e to b!ffer memory 4$ for %oice inp!ts being processed.>

/)cessi%e need of 4$ is d!e to b!ffer memory 4$ for %oice inp!ts and o!tp!ts being processedNO!ffermemory for the speech signals

> (or storing the %oice

^

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H


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T!e software is the most important aspect, the brain of the embedded system.

JI J > .I J I K 7J K J"$n embedded system processor and the system need software that is specific to a gi%en application ofthat system. he processor of the system processes the instr!ction codes and data. In the final stage,these are placed in the memory "4# for all the tasks that ha%e to be e)ec!ted. he final stagesoftware is also called 4 image. 8hyF W!st as an image is a !ni;!e se;!ence and arrangement ofpi)els, embedded software is also a !ni;!e placement and arrangement of bytes for instr!ctions anddata.

/ach code or dat!m is a%ailable only in bits and byte"s# format. he system re;!ires bytes at each4address, according to the tasks being e)ec!ted. $ machine implement-able software file istherefore li.e a table of address and bytes at each address of the system memory" he table has to bereadied as a 4 image for the targeted hardware. (ig!re 1.0 shows the 4 image in a systemmemory. he image consists of the boot !p program, stack "s# address pointer"s#, program co!nteraddress pointer"s#, application tasks, IS4s "Section -.12#, 4S, inp!t data, and %ector addresses.

'4efer to Section 2.0 for the details.*

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D!ring coding in this format, the programmer defines the addresses and the corresponding bytes or

bits at each address. In config!ring some specific physical de%ice or s!bsystem, machine codebased

coding is !sed. (or e)ample, in a transcei%er, placing certain machine code and bits can config!re it to

transmit at specific bps or Abps, !sing a specific b!s protocol and networking protocol. $nother

e)ample is !sing certain codes for config!ring a control register with the processor. D!ring a specific

codesection processing, the register can be config!red to enable or disable !se of its internal cache.

6owe%er, coding in mac!ine implement-able codes is done only in specific sit!ations: it is time

consuming because t!e programmer must first understand the processor instr!ctions set and thenmemoriBe the instr!ctions and their machine codes.

K 7J " . K I \J J

8hen a programmer !nderstands the processor and its instr!ction set thoro!ghly, a program or asmall specific part can be coded in the assembly language. $n e)emplary assembly lang!ageprogram in $4 processor instr!ction set will be shown in /)ample gi%en in Section $.2.

Coding in assembly lang!age is easy to learn for a designer who has gone thro!gh amicroprocessor or microcontroller co!rse. Coding is e)tremely !sef!l for config!ring physicalde%ices like ports, a linedisplay interface, $DC and D$C and reading into or transmitting from ab!ffer. hese codes can also be de%ice dri%er codes. 'Section -.1*. hey are !sef!l to r!n theprocessor or de%ice specific feat!res and pro%ide an optimal coding sol!tion. 0ac. of .nowledge ofwriting de3ice dri3er codes or codes that utilize the processor-specific features-in3o.ing codes in anembedded system design team can cost a lot" /endors may not only charge for the $PI but also chargeintellectual property fees for each system shipped out of the company .

o do all the coding in assembly language may, howe%er, be %ery time cons!ming. (!ll coding inassembly may be done only for a few simple, smallscale systems, s!ch as toys, a!tomatic chocolate%ending machine, robot or data ac;!isition system.

(ig!re 1. shows the process of con%erting an assembly language program into the machine implementable software file and then finally obtaining a 4 image file.

1. $n assembler translates the assembly software into the machine codes !sing a step calledassembling.

2. In the ne)t step, called lin.ing& a linker links these codes with the other re;!ired assembledcodes. 9inking is necessary beca!se of the n!mber of codes to be linked for the final binary file. (ore)ample, there are the standard codes to program a delay task for which there is a reference in theassembly lang!age program. he codes for the delay m!st link with the assembled codes. he delay

code is se;!ential from a certain beginning address. he assembly software code is also se;!ential froma certain beginning address. Ooth the codes ha%e to at the distinct addresses as well as a%ailableaddresses in the system. 9inker links these. he linked file in binary for run


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on a comp!ter is commonly known as e)ec!table file or simply


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$n inno3ati3e concept is use of 3irtual de3ices during programming" $ 3irt!al de%ice e)ample is a

file "for reading and writing the stream of bytes or words# or apipe "for b!ffering a stream of bytes#.

he term %irt!al de%ice follows from the analogy that R!st as a keyboard gi%es an inp!t to the

processor on a read, a file also gi%es an inp!t to the processor. he processor gi%es an o!tp!t to a

printer on a write. Similarly, the processor writes an o!tp!t to the file. ost often, an embeddedsystem is de signed to perform m!ltiple f!nctions and has to control m!ltiple physical and %irt!al

de%ices.

$ de$ice for the p!rpose of control, handling, reading and writing actions can be taken as consist

ing of three components. "i# Control 4egister or 8ord _ It stores the bits that, on setting or resetting

by a de%ice dri%er, control the de%ice actions. "ii# Stat!s 4egister or 8ord _ It pro%ides the flags "bits#

to show the de%ice stat!s. "iii# De%ice echanism that controls the de%ice actions. here may be inp!t

data b!ffers and o!tp!t data b!ffers at a de%ice. De%ice action may be to get inp!t into or send o!tp!t

from the b!ffer. "The control registers& input data buffers& output data buffers and status registers

form part of the de3ice hardware"#

$ de$ice dri$er is software for controlling, recei%ing and sending a byte or a stream of bytes from

or to a de%ice. In case of physical de%ices, a dri%er !ses the hardware stat!s flags and control register

bits that are in set and reset states. In case of %irt!al de%ices also, a dri%er !ses the stat!s and control

words and the bits that e)ist in set and reset states.

ri3er controls three f!nctions "i# InitialiBing that is acti%ated by placing appropriate bits at the

control register or word. "ii# Calling an IS4 on interr!pt or on setting a stat!s flag in the stat!s register

and r!n "dri%e# the IS4 "also called Interr!pt 6andler 4o!tine#. "iii# 4esetting the stat!s flag after

interr!pt ser%ice. $ dri%er may be designed for asynchrono!s operations "m!ltiple times !se by tasks

one after another# or synchrono!s operations "conc!rrent !se by the tasks#. his is beca!se a de%ice

may get acti%ated when an interr!pt arises and the de%ice dri%er ro!tine ser%ices that.

sing perating System "S# f!nctions, a de%ice dri%er coding can be made s!ch that the !nderly

ing hardware is hidden as m!ch as possible. $n $+I then defines the hardware separately. his makes

the dri%er !sable when the de%ice hardware changes in a system.

$ de%ice dri%er accesses a parallel port or serial port, keyboard, mo!se, disk, network, display, file,pipe and socket at specific addresses. $n S may also pro%ide e3ice dri3er codes for the system

port addresses and for the access mechanism "read, sa%e, write# for the de%ice hardware.

e3ice #anagement software mod!les pro%ide codes for detecting the presence of de%ices, for

initialiBing these and for testing the de%ices that are present. he mod!les may also incl!de software

for allocating and registering port "in fact, it may be a register or memory# addresses for the %ario!s

de%ices at distinctly different addresses, incl!ding codes for detecting any collision between these, if

any. It ens!res that any de%ice accesses to one task at any gi%en instant. It takes into acco!nt that

%irt!al de%ices may ha%e addresses that can be relocated by a locator "for +4#. 'he act!al physi

cal or hardware de%ices ha%e predefined fi)ed addresses "the addresses are not relocated by the

locator#*.

$n S also pro%ides and e)ec!tes mod!les for managing de%ices that associate with an embedded

system. he !nderlying principle is that at an instant, only one physical de%ice sho!ld get access to or

from one task only. he S also pro%ides and manages the %irt!al de%ices like pipes and sockets

'Section 7.3*.


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ost often, an embedded system is designed to perform sched!ling of m!ltiple f!nctions while con

trolling m!ltiple de%ices. $n embedded system program is therefore designed as a m!ltitasking

system program. '4efer to Section 7.1 for definitions of the tas.s "f!nctions# and tas.-states.*

In a m!ltitasking S, each process (tas.4 has a distinct memory allocation of its own and a tas.

has one or more functions or procedures for a specific 9ob" $ tas. may share the memory (data4 with

other tas.s" $ processor may process multiple tas.s separately or concurrently. he S software

incl!des sched!ling feat!res for the processes "tasks, IS4s and De%ice Dri%ers# $n S or 8TS has a.ernel. '4efer to Section .2 for !nderstanding kernel f!nctions in detail.* The .ernelFs important

function is to schedule the transition of a tas. from a ready state to a running state" It also sched!les

the transition of a task from a blocked state to the r!nning state. he kernel may block a task to let a

higher priority task be in r!nning state. 'It is called preempti%e sched!ling*. he .ernel coordinates

the !se of the processor for the m!ltiple tasks that are in ready state at any instant, s!ch that only one

task among many is in the r!nning state. his is so beca!se there is only one processor in the system.

he kernel sched!les and dispatches a task to a different state than the present. '(or m!ltiprocessor

systems, sched!ling and synchroniBation of %ario!s processors are also necessary*. he kernel

controls the inter process "task# messaging and sharing of %ariables, ;!e!es and pipes.

4S f!nctions can th!s be highly comple). Chapters to 11 will describe the 4S f!nctions in

an embedded system. In an embedded system, 4S has to be scalable. Scaleable S is one in which

memory is optimiBed by ha%ing only that part of feat!res that are needed associate with the finalsystem software.

here are a n!mber of pop!lar and readily a%ailable 4Ss. Chapters and 1? will describe these.

Case st!dies employing these 4Ss will be taken !p in Chapter 11.

^

N H S H -

K K N.IH

S K 7J I K J

able 1. lists the applications of software tools for assembly lang!age programming, high le%ellang!age programming, 4S, deb!gging and system integration tools.


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J I

S S N N

Software ool $pplication

/ditor (or writing C codes or assembly mnemonics !sing the keyboard of the +C for enteringthe program. $llows the entry, addition, deletion, insert, appending pre%io!sly written

lines or files, merging record and files at the specific positions. Creates a so!rce filethat stores the edited file. It also has an appropriate name 'pro%ided by theprogrammer*.

Interpreter (or e)pressionbye)pression "linebyline# translation to the machine e)ec!table

codes. Compiler ses the complete sets of the codes. It may also incl!de the codes, f!nctions and

e)pressions from the library ro!tines. It creates a file called obRect file.

$ssembler (or translating the assembly mnemonics into binary opcodes "instr!ctions#, i.e., into an

e)ec!table file called a binary file. It also creates a list file that can be printed. he listfile has address, so!rce code "assembly lang!age mnemonic# and he)adecimal obRect

codes. he file has addresses that adR!st d!ring the act!al r!n of the assembly lang!ageprogram.

Cross $ssembler (or con%erting obRect codes or e)ec!table codes for a processor to other codes foranother processor and %ice %ersa. he crossassembler assembles the assembly codes oftarget processor as the assembly codes of the processor of the +C !sed in the systemde%elopment. 9ater, it pro%ides the obRect codes for the target processor. hese codes

will be the ones act!ally needed in the finally de%eloped system.

Sim!lator o sim!late all f!nctions of an embedded system circ!it incl!ding additional memory

and peripherals. It is independent of a partic!lar target system. It also sim!lates theprocesses that will e)ec!te when the codes e)ec!te on the targeted partic!lar processor.

So!rcecode (or so!rce code comprehension, na%igation and browsing, editing, deb!gging,config!ring

/ngineering Software "disabling and enabling the C>> feat!res# and

compiling. 4S 4efer Chapters and 1?.

Stethoscope (or dynamically tracking the changes in any program %ariable. It tracks the changes inany

parameter. It demonstrates the se;!ences of m!ltiple processes "tasks, threads, ser%icero!tines# that e)ec!te. It also records the entire time history.

race Scope o help in tracing the changes in the mod!les and tasks with time on the Za)is. $ listof actions also prod!ces the desired time scales and the e)pected times for differenttasks.

Integrated Software and hardware en%ironment that consists of sim!lators with editors, compilers,De%elopment assemblers, 4S, deb!ggers, stethoscope, tracer, em!lators, logic analyBers, /+4/n%ironment //+4 application codes= b!rners for the integrated de%elopment of a system.

+rototyperT (or sim!lating, so!rce code engineering incl!ding compiling,deb!gging and, on a Orowser, s!mmariBing the complete stat!s ofthe final target system d!ring the de%elopment phase.

9ocatorJ ses crossassembler o!tp!t and a memory allocation map andpro%ides the locator program o!tp!t. It is the final step ofsoftware design process for the embedded system.

J (or locator refer to Section 2.0. 9ocator program o!tp!t is in the Intel he) file orotorola S record format.T $n /)ample is ornado +rototyper from 8ind4i%erVfor integrated crossde%elopment en%ironment with a set of tools.


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. H - K

H N.IK K K

KN H Q H

H X Q^ X

H

K 7J I : 1 .IJ HJ

able 1.5 gi%es the %ario!s tools needed to design e)emplary systems.

J I S

> ,

Software

ools

$!to

ach

/ditor Interpreter Compiler $ssembler

Cross $ssembler

9ocatorJ Sim!lator So!rcecode /ngineering Software4S Stethoscope race Scope Integrated De%elopment /n%ironment

+rototyperT

]es ]e

4

4

T $n /)ample is ornado prototyper 8ind4i%er for integrated crossde%elopment

en%ironment with a set of tools. ote: 4 means not re;!ired. 4 means may be

re;!ired in specific comple) system b!t not comp!lsorily needed. (or locator, refer to

Section 2.0.

N.I K K

N H ^H


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D I K K 7J

In comple) or m!ltiprocessor systems, there are different models that are employed d!ring the designprocesses of the embedded software and its 4S. he models are as following. "i# (inite Stateachine "(S#. "ii# +etrinet model. "iii# Control and Data flow graph. "i%# $cti%ity diagrams based

9 odel. (or m!ltiprocessor systems, the following additional models are needed. "i# Synchrono!s Data (low "SD(# Araph. "ii# imed +etri ets and /)tended +redicateransition et. "iii# !ltihread Araph "A# System. hese models are e)plained in Chapter .

X "\ #

1 .IJ ..I J K J . K

/mbedded systems ha%e %ery di%ersified applications. $ few select application areas of embeddedsystems are elecom, Smart Cards, issiles and Satellites, Comp!ter etworking, Digital Cons!mer/lectronics, and $!tomoti%e. (ig!re 1. shows the applications of embedded systems in these areas.

H J


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Y $ personal information manager !sing frame b!ffers in handheld de%ices

Y hin Client '$ hin Client pro%ides diskless nodes with remote boot capability*. $pplication

of thinclients accesses to a data center from a n!mber of nodes& in an Internet 9aboratory

accesses to the Internet leased line thro!gh a remote Ser%er.

Y /mbedded (irewall 4o!ter !sing $45 i37 m!ltiprocessor and 32 O of (lash 4.he load balancing and two /thernet interfaces are its other important f!nctions. hese

interfaces s!pport +++, C+I+ and D+ protocols.

Y D$ Se;!ence and pattern storage card and D$ pattern recogniBer

/)amples ofsophisticated embedded systems are as follows:

Y /mbedded systems for wireless 9$ and for con%ergent technology de%ices

Y /mbedded systems for real time %ideo and speech or m!ltimedia processing systems

Y /mbedded Interface and etworking systems !sing high speed "-?? 6B pl!s#, !ltra high

speed "1? Abps# and large bandwidth: 4o!ters, 9$s, switches and gateways, S$s "Storage

$rea etworks#, 8$s "8ide $rea etworks#, @ideo, Interacti%e %ideo and broadband I+%

"Internet +rotocol %ersion # Internet and other prod!cts

Y Sec!rity prod!cts and 6ighspeed etwork sec!rity. Aigabit rate encryption rate prod!cts

Y /mbedded sophisticated system for space lifeboat "$S$=s Z37 proRect# !nder de%elopment.It is for a resc!e lifeboat that will be !sed in the f!t!re with the ISS "International Space

Station#. In an emergency, it will bring the astrona!ts and crewmembers back to the /arth from

the ISS. 8ith a press of a b!tton this lifeboat will detach from ISS and tra%el back to /arth

resisting all the climaticatmospheric conditions and meeting e)act timing constraints. his

will also be a fa!lt tolerant system.

-Q -H,>" 2QH3 > :\> H>#H5>

9ately, embedded systems are being designed on a single silicon chip, called System on chip (SoC4"

SoC is a new design inno3ation for embedded systems. $n embedded processor is a part of the SoC

@9SI circ!it. $ SoC may be embedded with the following components: m!ltiple processors, memo

ries, m!ltiple standard so!rce sol!tions, called I+ "Intellect!al +roperty# cores and other logic andanalog !nits. $ SoC may also ha%e a network protocol embedded into it. It may also embed an

encryption f!nction !nit. It can embed discrete cosine transforms for signal processing applications. It

may embed (+A$ "(ield +rogrammable Aate $rray# cores 'Section 1..0*.(or a n!mber of applications, the A++ "microcontrollers, microprocessors or DS+s# cores may not

s!ffice. (or sec!rity applications, killer applications, smart card, %ideo game, palm top comp!ter, cellphone, mobileInternet, handheld embedded systems, Abps transcei%ers, Aigabits per second 9$systems and satellite or missile systems, we need special processing !nits in a @9SI designed circ!it tof!nction as a processor. hese special !nits are called $pplication Specific Instr!ction +rocessors"$SI+#. (or an application, both the config!rable processors "called (+A$ c!m $SI+ processors# andnonconfig!rable processors "DS+ or icroprocessor or icrocontrollers# might be needed on a chip.ne e)ample of a killer application !sing m!ltiple $SI+s is highdefinition tele%ision signalsprocessing. '6igh definition means that the signals are processed for a noisefree, echocanceledtransmission, and for obtaining a flat highresol!tion image "12? ) 1?2? pi)els# on the tele%isionscreen.* $ cellphone is another killer application. '$ killer application is one that is !sef!l to millions of!sers.*


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?

4ecently, embedded SoCs ha%e been designed for f!nctioning as G$ chips. Consider an (+A$with a large n!mber of gate arrays. ow, !sing @9SI design techni;!es, we can config!re thesearrays to process the specific tasks on an SoC. his gi%es an SoC as a D$ chip. /ach set of arrayshas a specific and distinct D$ comple) str!ct!re. hese str!ct!res as well as the processor embedson the D$ chip.

1 .IJ H K HII-":

(ig!re 1.1? shows an SoC that integrates two internal $SICs, two internal processors "$SI+s#, sharedmemories and peripheral interfaces on a common b!s. Oesides a processor and memories and digitalcirc!its with embedded software for specific application "s#, the SoC may possess analog circ!its aswell*. $n e)emplary application of s!ch an $SIC embedded SoC is the cellphone. ne $SI+ in it isconfig!red to process encoding and deciphering and another does the %oice compression. ne $SICdials, mod!lates, demod!lates, interfaces the keyboard and m!ltiple line 9CD matri) displays, storesdata inp!t and recalls data from memory. $SICs are designed !sing the @9SI design tools with processor A++ or $SI+ and analog circ!its embedded into the design. he designing is done !sing the/lectronic Design $!tomation "/D$# tool. '(or design of $SIC digital circ!its, a


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>"

sing @9SI tools, a processor itself can be designed. $ system specific processor "$SI+# is the one

that does not !se the A++ "standard a%ailable CISC or 4ISC microprocessor or microcontroller or

signal processor#. he processor on chip incorporates a section of the CISC or 4ISC instr!ction set.

his specific processor may ha%e especially config!rable instr!ctionset for an application. $n $SI+can also be config!rable. sing appropriate tools, an $SI+ can be designed and config!red for the

instr!ctions needed in the following e)emplary f!nctions: DS+ f!nctions, controller signals

processing f!nction, adapti%e filtering f!nctions and comm!nication protocol_implementing

f!nctions. n a @9SI chip, an embedded $SI+ in a special system can be a !nit within an $SIC or

SoC.

>" H

n a @9SI chip, there may be highle%el components. hese are components that possess gatele%el

sophistication in circ!its abo%e that of the co!nter, register, m!ltiplier, floating point operation !nit

and $9. $ standard so!rce sol!tion for synthesiBing a higherle%el component by config!ring (+A$

core or a core of @9SI chip may be a%ailable as an Intellect!al +roperty, called "I+#. he copyright forthe synthesiBed design of a higherle%el component for gatele%el implementation of an I+ is held by

the designer or designing company. ne has to pay royalty for e%ery chip shipped. $n embedded

system may incorporate an I+"s# .

Y $n I+ may pro%ide hardwired implementable design of a transform or of an encryption

algorithm or a deciphering algorithm.

Y $n I+ may pro%ide a design for adapti3e filtering of a signal.

Y $n I+ may pro%ide f!ll design for implementing 6yper e)t ransfer +rotocol "6+# or (ile

ransfer +rotocol "(+# to transmit a web page or a file on the Internet.

Y $n I+ may be designed for the +CI or SO b!s controller. 'Sections 3.3 and 3.-*

J 0""

$ Aeneral +!rpose +rocessor "A++# can be embedded on a @S9I chip. 4ecently, e)emplary A++s,called $4 5 and $4 , which embed onto a @9SI chip, ha%e been de%eloped by $4 and their

enhancements by e)as Instr!ments. '4efer to http:www.ti.comsc docsasicmod!lesarm5.htm

and arm.htm*. $n $4processor @9SIarchitect!re is a%ailable either as a C+ chip or for

integrat ing it into @9SI or SoC. 'he instr!ction set feat!res of the $4 is gi%en in Section $.1.*

$4 pro%ides CISC f!nctionality with 4ISC architect!re at the core. $n application of $4 embed

circ!it is IC/ 'Section 12.3.2*. IC/ is !sed for deb!gging an embedded system. /)emplary $4

applica tions are set!p bo)es, cable modems, and wireless de%ices s!ch as mobile handsets.$4 'Section 2.2.0* has a single cycle 1 ) 32 m!ltiply acc!m!late !nit. It operates at 2?? 6B.

It !ses ?.10 mm AS3? CSs. It has a fi%estage pipeline. It incorporates 4ISC. It integrates with aDS+ when designing an $SIC sol!tion ha%ing m!ltiprocessors= architect!re 'Section .3*. $n e)am pleis its integration with DS+ with S32?C00). $ lower capability b!t %ery pop!lar %ersion of $4 is

$45. It operates at 7? 6B clock. It !ses ?.17 mmbased AS2? CSs. sing $45, a large n!mberof embedded systems ha%e recently become a%ailable. ne recent application is in inte grating theoperating system 9in!) Pernel 2.2 and the de%ice dri%ers into an $SIC.


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"0 2 I " J JI 0J J $ H 7 : J II .I "

$ new inno%ation is (ield +rogrammable Aate $rrays "(+A$# core with a single or m!ltiple

processor !nits on chip. ne e)ample is Zilin) @irte)II +ro (+A$ ZC2@+120. ther e)ample is ?

nm Spartan3 (+A$ released on $pril 1-, 2??3 by Zilin). '$n (+A$ consists of a large n!mber of programmable

gates on a @9SI chip. here is a set of gates in each (+A$ cell, called


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Y he embedded system needs a power so!rce and controlled and optimiBed powerdissipation

from the total energy re;!irement for gi%en hardware and software. he charge p!mp pro%ides

a powers!pplyless system in certain embedded systems.

Y he embedded system needs clock and reset circ!its. se of the clock manager is a recent

inno%ation.Y he embedded system needs interfaces: Inp!t !tp!t "I# ports, serial 1$8T and other pots to

accept inp!ts and to send o!tp!ts by interacting with the peripherals, display !nits, keypad or

keyboard.

Y he embedded system may need b!s controllers for networking its b!ses with other systems.

Y he embedded system needs timers and a watchdog timer for the system clock and for real

time program sched!ling and control.

Y he embedded system needs an interrupt controlling unit"

Y he embedded system may need $DC for taking analog inp!t from one or m!ltiple so!rces. It

needs D$C !sing +8 for sending analog o!tp!t to motors, speakers, so!nd systems, etc.

Y he embedded system may need an 9/D or 9CD display !nits, keypad and keyboard, p!lse

dialer, modem, transmitter, m!ltiple)ers and dem!ltiple)ers.

Y /mbedded software is !s!ally made in the highle%el lang!ages C or C>> or Wa%a with certainfeat!res added, enabled or disabled for programming. > also facilitates the

incorporation of assembly lang!age codes.

Y he embedded system most often needs a realtime operating system for realtime

programming and sched!ling, de%ice dri%ers, de%ice management and m!ltitasking.

Y here are a n!mber of software tools needed in the de%elopment and design phase of an

embedded system. '4efer to able 1.5.*

Y here are a large n!mber of applications and prod!cts that employ embedded systems.

Y $ @9SI chip can embed I+s for the specific applications, besides the $SI+ or a A++ core.

$ systemonchip is the latest concept in embedded systems, for e)ample, a mobile phone.

$ contactless smart card is one s!ch application, the detail !nits of which were shown in

(ig!re 1.11.

\> Q ` 1Q# , ># >> >Q

Y System: $ way of working, organiBing or doing some task or series of tasks by following the

fi)ed plan, program and set of r!les

Y Embedded system: $ sophisticated system that has a comp!ter "hardware with application

software and 4S embedded in it# as one of its components. $n embedded system is a

dedicated comp!terbased system for an application or prod!ct.

Y Processor: $ processor implements a process or processes as per the command "instr!ction#

gi%en to it.

Y Process: $ program or task or thread that has a distinct memory allocation of its own and has

one or more functions or procedures for specific 9ob" The process may share the memory

(data4 with other tas.s" $ processor may run multiple processes separately or concurrently"

Y #icrocontroller: $ !nit with a processor. emory, timers, watchdog timer, interr!pt

controller, $DC or +8, etc. are pro%ided as re;!ired by the application.


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Y ;PP (;eneral-purpose processor4: $ processor from a n!mber of families of processors,

microcontrollers, embedded processors and digital signal processors "DS+s# ha%ing a general

p!rpose instr!ction set and readily a%ailable compilers to enable programming in a high le%el

lang!age.

Y $SSP ($pplication Specific System Processor4: $ processing !nit for specific tasks, fore)ample, image compression, and that is integrated thro!gh the b!ses with the main processor

in the embedded system.

Y $SIP ($pplication specific Instruction processor4: $ processor designed for specific

application on a @9SI chip.

Y P;$: hese are (ield +rogrammable Aate $rrays on a chip. he chip has a large n!mber of

arrays with each element ha%ing f!sable links. /ach element of array consists of se%eral Z4,

$D, 4, m!ltiple)er, dem!ltiple)er and tristate gates. Oy appropriate programming of the

f!sable links, a design of a comple) digital circ!it is created on the chip.

Y 8egisters: hese are associated with the processor and temporarily store the %ariable %al!es

from the memory and from the e)ec!tion !nit d!ring processing of an instr!ction "s#.

Y Cloc.: (i)ed fre;!ency p!lses that an oscillator circ!it generates and that controls all

operations d!ring processing and all timing references of the system. (re;!ency depends onthe needs of the processor circ!it.$ processor, if it needs 1?? 6B clock then its minim!m

instr!ction processing time is a reciprocal of it, which is 1? ns.

Y 8eset: $ processor state in which the processor registers ac;!ire initial %al!es and from which

starts an initial program& this program is !s!ally the one that also r!ns on power !p.

Y 8eset circuit: $ circ!it to force reset state and that gets acti%ated for a short period on power

!p. 8hen reset is acti%ated, the processor generates a reset signal for the other system !nits

needing reset.

Y #emory: his stores all the programs, inp!t data and o!tp!t data. he processor fetches

instr!ctions from it to e)ec!te and gi%es the processed res!lts back to it as per the instr!ction.

Y 8#: $ read only memory that locates the following in its 4 embedded software, initial

data and strings and operating system or 4S.

Y 8$#: his is a 4andom $ccess 4ead and 8rite memory that the processor !ses to storeprograms and data that are %olatile and which disappear on power down or off.

Y Cache: $ fast read and write onchip !nit for the processor e)ec!tion !nit. It stores a copy of

a page of instr!ctions and data. It has these fetched in ad%ance from the 4 and 4$ so

that the processor does not ha%e to wait for instr!ction and data from e)ternal b!ses.

Y Timer: $ !nit to pro%ide the time for the system clock and realtime operations and sched!ling.

Y 7atchdog timer: $ timer the timeo!t from which resets the processor in case the program gets

st!ck for an !ne)pected time.

Y Interrupt controller: $ !nit that controls the processor operations arising o!t of an interr!pt

from a so!rce.

Y $C: $ !nit that con%erts, as re;!ired, the analog inp!t between > and _ pins with respect to

the reference %oltage "s# to digital 7 or 1? or 12 bits.

Y P7#: +!lse width mod!lator to pro%ide a p!lse of width scaled to the analog o!tp!t desired.n integrating +8 o!tp!t, the D$C operation is achie%ed.

Y $C: Digital bits "7 or 1? or 12# con%erted to analog signal scaled to a reference %oltage "s#.


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Y Input utput (I4 ports: he system gets the inp!ts and o!tp!ts from these. hro!gh these, the

keypad or 9CD !nits attach to the system.

Y 1$8T: ni%ersal $synchrono!s 4ecei%er and ransmitter.

Y 0E: 9ight /mitting diodeLa diode that emits red, green, yellow or infrared light on forward

biasing between 1.@ to 2 @ and c!rrents between 7 10m$. !ltisegment and m!ltiline9/D !nits are !sed for bright display of digits, characters, charts and short messages.

Y 0C: 9i;!id Crystal diodeLa diode that absorbs or emits light on application of 3 to - @ 0? or

? 6B %oltage p!lses with c!rrents T 0? m$. !ltisegment and m!ltiline 9CD !nits are !sed

for a display of digits, characters, charts and short messages with %ery low power dissipation.

Y #odem: $ circ!it to mod!late the o!tgoing bits into p!lses !s!ally !sed on the telephone line

and to demod!late the incoming p!lses into bits for incoming messages.

Y #ultiple%er: $ digital circ!it that has digital inp!ts from m!ltiple channels. It sends only one

channel o!tp!t at a time. he channel at the o!tp!t has the same address as the channel address

bits in its inp!t.

Y emultiple%er: $ digital circ!it that has digital o!tp!ts at any instance in m!ltiple channels.

he channel that is connected is the one that has the same address as the channel address bits

in its inp!t.Y Compiler: $ program that, according to the processor specification, generates machine codes

from the high le%el lang!age. he codes are called obRect codes.

Y $ssembler: $ program that translates assembly lang!age software into the machine codes

placed in a file called


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Y e3ice ri3er: Interr!pt Ser%ice ro!tine Software, which r!ns after the programming of the

control register "or word# of a peripheral de%ice "or %irt!al de%ice# and to let the de%ice get the

inp!ts or o!tp!ts. It e)ec!tes on an interr!pt to or from the de%ice.

Y e3ice manager: Software to manage m!ltiple de%ices and dri%ers.

Y #ultitas.ing: +rocessing codes for the different tasks as directed by the sched!ler.Y :ernel: $ program with f!nctions for memory allocation and deallocation, task sched!ling,

interprocess comm!nication, effecti%e management of shared memory access by !sing the

signals, e)ception "error# handling signals, semaphores, ;!e!es, mailbo)es, pipes and sockets

'See Section 7.3*, I management, interr!pts control "6andler#, de%ice dri%ers and de%ice

management.Y 8eal-time operating system: perating System software for realtime programming and

sched!ling, process and memory manager, de%ice dri%ers, de%ice management and

m!ltitasking.

Y /0SI chip: $ %ery largescale integrated circ!it made on silicon with T 1 transistors.

Y System on Chip: $ system on a @9SI chip that has all of needed analog as wells as digital

circ!its, for e)ample, in a mobile phone.

#:> C5 >Q

1. Define a system. ow define embedded system.

2. 8hat are the essential str!ct!ral !nits in "a# microprocessor "b# /mbedded processor "c#

icrocontroller "d# DS+ "e# $SI+ "f# $SI+F 9ist each of these.

3. 6ow does a DS+ differ from a generalp!rpose processor "A++#F 4efer Sections 1.2.0 and

D.2.

-. 8hat are the ad%antages and disad%antages of "a# a processor with only fi)edpoint arithmetic

!nit and "b# a processor with additional floatingpoint arithmetic processing !nitF

0. $ new inno%ation is media processors 'Section /.1.* 4efer Sections 1.2.0, D.2 and /.1. 6ow

does a media processor differ from a DS+F

. /)plain the media processor !se in con%ergence technology embedded system like mobile

phone with mail client, Internet connecti%ity and imageframe downloads.5. Compare feat!res in an e)emplary family chip "or core# of each of the following:

icroprocessor, icrocontroller, 4ISC +rocessor, Digital Signal +rocessor, $SS+, @ideo

processor and media processor. 4efer Section 1.2 and $ppendices $ to /.

7. 8hy does late generation systems operate processor at low %oltages "^2 @# and I at "T3.3@#F

. 8hat are the techni;!es of power and energy management in a systemF

1?. 8hat is the ad%antage of r!nning a processor at red!ced clock speed in certain section of

instr!ctions and at f!ll speed in other section of instr!ctionsF

11. 8hat is the ad%antage of the followingsF "a# Stop instr!ction "b# 8ait instr!ction "c# +rocessor

idle mode operation "d# Cache!se disable instr!ction "e# Cache with m!ltiways and blocks in

an embedded system.

12. 8hat do we mean by charge p!mpF 6ow does a charge p!mp s!pply power in an embedded

system witho!t !sing the power s!pply linesF13. 8hat do yo! mean by


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-?. 8hy does a CS I circ!it power dissipation red!ces by compared to 0@, factor of half,T"3.30#

2

, in I 3.3@ operationF-1. 6ow m!ch shall be red!ction in power dissipation for a processor CS circ!it when @

red!ces from 0@ to 1.7@ operationF

-2. 4efer Sections 1.3.0 and A.1 to A.3. 9ist %ario!s type of memories and application of each inthe followings: 4obot, /lectronic smart weight display system, /CA 9CD displayc!m

recorder, 4o!ter, Digital Camera, Speech +rocessing, Smart Card, /mbedded (irewall 4o!ter,

ail Client card, and ransrecei%er system with a collision control and Rabber control

'Collision control means transmission and reception when no other system on the network is

!sing the network. Wabber control means control of contin!o!s streams of random data

flowing on a network, which e%ent!ally chokes a network.*-3. ab!late hardware !nits needed in each of the system mentioned in [!estion -2 abo%e.

--. Ai%e two e)amples of embedded systems, which need one or more of following !nits. "a# D$C

"sing a +8# "b# $DC "c# 9CD display "d# 9/D Displays "e# Peypad "f# +!lse Dialer "g#

odem "h# ranscei%er "i# A+IO "I/// -77# 9ink

-0. $n $DC is a 1?bit $DCF It has reference %oltages, @ref

\ ?.?@ and @ref>

\ 1.?23@.

8hat will be the $DC o!tp!ts when inp!ts are "a# _ ?.012 @ "b# > ?.012 @ and "c#>2?-5@F 8hat shall be $DC o!tp!ts in three sit!ations when "i# @

ref\ ?.012 @

and @ref>

\ 1.?23@ "ii# @ref

\ 1.?2-@ and @

ref>

\ 2.?-5@ and "ii# @ref

\ 1.?2- @ and @ref>

\ >2.?-5@.

-. 4efer Sections 1.-, 0.1, 0.7 and 0.. ab!late the ad%antages and disad%antages of !sing codinglang!age as following: "a# (inal achine Implementable "b# $9+ "$ssembly 9ang!age

+rogramming "c#

(240766019) Introduction to Embeded Systems

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