2014 ADS DDR4 Compliance Test Bench HSD Seminar Rev1

ADS DDR Test Benches with Waveform Bridge to Instrument Certified DDR Test Compliance

Jian Yang R&D Engineer Nilesh Kamdar Applications Engineer

Sept 16, 2014

New Keysight EEsof EDA Simulation Tools for

Signal Integrity, Power Integrity, and EMI/EMC

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Introduction to DDR4

DDR4 Simulation -> Compliance Test Flow

DDR4 Compliance Test Bench Demo

Summary

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er

Integrity, and EMI/EMC

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Agenda

Page Keysight EEsof EDA Simulation



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Introduction: DDR4 memory ramping up in electronic systems

Page Keysight EEsof EDA Simulation



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DDR4 Memory in the News

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DDR4 High Speed => Less Timing Margin




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Shrinking Eye due to Package, PCB and Connectors




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ADS 2014 DDR4 Simulation=>Compliance Test User Story




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Copyright 2014 Agilent Technologies,

Inc. 7

1. As a DDR controller designer at an IC company, I need to swap out the

simulated testbenchs generic controller model with my controller I/O model

2. As a PCB/package/DIMM designer at an OEM or IC company, I need to

swap out parts of the simulated testbenchs generic channel cascade with the post-layout EM-based model of my package (or PCB or DIMM)

3. As a DRAM I/O designer at an IC company, I need to swap out the

simulated testbenchs generic DRAM model with my DRAM I/O model.

(for all three)then I want to run a sign-off compliance test on the simulated test bench waveforms before committing to fabrication. I want to run the exact

same tests on the simulated testbench that I will run on my scope in the test lab when get my prototypes back from fab.

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ADS 2014 DDR4 Simulation=>Compliance Test Flow




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Inc. 8

Simulated test bench in ADS

Real test bench Infiniium

oscilloscope

ADS Waveform Bridge: Script that writes file format

that scope compliance app

understands

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ADS DDR4 Simulation Setup




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Inc. 9

Simulation Setup for Data and Strobe Signals in WRITE Cycle

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Driver and Receiver IBIS models




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Inc. 10

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Channel Model




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Inc. 11

Use multilayer transmission line models and S-

parameters to build the

channel model

Can import a PCB layout to build an EM model using

Momentum or FEM

Can import S-parameters from other EM tools or

VNA/TDR measurements

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Pattern Generator




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Inc. 12

Use PRBS sources to generate random DQ pattern

and repetitive DQS pattern

Use pulse sources as input to IBIS Enable Pin to

generate DQ and DQS

bursts

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ADS Transient Simulation Controller and Netlist Include




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Inc. 13

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Save ADS waveforms to .h5 files for analysis in Infiniium Offline




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Inc. 14

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DDR4 Compliance Test




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Inc. 15

What are we testing?

Clock Tests

Electrical

Timing

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DDR4 Electrical and Timing Tests




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Inc. 16

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Load ADS waveforms to perform DDR4 compliance tests




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Inc. 17

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Generate measurement results and HTML report




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Inc. 18

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DDR4 Compliance Test Bench demo




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Inc. 19

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Summary




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Inc. 20

ADS simulates the physical channel effects of I/O drivers/receivers and package/PCB/connectors between MCH and DDR4 memory

Simulated waveforms are used to run DDR4 compliance test

Compliance sign-off report is generated from the simulated waveforms before committing to fabrication. Exact same tests can be run in the test lab when

hardware prototypes come back from fabrication

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Call to Action




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Inc. 21

Download DDR4 Compliance Test Bench software: http://www.keysight.com/main/software.jspx?cc=US&lc=eng&ckey=2504328&id=2504328

Watch DDR4 Compliance Test Bench video : http://www.keysight.com/en/pd-2423419-pn-W2351EP/ddr4-compliance-test-bench

2014 ADS DDR4 Compliance Test Bench HSD Seminar Rev1

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