2003_Interline dynamic voltage restorer

8/3/2019 2003_Interline dynamic voltage restorer

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Interline dynamic voltage restorer: an economicalway to improve interline power quality

H.M. Wijekoon, D.M. Vilathgamuwa and S.S. Choi

Abstract: The dynamic voltage restorer (DVR), a custom power device, has been proposed tomitigate voltage sags, thereby protecting sensitive loads. The maximum amount of real power thatthe DVR can provide to the load is a deciding factor in determining the capability of the restorer.This paper proposes a concept of interline dynamic voltage restoration (IDVR) in which severalDVRs in different feeders are connected to a common DC-link energy storage. The cost ofinstallation of a group of DVRs protecting various parts of a power system can be reduced by thesharing of a common energy storage system. While one of the DVRs carries out voltagecompensation during sags, the other DVRs can replenish energy to the DC-link to maintain theDC-link voltage at a specific level. A closed-loop controller that consists of an inner current loopand an outer voltage loop is incorporated into the IDVR system in both the voltage control and thepower flow control modes. Simulation results are presented to verify the efficacy of the proposedIDVR design.

1 Introduction

The increase of voltage sensitivity equipment has madeindustrial processes more susceptible to supply voltagedeviations in the form of voltage sag. A series-connectedconverter-based mitigation device DVR [14] has beenproposed for protecting sensitive loads from such voltagesags. The series interconnection allows the DVR injectedvoltage to be added to the utility supply voltage. Theamplitude and phase angles of the injected three-phase

voltages can be varied, thereby allowing control of real andreactive power exchanged between the DVR and thedistribution system. The reactive power can be internallygenerated without AC passive components, while the realpower exchange between the DVR and the load needs to besupplied by external means. The amount of real power andreactive power provided by the DVR depends on thetype of voltage disturbance, the power requirements ofthe protected load and the direction and magnitude of theinjected voltage.

The compensation capacity of a particular DVR dependson voltage injection ability and the maximum real powerthat can be supplied by the DVR. Thus the capacity of the

energy storage device can become a limiting factor incompensating long duration voltage sags. If the DC-linkenergy storage can be replenished by some means duringcompensation, the DVR can mitigate long duration voltagesags effectively. Therefore, attention has been paid recentlyto the DVR energy storage and its optimum use in thecompensation process. A progressive phase advancetechnique has been introduced in [2, 3]. In this method,all three-phase voltages are progressively advanced by a

certain angle a to minimise the amount of real powersupplied by the DVR. Mitigation of deep sag with longduration cannot be solved with the progressive phaseadvance technique alone, as it is only a way of optimisingexisting DVR energy storage.

This paper presents a concept of interline dynamicvoltage restoration (IDVR), where a number of voltagerestorers are connected such that they share a commonDC-link. The interline power flow controller (IPFC)concept, still under research for the compensation andeffective power flow management of multi-line transmissionsystem has been introduced in [5, 6]. In its general form, theIPFC uses a number of inverters with a common DC-linkto provide series compensation for a selected line of thetransmission system. In a similar way, the IDVR system isformed by using several DVRs protecting sensitive loads indifferent distribution lines to share a common DC-linkenergy storage. As an example, consider two differentsensitive loads in an industrial park, fed from twoindependent feeders of perhaps different voltage levels.The sensitive loads in these feeders are protected fromvoltage sags by separate DVRs used in each individualfeeder. DC-links of these two DVRs could then be

connected to a common DC-link to form an IDVR system.This would cut down the cost of the custom power device,as sharing a common DC-link reduces the DC-link storagecapacity significantly compared to that of a arrangementwhereby loads are protected by clusters of DVRs withseparate energy storage systems.

This paper also presents an extensive analysis on thedevelopment of suitable control systems for the IDVRworking in voltage sag mitigation mode and power flowcontroller mode. The injected voltage of the series converterin the DVR solely depends on the accuracy and dynamicperformance of the PWM synthesis scheme and the controlsystem adopted. Thus the controller should provide gooddynamic performance and an adequate stability margin

whether the DVR in IDVR system works in a voltagecompensation mode or in a power flow controller mode.Generally, there are two control systems, namely open-loop

The authors are with the Center for Advanced Power Electronics, School ofElectrical and Electronic Engineering, Block S2, Nanyang TechnologicalUniversity, Nanyang Avenue, 639798, Singapore

r IEE, 2003

IEE Proceedings online no. 20030800

doi:10.1049/ip-gtd:20030800

Paper received 18th March 2003

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[4] and closed-loop [2], adopted for DVR systems. Thispaper uses a multi-loop feedback control system incorpor-ating an inner current loop and an outer voltage loop forthe IDVR converter system. The only difference in thecontrol system used for the power flow controller mode andthe voltage compensation mode is the generation of thereference signal in each control system.

2 Basic operation of interline dynamic voltage

restoration (IDVR)

In its general form the interline dynamic voltage restoration(IDVR) proposed in this paper uses a number of DC to ACinverters that are connected to a common DC voltage link.In other words, the IDVR comprises a number of dynamicvoltage restorers, connected to different lines to compensatefor voltage sags appearing in the respective feeder buses.Propagation of voltage sags due to faults depends on thefault current and the voltage level. Sag occurring in atransmission system may propagate to a larger extent thanthat of distribution system. As the feeders in IDVR systemare emanating from different grid substations and perhapsat different voltage levels, voltage sag appearing in one

feeder may have lesser influence on the other feeder. Thus,in the case of a fault occurring in one of lines, the DVRs inthe healthy lines could be controlled to supply a certainamount of real power to the DC-link energy storage. Thiswill prevent the DC voltage from declining excessively dueto the real power being drawn for voltage sag mitigation inthe faulty line. An elementary IDVR system consisting oftwo DVRs is illustrated in Fig. 1. The voltage levels of thetwo supply feeders in Fig. 1 are different (6.6 kV and 22 kV).Therefore, voltage sag appearing in one feeder may haveless of an effect on the other feeder. Hence they can beconsidered as two isolated sources. Harmonics effects, andother nonlinearities caused by grid transformer saturationin an event of a voltage sag, are ignored.

To establish the power transfer between the two systems,it is assumed that DVR1 is operating to mitigate voltage sagappearing in that line, and DVR2, whose line is healthy, iscontrolled to provide real power to the DC-link energystorage. As line 2 is operating at its normal condition, theload voltage of feeder 2 is equal to the load bus voltage Vb2.Thus the inverter of DVR2 should be controlled to meetthis condition too, while providing real power to theDC-link energy storage. The real power that should besupplied by DVR2 is equal to the real power needed tocompensate for the voltage sag in line 1 and the system

power losses including the converter switching losses. Thephasor diagram shown in Fig. 2 illustrates the magnitudeand the direction of the injected voltage of the inverter 2 totransfer real power from the line 2, while keeping the loadvoltage of line 2 at a specified value. It is clear that voltage

Vl2 is equal to Vb2 and in-phase with the bus voltage Vb2under the normal operating condition, while it is necessaryto advance the angle of the load voltage Vl2 appropriately inpower flow control mode in order to replenish the DC-linkvoltage. Hence the locus of Vl2 should lie on a circle withradius equal to the desired bus voltage of Vb2. Thus it isclear from Fig. 2 that the real power transferred to theDC-link energy storage depends on the advance angle b.Considering the vector diagram, the real power exchangedbetween line 2 and the DC-link energy storage can bewritten as follows:

Pex 3Vb2Il2cosf2 b 3Vl2Il2cosf2 1

where Il2 load current of feeder 2, Vb2 load bus voltageof feeder 2, Vl2 load voltage, f2 load power factor angleand b load voltage advance angle.

As the magnitude of the load voltage should be equal tothe load bus voltage Vb2, (1) can be written in terms of load

apparent power as in (2).Pex Sl2cosf2 b pf2 2

where Sl2 3Vl2Il2 feeder 2 load apparent power andpf2 feeder 2 load power factor.

Pex is the real power needed to compensate for thevoltage sag appearing in feeder 1 load bus and the systemreal power losses. Hence Pex can also be written as in (3).

Pex PDVR1 Plosses 3

where PDVR1 real power injected for mitigating thevoltage sag in feeder 1 and Plosses system power lossesincluding converter switching losses. From (2) and (3), theadvance angle b is given by (4).

b f2 cos1 PDVR1 Plosses

Sl2 pf2

4

As the parameters Vl2, Il2 and hence Sl2 and f2 in (2) arefixed to their specified values, the only variable in (2) thatcan be used to replenish the DC-link energy storage is theadvance angle b. Thus the maximum real power that line 2can transfer to the DC-link energy storage occurs when theangle b is advanced such that it is equal to the line 2 loadpower factor angle f2. In other words, the maximum realpower transfer to the DC-link occurs when the line 2 isoperated at unity power factor. Thus the maximum realpower transfer is given by (5).

Pex max Sl21 pf2 5

provided that bmaxf2.

Fig. 1 Basic interline DVR with two inverters

Fig. 2 Vector diagram of DVR2 operating for real powerexchange

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Therefore, it is clear that the maximum amount of powerthat can be transferred from line 2 to line 1 through theDC-link energy storage depends on the apparent power andpower factor of the load of line 2.

2.1 Sag mitigation schemes with maximumpower transfer from DVR2DVR1 can be operated in energy optimum mode where theload voltage angle is progressively advanced to a certainangle a to minimise the real power injected by DVR1.

Alternatively, pre-sag supply voltage boosting mode can beapplied where the DVR1 voltage is injected, such thatthe load voltage is in-phase with the pre-sag supply voltage.The next two Sections will address the depth of the voltagesag that line 2 can support by providing real power tothe DC-link energy storage.

2.1.1 DVR1 operating in pre-sag load voltageboosting model: Figure 3 shows the vector diagram forthe pre-sag load voltage boosting, where the DVR1 voltageis injected such that load voltage is in-phase with its pre-sagvalue. From Fig. 3 it can be seen that the real powerdelivered by DVR1 can be written as in (6).

PDV R1pr Sl1 pf1 M

3cosf1 y

6

where

aj Vs1j

Vl1; X

X3j1

ajcosdj;

Y X3j1

ajsindj;

M ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiX2 Y2

p;

y tan1Y

X

and PDVR1pr real power supplied by the DVR1, dj phaseangle jump, fl power factor angle of the load in line 1, Ill load current, aj sag factor and Vll load voltage ofline 1, Sll apparent power of load 1.

For a three-phase balanced voltage sag of factor a with aphase angle jump of d, simplifying (6) and substituting forPDVR1 in (4), the following expression forb can be obtained.

b f2

cos1Sl1pf1 a

cosf1 d Plosses

Sl2 pf2

7

Thus for maximum real power exchange,

Sl1pf1 acosf1 d Plosses=Sl2 pf2 1:

Hence

a Sl1pf1 Sl2pf2 Plosses Sl2

Sl1cosf1 d8

For an example, assume that the two lines carry identicalloads with equal power factor pf and 3% system losseswith respect to the apparent power of the load Sl2 in line2. The sag factor that line 2 can support by providing realpower can be expressed as in (9).

a 2pf 0:97

cosf1 d9

Figure 4 illustrates the sag factor of line 1 plotted againstphase angle jump for different load power factors. It is clear

from Fig. 4 that the voltage sag, in line 1 that line 2 cansupport by providing real power depends on the magnitudeand direction of phase angle jump of the voltage sag inaddition to the power factor of the loads. For an example,for a 0.85 power factor load with phase jump d 0.0deg.,the sag factor is about 0.86. It means line 2 can supply realpower to maintain DC-link voltage only for voltage sag of14% appearing at the load bus of line 1. However, for d+ 8 deg., the sag factor has increased to 0.95, which meansline 2 can only support for a voltage sag of 5% with phasejump of 8 deg.

The sag factor decreases by increasing the capability tomitigate sag with large depth when the phase angle jump isnegative. For d 20deg and 0.8 power factor load, thesag factor is about 0.66. Therefore, the depth of the sag thatcan be mitigated from line 2 is 34%. As the sag factordepends on the phase angle jump d, and d is notcontrollable, DVR1 operating in pre-sag supply voltageboosting technique generally requires a significant numberof lines to be connected to the common DC-link in order to

mitigate sags with large depths.

2.1.2 DVR1 operating in energy optimum mode:In the energy optimum operation of the DVR, theload voltage angle is advanced progressively by acertain angle a, which will minimise the real powerinjected to the load from the DC-link energy storage.The complete theoretical analysis for the derivation ofnecessary phase advance angle for generalised sagsituation is given in [2]. Figure 5 illustrates the vectordiagram of the phase angle advance technique.

The real power injected by the DVR1 is given by (10),

PDV R1opt 3Vl1Il1cosj1

X3j1

ajVl1Il1cosf1 a dj10

Fig. 3 Vector diagram for pre-sag voltage boosting technique

Fig. 4 Sag factor variation with phase angle jump for given powerfactor

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Thus the optimum real power required to mitigate voltagesag can be written as in (11) with PDVR140

PDV R1opt Sl1 pf1 M

3

11

where aoptf1 + y. The definition of M is given in (6).For a balanced three-phase voltage sag with sag factor a

and phase angle jump d, M 3a. Hence substituting forPDVR1 in (4), the advance angle b can be written as in (12).

b f2 cos1 Sl1pf1 a Plosses

Sl2 pf2

12

For maximum real power transfer,

a Sl1pf1 Plosses Sl21 pf2

Sl113

For two-line IDVR system with equal load and powerfactor and 3% system losses with respect to the apparentpower of the load, the sag factor is given by (14).

a 2pf1 0:97 14

Thus, it is clear from (14) that the sag factor is about 0.73for a 0.85 power factor load and 0.63 for 0.8 power factorload. In other words, line 2 can support to mitigate about27% voltage sag appearing at the load bus of line 1 if theload power factor is 0.85 and it is 37% for a 0.8 powerfactor load. Also, it is noted that the sag factor does notdepend on the phase angle jump as in pre-sag supplyvoltage boosting technique. Thus it is clear that, in order tocompensate sags with large depth, the operation of DVR1in energy optimum mode is most desirable.

3 Modelling and control system design forconverter system 2 (DVR2)

The common connection between the converters in differentlines is formed by the DC-voltage bus. When one of theconverters operates in voltage control mode to compensatefor the voltage sag appearing in that line, the other

converter is controlled to provide real power to theDC-link energy storage to maintain the DC-link voltage.If the converter losses are neglected, the real powerexchange of the converter 2, P2con PDVR1. Thusconverter 2 should operate to meet this demand within

the allowable power exchange limit. This real power flowsthrough the DC capacitor. The power balance equationincluding the real power losses in the converters can bewritten as in (15).

Pex C0VDCdVDC

dtPDV R1 Plosses 15

where VDC DC-link voltage, C0 DC-link capacitance.It is clear from (15) that the real power exchange between

lines through the common DC-link takes place in a

nonlinear fashion. Thus, by sensing the voltage on theDC-link and comparing it with a reference DC-link voltage,a controller can regulate the real power flow and maintainthe required voltage level in the DC-link. In transientconditions such as at the beginning of operation of DVR1,Inverter 1 of DVR1 will increase the real power flow to theload due to the voltage sag appearing in that line. Thisadditional transient energy is supplied by the DC-linkcapacitor until the bus voltage controller of the Inverter 2 inline 2 regulates it. Therefore, the size of the capacitor in theDC-link has to be determined so that the DC-link voltagechange is limited to an allowable value.

The control strategy for the converter 2 should bedeveloped in such a way that it maintains the load voltageof line 2 while the real power is delivered to the DC-linkcapacitor. As described in the previous Section, the onlyparameter that is controllable is the advance angle betweenthe load voltage and the supply voltage of line 2. Theadvance angle can be calculated by instantaneous realpower regulated through the DC-link voltage regulator andthe load 2 real power reference. Once the advance angle isdetermined, the reference load voltage profile can be foundeasily. This reference is then regulated in a multi-loopcurrent mode controller.

3.1 Reference voltage calculationThe reference voltage for the current mode voltage regulator

can be calculated on the basis of the instantaneous powerflow at the load and the power exchanged via the DC-linkenergy storage. The load voltage advance angle is calculatedby deriving a reference active supply current, which dependson the DC voltage regulator instantaneous real power. Asthe magnitude of the load voltage is fixed to the supplyvoltage magnitude, the reference profile of the injectedvoltage could be easily derived. Figure 6 illustrates thecontroller block diagram for generating reference voltagefor the current mode voltage regulator. The supply three-phase voltages are transformed to a synchronously rotatingreference frame dq-axes where the d-axis is aligned with thesupply voltage vector, Vsd is equal to the peak supply

voltage and Vsq 0 as shown in Fig 7. The followingexpressions can be derived with reference to Figs. 6 and 7.

Pex VDCref Vdc Kp Kl

s

16

Fig. 5 Vector diagram of phase advance technique

Fig. 6 Reference voltage generation for DVR2 current mode voltage regulator



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id 2

3VsdPex Plref 17

b f2 cos1 i

d

il2m

18

Vrefd Vl2mcosb 19

Vrefq Vl2msinb 20

where VDcref DC-link reference voltage, Kp propor-tional gain of the DC-link voltage regulator, Kl integralgain of the DC-link voltage regulator, P

lrefreal power

reference of the load in line 2, id active component ofreference current, il2m peak load current, Vrefd referencevoltage d-axis component and Vrefq reference voltageq-axis component.

3.2 Multi-loop current mode voltage regulatorCurrent mode control techniques are usually applied topower electronic converters wherein an inner current loop isused within an outer voltage loop in closed-loop voltageregulation. The inner current loop can be formed usingeither the filter inductor current or filter capacitor current ora combination of these two currents. In this paper the innercurrent loop is formed using the filter capacitor current, as

the filter capacitor current is directly proportional to therate of change of load voltage. The dynamic characteristicsof the inverter voltage mainly depends on the LC filter andthe load. The load is assumed to be linear static type withadded load disturbance current to represent load changes.The overall control block diagram is shown in Fig. 8. Thereference voltage calculation for the controller is based onthe discussion in the previous Section.

3.3 Control system analysisAs soon as a voltage sag appears at the load bus of line 1,DVR1 begins its operation by drawing power from theDC-link energy storage. This power is initially supplied by

the capacitor until the DC-bus regulator reacts for the realpower demand. Then the DC-link voltage decreases,generating an error signal to the DC-link voltage regulator.The regulator commands the amount of real powerrequired to compensate for the DC-link drop and the angleb to be advanced is determined. The phase advance iscarried out progressively in order to avoid sudden powervariation in the load of line 2. Considering Fig. 8, the loadvoltage V2 can be written as in (21).

V2s GvrefsVrefs Gv1sV1s Gidsids 21

where

Gvrefs nkikf kckvrl sll

a3s3 a2s2 a1s a0;

Gv1s b3s

3 b2s2 b1s b0

a3s3 a2s2 a1s a0;

Gids c4s

4 c3s3 c2s

2 c1s c0a3s3 a2s2 a1s a0

;

Coefficients a3, a2, a1, a0, b3, b2, b1, b0, c4, c3, c2, c1 and c0 aregiven in Appendix, Section 8.1.

The system characteristic equation (CE) can be factor-

ised into a first-order component and a second-ordercomponent as presented in (22).

CEa3s3 a2s

2 a1s a0

%Cflfll n2lts rl n

2rt

s2 d1s d0 22

d1 and d0 are given in Appendix, Section 8.1.In most DVR applications the transformer ratio (n) is

selected as 1. Therefore llcn2lt and rlcn

2rt.Hence one can re-write the transfer function for the

reference input as in (23).

Gvref

s %nkikf kckvrl sll

rl slls2 d1s d0

nkikf kckv

s2 d1s d0

23

The real root of the characteristic equation, which isapproximately located at rl/ll, cancels out with zero at thesame location. The other two complex roots are mainlygoverned by gain parameters kc and kv and they areindependent of load parameters. Hence they can becalculated to meet a given loading condition while keepingthe system stability and damping at the desired value. Thesystem steady-state error and damping ratio are given by(24) and (25). Once the design specification is given, gain

Fig. 7 Representation of Vl 2, Il 2 and Vs2 in dq axes

Fig. 8 Multi-loop feedback controller block diagram for voltage regulation



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parameters can be calculated using these two equations. Thefeed forward gain does not contribute to system dampingand stability, but it can be adjusted independently to reducethe system steady-state error.

ess 1 nkikf kckv

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffir2l w

20l

2l

qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi

a0 a2w202 w20a1 a3w

20

2q

264

375 100 24

x

rf kcki

2onlf 25

where

ocn ffi1ffiffiffiffiffiffiffiffiffiffiffi

Cflfp ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi1 nkikckvp

Figures 9 and 10 depict pole-zero maps of the closed-looptransfer function of 6.6 kV system given in Appendix,Section 8.2 for different kc for a given kv, and for different kvfor a given kc respectively. Similar plots can also bepresented for the 22 kV system. As described in the previousSection, the real root of the characteristic equation coincideswith the zero of the system. The real part of the complex

poles moves away from the imaginary axis with an increaseof the stability margin as the value ofkc is increased. As theinherent delay in the feedback control system could result inexcessive overshoot or undershoot in the injected voltage

due to sudden change in the supply voltage, a feedforwardcontrol signal has been added to the inverter input voltagesignal in order to provide a smooth response to the changein the supply voltage.

4 Control system for converter system 1 tomitigate voltage sag

The general requirement of the DVR control scheme is toobtain an AC waveform with low total harmonic distortion

and good dynamic performance against supply and loaddisturbances. Due to the simplicity and the inherent stabilityfeatures of the open-loop control, where the control voltageof DVR is derived by comparing the supply voltage againsta reference waveform, most of the control systems adoptedfor DVR are of the open-loop type. However, closed-loopsystems for the DVR are gradually gaining acceptance dueto their good control properties. In this paper, the closed-loop control system shown in Fig. 8 is also used as thecurrent mode voltage regulator for voltage sag compensa-tion. The only difference is the generation of referencevoltage. As discussed in the above Section, if DVR1 isoperated using the phase angle advance technique, theconverter of line 2, which operates in the real power controlmode, can support a sag of about 40%. Therefore, theDVR1 must be operated in progressive phase advancetechnique to reduce the real power requirement fromthe DC-link. Detection of the supply voltage magnitude andphase angle in order to determine the phase angle advancehas been carried out by using a PLL and a Kalman filter asdescribed in [2].

5 Simulation results

A detailed simulation has been carried out usingMATLAB/SIMULINK software to verify the efficacy ofthe proposed IDVR system in order to mitigate longduration voltage sags and the effectiveness of the closed-loop control system in real power control. The test systemfor which parameters are given in Appendix, Section 8.2consists of two lines of 6.6 kV and 22kV. The sourceimpedances are selected depending on the fault levels ofload busses of each line, and the line resistances are assumedto be negligible. Two lines feed equal loads with 0.80 laggingpower factor. A software phased locked loop (PLL), whichcalculates supply voltage parameters and the necessaryphase angle advance, is used to generate the reference forthe controller for mitigating voltage sag. For the simulationresults presented, it is considered that line 1 is subjected to athree-phase voltage sag of 35% and a 20 phase angle

jump with 200 ms duration as shown in Fig. 11a, whileline 2 is in normal operation.

Figure 11b presents the compensated load voltage of6.6 kV line for the voltage sag shown in Fig. 11a. TheDVR1 is operated in energy optimum mode, and thecompensated load voltage has been progressively advancedto about 17 deg during the voltage sag and progressivelyretarded after the voltage sag. The compensated loadvoltage of 6.6 kV line shows that the load voltage accuratelyfollows the given reference when DVR1 is operated underthe multi-loop feedback control system. It is noted that thedegree of damping and dynamic performance haveincreased significantly with the multi-loop feedback controlsystem compared to the open loop control system. TheDC-link voltage shown in Fig. 11d initially drops at thestart when energy is drawn from DVR1 and the DC-linkvoltage is brought towards the reference value with the time.

Fig. 9 Pole-zero map for different kc for kv 0.7

Fig. 10 Pole-zero map for different kv for kc 80

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The initial power requirement of the DVR1 is furtheraggravated as the initial load voltage of line 1 is in phasewith pre-sag supply voltage. This means that the DC-linkneeds to supply a certain amount of additional power untilload 1 voltage angle is gradually advanced to bring DVR1to the energy optimum mode. At the end of the voltage sag,an increase in the DC-link voltage can be seen. As the sagceases to exist, line 1 does not need any real power and theDC-link voltage increases with the excess of power until thereal power controller of line 2 operates to control it. Figure11c depicts the load voltage of line 2, which has beenprogressively advanced with respect to the supply voltage inorder to provide the real power to replenish the DC-linkenergy storage. The load voltage accurately tracks thereference generated from the control loop as discussed in

Section 3.1 and the multi-loop voltage regulator hasmaintained good damping and dynamic performance ofthe load voltage. Figure 11e shows the real power variationof the converter in line 2. Figure 11f presents the variationof load voltage advance angle of line 2. As the sag appearsin line 1, it is progressively advanced to its maximum valueand maintained in this value until the DC-link voltagereaches its reference value. At the end of the sag, theadvance angle is gradually retarded until it reaches zero.

6 Conclusions

The compensation capability of a particular DVR dependson the maximum voltage injection ability and the maximumenergy that can be supplied to the load during the

Fig. 11 Simulation resultsa three-phase voltage sag of 35% and 20 deg phase jump 6.6kV line,b compensated load voltage of 6.6 kV line,

c load voltage of 22 kV line,

d DC-link voltage,

e real power supplied to 6.6 kV line from 22 kV line,

f advance angle of load voltage of 22 kV line



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compensation process. The latter is very important,especially in mitigating long duration voltage sags. Thispaper proposes the concept of interline dynamic voltagerestoration (IDVR) in which several DVRs are connected toa common DC-link energy storage. When one of the DVRscompensates a voltage sag, the other DVRs are used toreplenish the DC-link energy storage. The proposed multi-loop feedback control system is identical for both thevoltage regulation and the real power control modes. Theonly difference is the way in which the reference signal is

generated and it depends on the mode of operation. In thereal power flow control mode the reference is generatedaccording to the real power requirement demanded by thefaulty line. The analysis shows that the two-line IDVRsystem can mitigate about 40% voltage sag with longduration, which appears in one of the lines. The limitingfactor of the amount of real power that can be transferredfrom one line to the DC-link is the load power factor. Astypical industrial power factors fall between 0.8 and 0.85,15% to 20% of the load power can be transferred to theDC-link energy storage when it is required. The powertransfer capacity from the healthy lines to the DC-link canbe further increased if the number of DVRs connected tothe DC-Link is increased. This will further enhance the

capability of the IDVR in mitigating a wide spectrum ofvoltage sags.

7 References

1 Woodley, N.H., Morgan, L., and Sundaram, A.: Experience with aninverter-based dynamic voltage restorer, IEEE Trans. Power Deliv.,1999, 14, (3), pp. 11811186

2 Vilathgamuwa, M., Perera, A.A.D.R., Choi, S.S., and Tseng, K.J.:Control of energy optimized dynamic voltage restorer. Proc. 25thAnnual IEEE Industrial Electronic Society Conf. (IECON.,) 1999,Vol. 2, pp. 873878

3 Li, B.H., Choi, S.S., and Vilathgamuwa, D.M.: A new controlstrategy for energy-saving dynamic voltage restoration. Proc.IEEE Power Engineering Society Summer Meeting, 2000, Vol. 2,pp. 11031108

4 Nielsen, J.G., Blaabjerg, F., and Mohan, N.: Control strategies for

dynamic voltage restorer compensating voltage sags with phase jump.Proc. 16th Annual IEEE Applied power electronics Conf. andExposition, (APEC), 2001, Vol. 2, pp. 12671273

5 Gyugyi, L., Sen, K.K., and Schauder, C.D.: The interline powerflow controller concept: a new approach to power flow managementin transmission system, IEEE Trans. Power Deliv., 1999, 14, (3),pp. 11151123

6 Gyugyi, L.: Converter-based FACTS controller. Flexible ACtransmission systemthe FACTS, Proc. IEE Colloquium, 1998,pp. 1/11/10

8 Appendix

8.1

a3 Cflfll n2lt,

a2 Cfrfll lfrl n2rtlf n2ltrf kckill n2kckilt

a1 Cfrfrl n2Cfrtrf n

2lf ll kckiCfrl

nkckvkill n2lt n

2kckiCfrt

a0 n2rf rl nkckvkirl n

2rt

b3 Cflfll; b2 Cfrfll lfrl kckill,

b1 Cfrfrl ll kckiCfrl nkfkill,

b0 rl1 nkfki

c4 n2Cflfllll

c3 n2Cfrflllt lfltrl lfllrt kckilllt

c2 n2Cfrtrfll rtrllf rlrflt ltll lfll

Cfkckirtll ltrl

c1 n2rlrfrlCf rllt llrt kckiCfrtrl rllf

llrfc0 n2rtrl rlrf

d1 rf kcki

lfd0

n2rt rf rl1 nkckvki

Cflfrl n2rt

ffi1 nkckvki

Cflf

Cf filter capacitance, lf filter inductance, rf filter resis-tance, rt transformer resistance, lt transformer leakageinductance, rl load resistance, ll load inductance,n transformer winding ratio.

8.2See Table 1.

Table 1: Parameters of the two-line IDVR system shown inFig. 1

Parameter 6.6 kV 22 kV

Supply voltage per phase (kV) 3.81 12.7

Line inductance (mH) 0.7 2.0

Load resistance (O) 17.5 193.5

Load inductance (mH) 41.5 462.0

Transformer resistance (O) 0.05 0.1

Transformer leakage inductance (mH) 1.0 1.5

Filter resistance (O) 0.05 0.06

Filter inductance (mH) 7.0 7.0

Filter capacitance (mF) 86.0 30

Common DC-link capacitance (mF) 14,400

Common DC-link voltage-VDC (kV) 20


2003_Interline dynamic voltage restorer

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