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2 December 2003 ITRS Public Conference Hsin Chu, Taiwan ITRS Presentation PIDS ITWG Emerging Research Devices Hsin-Chu, Taiwan December 2, 2003 Jim Hutchby - SRC Slide 2 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan u George BourinaoffIntel/SRC u Joe BrewerU. Florida u Toshiro HiramotoTokyo U. u Jim HutchbySRC u Mike Forshaw UC London u Tsu-Jae King UC Berkeley u Rainer WaserRWTH A u In YooSamsung u John CarruthersOGI u Joop BruinesPhilips u Jim ChungCompaq u Peng FangAMAT u Dae Gwan KangHynix u Makoto Yoshimi Toshiba u Kristin De MeyerIMEC u Tak Ning IBM u Philip WongIBM u Luan TranMicron u Victor ZhirnovSRC/NCSU u Ramon CompanoEurope Com u Simon Deleonibus LETI u Thomas Skotnicki ST Me u Yuegang ZhangIntel u Kentaro Shibahara Hiroshima U. u Byong Gook ParkSeoul N. U. PIDS Research Devices Working Group Participants Slide 3 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Emerging Research Devices Introduction and Scope Cast a broad net to introduce readers to device and architecture concepts for information processing --- Concept Identify Include Stimulate --- not hardened solutions --- not endorse --- and quantify (new) --- and assess/critique (new) Slide 4 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Emerging Research Devices Introduction and Scope Broadened Scope Compared to 2001 Chapter --- New quantitative performance metrics Provide in-depth critical assessment --- key application driven questions/issues --- potential versus to-date performance Slide 5 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Scope of Emerging Research Devices Bulk CMOS Double-Gate CMOS Quantum cellular automataMolecular devices Nanotubes Emerging Information Processing Concepts New Memory and Logic Technologies New Architecture Technologies Slide 6 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Bulk-Si Performance Trends Maintaining historical CMOS performance trend requires new semiconductor materials and structures by 2008-2010... Earlier if current bulk-Si data do not improve significantly. Best Case : Projected forward MIT Antoniadis Slide 7 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Single Gate Non-classical CMOS Slide 8 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Multiple Gate Non-classical CMOS Slide 9 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Technology Enhancements for High Performance Calculations performed using MASTAR ST Microelectronics T. Skotnicki Slide 10 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Scope of Emerging Research Devices Bulk CMOS Double-Gate CMOS Quantum cellular automataMolecular devices Nanotubes Emerging Information Processing Concepts New Memory and Logic Technologies New Architecture Technologies Slide 11 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Emerging Research Devices Requirements & Motivations for Beyond CMOS Fundamental Requirements uEnergy restorative functional process (e.g. gain) uCompatible with CMOS uAt or above room temperature operation Compelling Motivations uFunctionally scaleable > 100x beyond CMOS limit uand High information processing rate and throughput uor Minimum energy per functional operation uor Minimum, scaleable cost per function Slide 12 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Emerging Research Memory Devices Slide 13 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Emerging Research Logic Devices Slide 14 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Scaling Limit of Charge Based Switch An Example of Critical Assessment Observations u Transistor critical dimension limited to ~ 1 nm (In the 2003 ITRS physical gate length = 7 nm for 2018) u Power density, not critical dimension, limits gate density to ~ 1 x 10 9 gates/cm 2 u For the ITRS density and switching time, CMOS is approaching the maximum power efficiency Slide 15 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Technology Performance and Risk Evaluation Emerging Research Memory Devices Slide 16 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Technology Performance and Risk Evaluation Emerging Research Logic Devices Slide 17 2 December 2003 ITRS Public Conference Hsin Chu, Taiwan Slide 18 Emerging Research Devices Summary u Potential solutions for device structures necessary to achieve the advanced nodes (< 45-nm) identified u For the ITRS gate density and switching time - v Power density (not switch size) limits charge based logic density and performance v CMOS is approaching the maximum power efficiency u Emerging Research Device Technologies will extend CMOS into new application domains