17 Frequency Synthesizers

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Frequency Synthesizers

Prof. Bhaskar Banerjee

EERF 6330- RF IC Design


Components of a Frequency Synthesizer Function of a frequency synthesizer is to generate a stable

frequency f0 from a reference frequency fref

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Components:- Phase/frequency detector (PFD): outputs a signal that is

proportional to the difference between the phase/frequency of the two input periodic signals

- LPF: reduce phase noise and enhance spectral purity- VCO: takes a filtered o/p of the PFD and generates an output

frequency- Divider: scales the output frequency by a factor of N


Phase Frequency Detectors

Types: Analog multipliers Exclusive OR gates (XOR) Sequential phase detectors

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Vout =AB2 cos()


Analog Multiplier as a Phase Detector

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Mathematically:

Looking only at the low-frequency term,the o/p of the multiplier is:

The phase detector gain constantis given as:

KD =d

dt(Vout) = AB2 sin() (V/rad)

Note that KD is zero when is zero and greatest when is 90.

AB cos(t) cos(t+ ) = AB2 [cos() cos(2t+ )]

To maximize the useful phase range, the loop should be arranged to lock to a phase difference of 90 - Quadrature Phase Detector.

Vout,avg =4

AB

2cos() =

2

AB cos()

KD =d

dt(Vout)|=/2 = 2AB


Analog Modulator as a Phase Detector

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Schematic diagram:

The gain of this phase detector is 4/ times larger than the analog multiplier.The phase detector constant is given as:

Note: Because the modulator phase detector has more than just the fundamental, it can lock on to a harmonic (or subharmonic) of the fundamental (which may be desirable or undesirable).

Note that sgn(x) = 1 if x > 0 and -1 if x < 0.


Exclusive OR-gate as a Phase Detector

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Sequential Phase Detectors

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Phase Detectors vs Frequency Detectors

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Conceptual Illustration of a PFD

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PFD Implementation

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Capture Process of a PLL

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In the unlocked condition, the VCO runs at the frequency corresponding to zero applied dc voltage at its control input. This frequency is called the free running frequency of the VCO.


Loop Filters

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Loop filter: Used to reduce the unwanted components in the PLL.


Loop Filters - contd.

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Loop Filters - example

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i(t) = 2(500 Hz)[1 + 0.1 sin(2 102)t].

Vo(j)

i(j)=

1

Ko

Kv

Kv + j

=

1

Ko

Kv

Kv + j2 100

=200

=1

2000

500

500 + j628

=

1

2000(0.39 j0.48)

|i(j)| = 0.1(1000) = 100 = 50(2)) Vo(j) =

50

1000(0.39 j0.48) = 50

1000 (0.62\51) = 0.031\51

vo(t) = 0.031 sin[(2 102)t 51]Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Loop Filters - example

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Example:For the PLL of the previous example, find vo(t) if the input signal is frequency modulated so that:

Solution:


Higher order loop filters

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L = osc = KDKo

2

= Kv

2

where /2 is the limit for the phase detector.


Loop Lock Range

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Loop lock range is the frequency range about 0 for which the PLL maintains: !i = !osc


Capture Range

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The capture range, C, is the range of input frequencies for which the initially unlocked loop will lock on to an input signal of i.


Charge Pumps

In PLLs with a filter, the avg value of the PFD output is obtained by depositing charge onto a capacitor during each phase/frequency comparison and allowing the charge to decay afterwards.

An ideal charge pump combined with the PFD provides an infinite dc gain with passive filters, which result in the unbounded pull-in range for 2nd order and higher-order PLLs.

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Charge Pumps Non-idealities:

Leakage Current: Small currents that flow when the switch is off. Mismatches in the charge pump: the up and down (charge/discharge) currents are unequal. Timing mismatch in the PFD: any mismatch in the time at which the PFD provides the up and

down currents. TYPES of charge pumps:

Conventional Tri-State Low power consumption, moderate speed, moderate clock slew Low power frequency synthesizers, digital clock generators

Current Steering Static current consumption, high speed, moderate clock slew High speed PLL (> 100 MHz), translation loop, digital clock generators

Differential input, SE output Medium power, moderate speed, low clock slew Low-skew digital clock generators, frequency synthesizers

Fully Differential Static current consumption, high speed (>100 MHz) Digital clock generators, translation loop, frequency synthesizers (with on-chip filter)

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Basic Architecture of a Frequency Synthesizer

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Basic Architecture of a Frequency Synthesizer

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Frequency Synthesizer with Dual Modulus Prescalar

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Example

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Fractional-N Frequency Synthesizer

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17 Frequency Synthesizers

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