16 Shift Registers

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DIGITAL ELECTRONICS (331102) 72 | Page SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT)) PRACTICAL: 16 TO STUDY SHIFT REGISTERS 1.0 AIM : To study SHIFT REGISTERS. 2.0 PRIOR CONCEPTS : Knowledge of working of AND, OR, NOT gate. Working of counters. Working of Flip Flops. 3.0 INTRODUCTION : Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop. Most of the registers possess no characteristic internal sequence of states. All flip-flops are driven by a common clock, and all are set or reset simultaneously. Basic Types of Shift Registers are : o Serial In - Serial Out o Serial In - Parallel Out o Parallel In Serial Out o Parallel In - Parallel Out o bidirectional shift registers 4.0 SERIAL IN SERIAL OUT SHIFT REGISTER : The serial in/serial out shift register accepts data serially that is, one bit at a time on a single line. It produces the stored information on its output also in serial form. A basic four-bit shift register can be constructed using four D flip-flops, as shown in Figure

Transcript of 16 Shift Registers

DIGITAL ELECTRONICS (331102)

72 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

PRACTICAL: 16

TO STUDY SHIFT REGISTERS

1.0 AIM :

To study SHIFT REGISTERS.

2.0 PRIOR CONCEPTS :

Knowledge of working of AND, OR, NOT gate.

Working of counters.

Working of Flip Flops.

3.0 INTRODUCTION :

Shift registers are a type of sequential logic circuit, mainly for storage of digital

data.

They are a group of flip-flops connected in a chain so that the output from one

flip-flop becomes the input of the next flip-flop.

Most of the registers possess no characteristic internal sequence of states.

All flip-flops are driven by a common clock, and all are set or reset

simultaneously.

Basic Types of Shift Registers are :

o Serial In - Serial Out

o Serial In - Parallel Out

o Parallel In – Serial Out

o Parallel In - Parallel Out

o bidirectional shift registers

4.0 SERIAL IN – SERIAL OUT SHIFT REGISTER :

The serial in/serial out shift register accepts data serially – that is, one bit at a

time on a single line. It produces the stored information on its output also in

serial form.

A basic four-bit shift register can be constructed using four D flip-flops, as shown

in Figure

DIGITAL ELECTRONICS (331102)

73 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

The operation of the circuit is as follows.

o The register is first cleared, forcing all four outputs to zero.

o The input data is then applied sequentially to the D input of the first flip-

flop on the left (FF0).

o During each clock pulse, one bit is transmitted from left to right.

o Assume a data word to be 1001.

o The least significant bit of the data has to be shifted through the register

from FF0 to FF3.

5.0 SERIAL IN - PARALLEL OUT SHIFT REGISTERS

For this kind of register, data bits are entered serially.

The difference is the way in which the data bits are taken out of the register.

Once the data are stored, each bit appears on its respective output line, and all

bits are available simultaneously.

DIGITAL ELECTRONICS (331102)

74 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

A construction of a four-bit serial in - parallel out register is shown below.

In the table below, we can

see how the four-bit binary

number 1001 is shifted to

the Q outputs of the

register.

6.0 PARALLEL IN - SERIAL OUT SHIFT REGISTERS

A four-bit parallel in - serial out shift register is shown below. The circuit uses D

flip-flops and NAND gates for entering data (ie writing) to the register.

D0, D1, D2 and D3 are the parallel inputs, where D0 is the most significant bit

and D3 is the least significant bit.

To write data in, the mode control line is taken to LOW and the data is clocked

in.

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75 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

The data can be shifted

when the mode control

line is HIGH as SHIFT is

active high. The register

performs right shift

operation on the

application of a clock

pulse, as shown in the

table below.

7.0 PARALLEL IN - PARALLEL OUT SHIFT REGISTERS

For parallel in - parallel out shift registers, all data bits appear on the parallel

outputs immediately following the simultaneous entry of the data bits.

The following circuit is a four-bit parallel in - parallel out shift register constructed

by D flip-flops.

DIGITAL ELECTRONICS (331102)

76 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

The D's are the parallel inputs and the Q's are the parallel outputs. Once the

register is clocked, all the data at the D inputs appear at the corresponding Q

outputs simultaneously.

8.0 BIDIRECTIONAL SHIFT REGISTERS :

The registers discussed so far involved only right shift operations. Each right shift

operation has the effect of successively dividing the binary

number by two.

If the operation is reversed (left shift), this has the effect of multiplying the

number by two. With suitable gating arrangement a serial shift register can

perform both operations.

A bidirectional, or reversible, shift register is one in which the data can be shift

either left or right. A four-bit bidirectional shift register using D flip-flops is shown

below.

Here a set of NAND gates are configured as OR gates to select data inputs from

the right or left adjacent bistables, as selected by the LEFT/RIGHT control line.

9.0 EXERCISE :

9.1 What are registers?

Ans :

9.2 What are the basic building blocks of Registers?

Ans :

DIGITAL ELECTRONICS (331102)

77 | P a g e SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))

9.3 State different types of shift Registers.

Ans :

9.4 Why is the shift registers called as basic memory devices?

Ans :

10.0 ASSIGNMENT :

10.1 State application of Shift Registers.

10.2 Explain the working of SISO shift register with timing diagrams.

10.3 Explain the working of PISO shift register with timing diagrams.

10.4 Explain the working of PIPO shift register with timing diagrams.

10.5 Explain working of Bidirectional Shift Register.

Grades for Exercise: .................................................

Grades for Assignment: .................................................

Signature of Lab Co-ordinators: .................................................