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© 2003-2008 BYU 16 FSM Page 1 ECEn 224 Finite State Machines

Transcript of 16 Fsm

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Finite State Machines

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State Machine Concepts

• State, current state, next state, state registers

• IFL, OFL, Moore outputs, Mealy outputs

• Transition tables– With output don’t cares (X’s)

– With input don’t cares (-’s)

• State graphs– And their correspondence to TT’s

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Counters as State Machines

• A counter is a finite state machine– Where the state encodings are significant

Q0

Q2

Q3

Q1

00000001

0010

0011

01000101

0110

0111

1000

1001

7 SegmentDecoder

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State Machines

• A state machine is a sequential circuit which progresses through a series of states in reponse to inputs– The output values are usually significant

– The state encodings are usually not significant• Unlike with counters

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State Encodings

• In this machine, the state encodings don’t matter

• The output values do…

…Event1Event2Event1

Event2 Event3

Output1Output2 Output3

Notice the alternate notation for X’ and outputs

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A State Machine Controller for a Photocopier

FiniteState

Machine

Lamps

Motors

Display

Buttons

Timers

Switches

Inputs Outputs

1) FSM receives inputs from copier2) FSM generates control outputs in response3) States help it remember where it is in the copy process…

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A Sequence Detector FSM

S2

S1S3

Xin’

XinXin

Xin

Xin’

Xin’

Z

S0

Because the encodings don’t matter, we will use symbolic state names

What does this machine do?

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

It is called a sequence detector.

It has 1 input (Xin) and one output (Z)

It detects the sequence 0..1..1 on the input. When detected, output Z is asserted.

Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

As long as Xin=1, we stay in state S0

1..1..1..1..1.. Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

When Xin=0, we go to state S1

1..1..1..1..1..0.. Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

As long as Xin=0, we stay in state S1

1..1..1..1..1..0..0..0..0.. Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

When Xin=1, we go to state S2

1..1..1..1..1..0..0..0..0..1.. Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

If Xin=1 again, we go to state S3

1..1..1..1..1..0..0..0..0..1..1

SUCCESS! Raise the Z output

Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

Once we enter state S3, we never leave…

Xin’

Xin

Xin’

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A Sequence Detector FSM

S2

S1S3

Xin

Xin

Xin’Z

S0

What if we don’t see the second Xin=1?

1..1..1..1..1..0..0..0..0..1..0.. Xin’

Xin

Xin’

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Implementing the Sequence Detector FSM

1. Create symbolic Transition Table2. Assign state encoding3. Create conventional Transition Table4. Do standard implementation steps

Xin CS NS Z

0 S0 S1 01 S0 S0 00 S1 S1 01 S1 S2 00 S2 S1 01 S2 S3 0- S3 S3 1

Xin Q1 Q0 N1 N0 Z

0 0 0 0 1 01 0 0 0 0 00 0 1 0 1 01 0 1 1 0 00 1 0 0 1 01 1 0 1 1 0- 1 1 1 1 1

Symbolic TT Conventional TTState Assignment

S0 = 00S1 = 01S2 = 10S3 = 11

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Sequence Detector Implementation

Q1

CLK

Q0

CLK

Q1

D Q

D Q

Q0

N1

N0

Q1Xin

XinQ0

Xin’Q1

Z

N1 = Q1•Q0 + Xin•Q1 + Xin•Q0N0 = Xin’ + Q1Z = Q1•Q0

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A Problem With the Sequence Detector

• This FSM only detects first occurrence of 011 on input…

• Here is a timing diagram– actual screenshot from a simulation

1 1 1 1 1 10 0 0

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Improved Sequence Detector

• This starts over each time 011 is detected…

S2

S1Xin’

Xin

Xin

Xin

Xin’

Xin’

Z

S0

S3

Xin’

Xin

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Improved Detector Timing Diagram

0 0 0 1 1 1 0 1 1 0 001

Z=1 any time state is S3

Looking at Xin, does it look like Z is a cycle late?How could we make Z output a cycle earlier?

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Mealy Version of Sequence Detector

S2

S1Xin’

XinXin / Y

Xin

Xin’

Xin’

S0

S3

Xin’Xin

Output is asserted during the second ‘1’of the 011 sequence…

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Mealy Version Timing Diagram

0 1 1 1 0 1 1 1

Y

Note how Mealy output follows input during state S2

Output is a cycle earlier than in Moore machine –it appears in S2 rather than in S3

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Simplified Mealy Sequence Detector

• A characteristic of Mealy state machines is they often require fewer states than Moore state machines

• Here is simplified but basically equivalent FSM

S2

S1

Xin

Xin / Y

Xin

Xin’

Xin’

S0Xin’

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Example FSM’s

Two Car Wash Controllers

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Basic Car Wash FSM Operation

1. Wait for a token to be inserted2. Reset timer3. Turn on water pump until timer expires4. Start over

• This assumes existence of:– Token acceptance mechanism– Timer– Digitally-controlled water pump

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Basic Car Wash FSM SG

S_SPRAY

S_TOKEN

TOKEN

TOKEN’

CLRT

S_IDLE

TDONE’

TDONE

Wait for token…

Clear timer…

Spray car whilewaiting for timerto expire…

SPRAY

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TOKEN TDONE CS NS CLRT SPRAY

0 - S_IDLE S_IDLE 0 01 - S_IDLE S_TOKEN 0 0- - S_TOKEN S_SPRAY 1 0- 0 S_SPRAY S_SPRAY 0 1- 1 S_SPRAY S_IDLE 0 1

TOKEN TDONE Q1 Q0 N1 N0 CLRT SPRAY

0 - 0 0 0 0 0 01 - 0 0 0 1 0 0- - 0 1 1 0 1 0- 0 1 0 1 0 0 1- 1 1 0 0 0 0 1

TOKEN TDONE Q1 Q0 N1 N0 CLRT SPRAY

0 0 0 0 0 0 0 00 0 0 1 1 0 1 00 0 1 0 1 0 0 10 0 1 1 X X X X0 1 0 0 0 0 0 00 1 0 1 1 0 1 00 1 1 0 0 0 0 10 1 1 1 X X X X1 0 0 0 0 1 0 01 0 0 1 1 0 1 01 0 1 0 1 0 0 11 0 1 1 X X X X1 1 0 0 0 1 0 01 1 0 1 1 0 1 01 1 1 0 0 0 0 11 1 1 1 X X X X

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Basic Car Wash Implementation

D Q

D Q

Q1

CLK

Q0

CLK

N1

N0

Q0

Q1TDONE’

TOKENQ1’Q0’

SPRAY

CLRT

This is what you get from a K-map solution

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Simplified State Graph

S_SPRAY

TOKEN

TOKEN’

CLRTS_IDLE

TDONE’

TDONE

SPRAY

Clear timer while waiting for a token and eliminate a state

TOKEN TDONE CS NS CLRT SPRAY

0 - S_IDLE S_IDLE 1 01 - S_IDLE S_SPRAY 1 0- 0 S_SPRAY S_SPRAY 0 1- 1 S_SPRAY S_IDLE 0 1

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Simplified Car Wash Implementation

State Encoding: S_IDLE = 0, S_SPRAY = 1

NS = CS’•TOKEN + CS•TDONE’CLRT = CS’SPRAY = CS

CS

NS

TDONE’

SPRAYD QCS

CS’TOKEN

CLRT

CLK

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A Fancy Car Wash Controller

• Two types of washes:– Regular wash (spray only) = 1 token

– Deluxe wash (spray, soap, spray) = 2 tokens

• Customer:– Inserts 1 token and pushes START for Regular

– Inserts 2 tokens for Deluxe

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S3

TOKEN’

CLRT1

S0

S1

TOKEN

TOKEN’ • START’

TOKEN • START’

S2 T1DONE’SPRAY, CLRT2

T1DONE

T2DONE’

S4

T2DONE

SOAP, CLRT1

SPRAYT1DONE’

T1DONE

START

Straightforward process to write transition table and reduce to gates

Creativity in FSM designis designing the initialstate graph…

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Enhancements to Fancy Controller

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S3

TOKEN’

CLRT1,ACCEPTCOIN

S0

S1

TOKEN

TOKEN’ • START’

TOKEN • START’

S2 T1DONE’SPRAY, CLRT2

T1DONE

T2DONE’

S4

T2DONE

SOAP, CLRT1

SPRAYT1DONE’

T1DONE

START

There is no way to cause coinboxto refuse tokens. Coins insertedafter wash commences are presumably kept by the machine.

Let’s add an ACCEPTCOIN outputto control when coinbox willaccept tokens…

ACCEPTCOIN

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S3

TOKEN’

CLRT1

S0

S1

TOKEN

TOKEN’ • START’

TOKEN • START’

S2 T1DONE’SPRAY, CLRT2

T1DONE

T2DONE’

S4

T2DONE

SOAP, CLRT1

SPRAYT1DONE’

T1DONE

START

If customer pushes START atprecisely the same time as heinserts another TOKEN, theFSM will take the token, butdeliver a Regular Wash.

That is, START hasprecedence over TOKEN

ACCEPTCOIN

ACCEPTCOIN

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S3

TOKEN’

CLRT1

S0

S1

TOKEN

TOKEN’ • START’

TOKEN

S2 T1DONE’SPRAY, CLRT2

T1DONE

T2DONE’

S4

T2DONE

SOAP, CLRT1

SPRAYT1DONE’

T1DONE

START•TOKEN’

This changes the precedence sothe machine won’t steal the second token, but will give a deluxe wash in this case.

ACCEPTCOIN

ACCEPTCOIN

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Completeness and Conflict Revisited

• State S1 is a typical problem spot

• Carefully analyze the state graph to ensure no conflicts exist and that all cases covered.

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Resetting State Machines

• Ability to reset the FSM is essential for most systems

• Always include a reset capability– Add CLR signal to state graph

– Use flip flops with reset/set inputs

– Either method will work

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Another Example

An Electronic Key Lock

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1) There are 10 keypads 0-92) The unlock sequence is 7..8..93) When a pad is pushed, the signal for that number is asserted4) When any of the keypads are pushed a PUSHED signal is asserted5) If you push a number out of sequence, you get an error indicator

and you get to start over6) After three wrong tries, you must wait ½ hour before trying again7) If you entered the correct sequence, the lock unlocks.8) Once the lock has opened, nothing happens until it is manually

locked again.

Inputs: Keypads signals 0-9 Outputs: INCPUSHED signal CLRCNTRECNT3 (error count = 3) CLRTIMERWAITDONE ERRORLOCKED UNLOCK

Example: Electronic Key Lock

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ECNT3’

A

F E

CB

D

Start

PUSHED•7

PUSHED•7’/INC

PUSHED•9/ UNLOCK

ERRORECNT3/ CLRTIMER

WAITDONE’

WAITDONE/CLRCNTR

PUSHED’

PUSHED’

PUSHED’

LOCKED’

LOCKED/ CLRCNTR

PUSHED•8

PUSHED•8’/INC

PUSHED•9’/INC

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Let’s create the transition table…

ECNT3’

A

F E

CB

D

StartPUSHED•7

PUSHED•7’/INC

PUSHED•9/ UNLOCK

ERRORECNT3/ CLRTIMERWAITDONE’

WAITDONE/CLRCNTR

PUSHED’

PUSHED’

PUSHED’

LOCKED’

LOCKED/ CLRCNTR

PUSHED•8

PUSHED•8’/INC PUSHED•9’/

INC

PUSHED 7 8 9 ECNT3 WAITDONE LOCKED STATE NEXTSTATE INC ERROR C LRCNTR CLRTIMER UNLOCK

0 - - - - - - A A 0 0 0 - 01 0 - - - - - A E 1 0 0 - 01 1 - - - - - A B 0 0 0 - 00 - - - - - - B B 0 0 0 - 01 - 0 - - - - B E 1 0 0 - 01 - 1 - - - - B C 0 0 0 - 00 - - - - - - C C 0 0 0 - 01 - - 0 - - - C E 1 0 0 - 01 - - 1 - - - C D 0 0 - - 1- - - - - - 0 D D - 0 - - 0- - - - - - 1 D A 0 0 1 - 0- - - - 0 - - E A 0 1 0 - 0- - - - 1 - - E F - 1 0 1 0- - - - - 0 - F F - 0 0 0 0- - - - - 1 - F A 0 0 1 0 0

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PUSHED 7 8 9 ECNT3 WAITDONE LOCKED STATE NEXTSTATE INC ERROR C LRCNTR CLRTIMER UNLOCK

0 0 0 0 0 0 0 A A 0 0 0 - 00 0 0 0 0 0 1 A A 0 0 0 - 00 0 0 0 0 1 0 A A 0 0 0 - 00 0 0 0 0 1 1 A A 0 0 0 - 00 0 0 0 1 0 0 A A 0 0 0 - 00 0 0 0 1 0 1 A A 0 0 0 - 00 0 0 0 1 1 0 A A 0 0 0 - 00 0 0 0 1 1 1 A A 0 0 0 - 00 0 0 1 0 0 0 A A 0 0 0 - 00 0 0 1 0 0 1 A A 0 0 0 - 00 0 0 1 0 1 0 A A 0 0 0 - 00 0 0 1 0 1 1 A A 0 0 0 - 00 0 0 1 1 0 0 A A 0 0 0 - 00 0 0 1 1 0 1 A A 0 0 0 - 00 0 0 1 1 1 0 A A 0 0 0 - 0

Now let’s expand State A

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This is going to get ugly fast…

• 7 inputs + 3 state bits = 1024 rows in TT

• Can you do a 10-variable K-map?

• There is a technique called One-Hot state machines we can use instead (future lecture)…

• We could also use behavioral Verilog