10CS33SessionSixteen-16
description
Transcript of 10CS33SessionSixteen-16
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Objectives
State the cause of contact bounce and describe a solution for this problem
Describe characteristic equation of flip
Describe excitation table of flip
Switch Contact Bounce Circuits
In most of the digital systems mechanical contact switches are used for the purpose of conveying an
electrical signal. Examples are the switches used on the keyboard of a digital computer system, toggle
switches, and push buttons.
Ideal Switch Operation
Consider an ideal single pole single throw (SPST) switch circuit as shown below:
The voltage at point A, when the switch is open and closed position is shown:
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
Unit 4
Session - 16
Flip-Flops
State the cause of contact bounce and describe a solution for this problem
Describe characteristic equation of flip-flops and analysis techniques of sequential circuit
Describe excitation table of flip-flops
Switch Contact Bounce Circuits
In most of the digital systems mechanical contact switches are used for the purpose of conveying an
Examples are the switches used on the keyboard of a digital computer system, toggle
Consider an ideal single pole single throw (SPST) switch circuit as shown below:
The voltage at point A, when the switch is open and closed position is shown:
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flops and analysis techniques of sequential circuit
In most of the digital systems mechanical contact switches are used for the purpose of conveying an
Examples are the switches used on the keyboard of a digital computer system, toggle
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Contact Bounce
When the contacts of any mechanical switch
bounce. The voltage waveform at the switch output will have multiple transitions
Debouncing is the process of removing the bounces.
Debounce Circuit
A simple RS latch can be used to debounce a mechanical switch
RS latch is as shown:
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
When the contacts of any mechanical switch bang together they rebound a bit before settling, causing
The voltage waveform at the switch output will have multiple transitions as shown below:
Debouncing is the process of removing the bounces.
used to debounce a mechanical switch. The debounce circuit that uses a simple
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bang together they rebound a bit before settling, causing
as shown below:
. The debounce circuit that uses a simple
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
The debounce circuit will eliminate the switch bounce as illustrated below:
Various Representations of Flip
There are various ways a flip-flop can be represented, each one suitable for certain application
They are:
Truth Tables or Characteristic Tables
Characteristic Equations
Finite State Machine
Excitation Table
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
The debounce circuit will eliminate the switch bounce as illustrated below:
of Flip-Flops
an be represented, each one suitable for certain application
Truth Tables or Characteristic Tables
Characteristic Equations
Finite State Machine
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an be represented, each one suitable for certain application.
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Truth Tables
The truth tables of different flip-flops are shown below:
Characteristic Equations
The characteristic equations of flip
output Qn+1 is expressed as a function of present output
Characteristic Equation of SR Flip-Flop
The characteristic equation of SR flip
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
flops are shown below:
The characteristic equations of flip-flops are useful in analyzing circuits made of them
is expressed as a function of present output Qn and inputs to flip-flop.
Flop
characteristic equation of SR flip-flop is obtained as shown below:
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flops are useful in analyzing circuits made of them. Here, next
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Characteristic Equation of D Flip-Flop
The characteristic equation of D flip
Characteristic Equation of JK Flip-Flop
The characteristic equation of JK flip
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
Flop
The characteristic equation of D flip-flop is obtained as shown below:
Flop
flip-flop is obtained as shown below:
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Characteristic Equation of T Flip-Flop
The characteristic equation of T flip
Drawback of Truth Table
For a complex circuit a truth table is difficult to read as its size becom
machine (FSM), functional behavior of the circuit is explained using finite number of
Finite State Machine
In a sequential logic circuit the value of all the memory elements at a given time define the
circuit at that time. A FSM is a system that can be described by the states it can assume, the state it
starts in, the input it receives, and how it changes state
Flip-Flop as Finite State Machine
Flip-flops can be conveniently represented by a finite
convenient tool to describe an FSM
SR Flip-Flop
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
Flop
The characteristic equation of T flip-flop is obtained as shown below:
For a complex circuit a truth table is difficult to read as its size becomes too large
functional behavior of the circuit is explained using finite number of states
In a sequential logic circuit the value of all the memory elements at a given time define the
A FSM is a system that can be described by the states it can assume, the state it
starts in, the input it receives, and how it changes state.
flops can be conveniently represented by a finite state machine. State transition diagram is a very
convenient tool to describe an FSM. The state transition diagrams of different flip-flops are as shown:
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es too large. In finite state
states.
In a sequential logic circuit the value of all the memory elements at a given time define the state of that
A FSM is a system that can be described by the states it can assume, the state it
State transition diagram is a very
flops are as shown:
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
D flip-flop
JK flip-flop
T flip-flop
Timing Relation
The timing relation implicit in flip-
state transition diagram. The timing relation implicit in flip
by FSM concept and state transition diagram
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
-flop truth tables are brought to the forefront by FSM concept and
The timing relation implicit in flip-flop truth tables are brought to the forefront
by FSM concept and state transition diagram.
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flop truth tables are brought to the forefront by FSM concept and
flop truth tables are brought to the forefront
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Flip-Flop Excitation Table
Truth tables are important in analysis problems
signals required for the desired flip
design problems. The excitation tables of different flip
Excitation Table of SR flip-flop
Excitation Table of D flip-flop
Excitation Table of JK flip-flop
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
Truth tables are important in analysis problems. Excitation tables show the required input trigger
signals required for the desired flip-flop state transition. Excitation tables are very useful in synthesis or
ables of different flip-flops are as shown:
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Excitation tables show the required input trigger
Excitation tables are very useful in synthesis or
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Excitation Table of T flip-flop
Example:
A fictitious flip-flop with two inputs A and B functions like
and 1 respectively. For AB = 01, flip
Draw the truth table and excitation table of this flip
Solution
The truth table and excitation table of the
Analysis of Sequential Circuits
A sequential logic circuit contains flip
combinational circuit elements. Analysis of a circuit helps to explain its p
Example:
Analyze the given sequential circuit:
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
flop with two inputs A and B functions like this. For AB=00 and 11 the output becomes 0
and 1 respectively. For AB = 01, flip-flop retains previous output while output complements for AB = 10.
Draw the truth table and excitation table of this flip-flop.
e of the Fictitious Flip-Flop is as shown:
Analysis of Sequential Circuits
A sequential logic circuit contains flip-flops as memory elements and may also contain logic gates as
Analysis of a circuit helps to explain its performance.
Analyze the given sequential circuit:
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this. For AB=00 and 11 the output becomes 0
flop retains previous output while output complements for AB = 10.
flops as memory elements and may also contain logic gates as
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Solution:
From the circuit diagram, we have the flip
SA = An
SB = AnBn
Using characteristic equation of SR flip
An+1 = SA + RAA
= An + An
= An
For flip-flop B we have:
Bn+1 = SB + RBB
= AnBn + (A
= AnBn + (A
= AnBn + A
= An + Bn
The output from the given circuit,
Xn = AnBn
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
From the circuit diagram, we have the flip-flop input relations:
RA = An
RB = AnBn
Using characteristic equation of SR flip-flop: Qn+1 = S + RQn, we can write for flip-flop A:
An
n An
Bn
+ (AnBn)Bn
+ (An + Bn)Bn
+ AnBn
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flop A:
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
If present state is An = 0 and Bn = 0,
At the end of the first clock cycle we get the next state:
State Analysis Table
State Transition Diagram
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
= 0, then present output Xn = 0.0 =0
At the end of the first clock cycle we get the next state: An+1 = An = 0 = 1
Bn+1 = An + Bn = 0
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10CS 33 LOGIC DESIGN
B. S. Umashankar, BNMIT
Timing Diagram
Questions
1. Find out characteristic equations of J
2. Write the excitation table of J-K flip
Further Reading
Donald P Leach, Albert Paul Malvino & Goutam Saha: Digital
Tata McGraw Hill, 2010.
10CS 33 LOGIC DESIGN UNIT 4 Clocks, Flip-Flops
1. Find out characteristic equations of J-K flip-flop and D flip-flop.
K flip-flop.
Donald P Leach, Albert Paul Malvino & Goutam Saha: Digital Principles and Applications, 7th Edition,
Flops
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Principles and Applications, 7th Edition,