10/25/2004 EE 42 fall 2004 lecture 23 1

Lecture #23 Synthesis

Next week: Converting gates into circuits

10/25/2004 EE 42 fall 2004 lecture 23 2

Topics

Today:

• Minimization versus other goals (Performance, cost, ….)

• Important properties of logic expressions

• DeMorgan’s Theorem

• Sum-of-Products Implementation

10/25/2004 EE 42 fall 2004 lecture 23 3

Some Important Logical Functions

• “AND”

• “OR”

• “INVERT” or “NOT”

• “not AND” = NAND

• “not OR” = NOR

• exclusive OR = XOR

1)BA when0(only BA )DCBA(or BA

BA BA i.e., differ) BA, when1(only BA

except

C)BA(or BA

)0BA when1ly n(o BA

)1 and when 0ly (o AB BAn

(or ) Anot A

10/25/2004 EE 42 fall 2004 lecture 23 4

These are circuits that accomplish a given logic function such as “OR”. We will shortly see how such circuits are constructed. Each of the basic logic gates has a unique symbol, and there are several additional logic gates that are regarded as important enough to have their own symbol. The set is: AND, OR, NOT, NAND, NOR, and EXCLUSIVE OR.

Logic Gates

A

BC=A·BAND C =

A

BNAND BA

C = NORA

BBA

NOTA A

ORA

BC=A+B

EXCLUSIVE OR

A

BBAC

10/25/2004 EE 42 fall 2004 lecture 23 5

Multiple input gates

• And, Or, NAND, and NOR can be extended to multiple inputs easily

• AND O=(A•B) O=(A•B•C•D…)

• OR O=(A+B) O=(A+B+C+D…)

• Multiple inputs are indicated by just adding input lines to the symbolsAB

O=A·B·CAND NOR

ACBA

CBC

10/25/2004 EE 42 fall 2004 lecture 23 6

Generalized Logic Gates

We have the standard logic gates:

AND NORNOTOR X OR

We can generalize/simplify by using the small circle in any line for a NOT function (instead of showing a NOT gate.)

EXAMPLES:

a)

A

B BC

b) c)

BD

BA a)

BC b)

D Bc)

10/25/2004 EE 42 fall 2004 lecture 23 7

With a combination of logic gates we can construct any logic function. In these two examples we will find the truth table for the circuit.

Logic Circuits

B

A

C

It is helpful to list the intermediate logic values (at the input to the OR gate). Let’s call them X and Y.

X

Y

Now we complete the truth tables for X and Y, and from that for C. (Note that X and Y and finally C = X + Y)BA AB

A B X Y C

0 0 0 0 0

0 1 0 1 1

1 0 1 0 1

1 1 0 0 0

Interestingly, this is the same truth table as the EXCLUSIVE OR

10/25/2004 EE 42 fall 2004 lecture 23 8

Some Useful Theorems

1)

2)

3)

4)

5)

6)

7)

8)

9)

1 AA

0 AA

C)(BACABA

ABC CBA

AB BA

BABA

BABA } de Morgan’s Laws

ABC CBA

AB BA

Each of these can be proved by writing out truth tables

Communicative

Associative

Distributive

Defined from form of truth tables

10/25/2004 EE 42 fall 2004 lecture 23 9

Truth table to show de Morgan’s theorem

A B A+B A•B

0 0 0 0 1 1

0 1 1 0 1 0

1 0 1 0 1 0

1 1 1 1 0 0

BA BA

10/25/2004 EE 42 fall 2004 lecture 23 10

de Morgan’s Theorems

• de Morgan’s Theorems can be used repeatedly on complex logical expressions to put them into one of two standard forms, a sum of products, or a product of sums

BABA

BABA

10/25/2004 EE 42 fall 2004 lecture 23 11

Sum of Products

• In a sum of products standard form, each input appears no more than once in each term:

CBACBA

10/25/2004 EE 42 fall 2004 lecture 23 12

Using these properties we can often simplify expressions

A

B

F

Note that

ABBAF

But factoring:

BA)AB(F So a simpler realization is:

B F

Just a wire !

10/25/2004 EE 42 fall 2004 lecture 23 13

Synthesis

Designing the combinatorial logic circuit

This method uses three different gate types and unless the expression is minimized does not lead to any kind of optimum circuit (its not the fastest, or cheapest, or lowest power way to construct the logic function).

Method1: Certainly we may directly substitute gates for expressions

There are two OR operations and two AND operations plus a NOT operation: Thus using 4 Gates plus a NOT:

AB F

C

)BC(A AB F Example:

10/25/2004 EE 42 fall 2004 lecture 23 14

Synthesis

Method 2: Similarly we may directly construct an expression and thus the circuit from the truth table.

We can construct a sum of products form by taking each row, and then ANDing the variable from each column (or its inverse).

Each of these become a term in an OR expression.

A B F

0 0 0

0 1 1

1 0 0

1 1 1Clearly BA AB F

A

B

F

Obviously this expression and it’s realization are not optimal (F=B), but it shows that a solution can be obtained from simple rules, which can then be optimized for speed, area, or power, etc.

10/25/2004 EE 42 fall 2004 lecture 23 15

Synthesis

• If we look at a sum or products, we see that it can be converted into multiple AND gates each with multiple inputs (some inverting), and a final multiple input OR gate.

• A product of sums can be converted into multiple OR gates each with multiple inputs (some inverting), and a final multiple input AND gate.

10/25/2004 EE 42 fall 2004 lecture 23 16

NOR synthesis

• If we look at each of the terms in a sum of products representation, we can see that we can express them as a sum as well, so the whole expression can be done with only NOR gates

10/25/2004 EE 42 fall 2004 lecture 23 17

NAND Synthesis

Designing the combinatorial logic circuit, cont.

Starting with any SUM-OF-PRODUCTS expression:

Y = ABC+DEF we can rewrite it by “inverting” with De Morgan:

Method 3: NAND GATE SYNTHESIS. We can use De Morgan’s theorem to turn the sum-of-products expression into a form directly implementable entirely with NAND gates. (The NOT function is accomplished by a one-input NAND gate).

The NAND realization, while based on DeMorgan’s theorem, is in fact much simpler: just look at the sum of products expression and use one NAND for each term and one to combine the terms.

(DEF) (ABC)Y

AB

YC

DE

F

Clearly this expression is realized with three NAND gates: one three-input NAND for , one for

, and one two-input gate to combine them:(ABC)

(DEF)

10/25/2004 EE 42 fall 2004 lecture 23 18

Synthesis

Designing the combinatorial logic circuit, cont.

Two Examples of SUM-OF-PRODUCTS expressions:

Method 3: NAND GATE SYNTHESIS (CONTINUED).

BABA X (X-OR function)

A

X

B

(No connection)

CBAABCY

A

Y

B C

We could make the drawings simpler by just using a circle for the NOT function rather than showing a one-input NAND gate

10/25/2004 EE 42 fall 2004 lecture 23 19

CMOS and complementary logic

• When we look at how to implement logic into transistors next week, we will see that we can use the complementary PMOS and NMOS switches in parallel or in series with complementary logic to form high speed, low power logic

10/25/2004 EE 42 fall 2004 lecture 23 20

CMOS NOR

VDD

A

B

A+B

10/25/2004 EE 42 fall 2004 lecture 23 21

CMOS NAND

VDD

A

B

AB