1 TECHNIQUES OF DC CIRCUIT ANALYSIS: Application to operational amplifier circuit SKEE 1023.
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Transcript of 1 TECHNIQUES OF DC CIRCUIT ANALYSIS: Application to operational amplifier circuit SKEE 1023.
1
TECHNIQUES OF DC CIRCUIT ANALYSIS:TECHNIQUES OF DC CIRCUIT ANALYSIS:Application to operational amplifier circuitApplication to operational amplifier circuit
SKEE 1023SKEE 1023
2
Operational amplifier: Integrated circuit consisting several transistors and resistors normally used for analog circuit design.
Inverting input (2)
Non-inverting input (3)
Output (6)
Offset null(5)
Offset null(1)
−
+
Positive supply Vcc+ (7)
Negative supply Vcc− (4)
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Operational amplifier: Integrated circuit consisting several transistors and resistors normally used for analog circuit design.
How can we analyse circuit containing op-amps (consistings of hundreds of transistors and resistors!) using the knowledge that we have so far?
The answer is modeling ! An op-amp can be modeled by a very good voltage
amplifier circuit
Later we’ll see that the analysis is even simplified when we assumed an ideal op-amp.
4
Avd+−
RoRi
−vd
+
v1
v2
v0
vo = Avd = A(v2 - v1)
vo - output voltage with respect to ground
A - open loop gain
v1 - inverting input voltage with respect to ground
v2 - non-inverting input voltage with respect to ground
An op-amp can be modeled by a very good voltage amplifier circuit
5
Avd+−
RoRi
−vd
+
v1
v2
v0
vo = Avd = A(v2 - v1)
vo - output voltage with respect to ground
A - open loop gain
v1 - inverting input voltage with respect to ground
v2 - non-inverting input voltage with respect to ground
An op-amp can be modeled by a very good voltage amplifier circuit
Vcc
-Vcc
vo
vd
Positive saturation
Negative saturation
Vcc/A
-Vcc/A
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Let’s look at a practical circuit: Unity gain buffer
• In drawing op-amp circuits, we normally do not include power supplies
+
−
Vcc+−
Vcc−+
+
vo
−
Vs
+−
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Let’s look at a practical circuit: Unity gain buffer
+
− +
vo
−
Vs
+−
• In drawing op-amp circuits, we normally do not include power supplies
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Let’s look at a practical circuit: Unity gain buffer
Vs
+− Aovin
Ro
+−
Ri
+vin
−
i
Vo = iRo + Aovin
Vin = iRi
For Ri >> Ro
For Ao>>1
Vs = iRi + iRo + AovinUsing KVL, we can write:
Whenever vin 0 , Aovin increases until vin=0 and hence the current cease to flow.
+
− ioo
is
o
RARRV
V
1
1
o
s
o
AV
V1
1
1
1s
o
V
V
+
vo
−
9
Modeling of an ideal op-amp
1. In previous analysis we have assumed Ri>>Ro
In practical op-amps it is true that Ri >> Ro and for ideal op-amp we will assume Ri → and Ro → 0
2. In previous analysis we have assumed Ao>> 1
In practical op-amps it is true that Ao>> 1 and for ideal op-amp we will assume Ao →
As a result of 1 and 2, when analysing an op-amp circuit with feedback, we will assume that:
i. i1 = 0, and i2 = 0
ii. v2 –v1 = 0
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Let’s look back at the buffer circuit using ideal op-amp
Since vo is tied to v1 and in ideal op-amp v1=v2, it is obvious that vo = Vs (as we have seen before)+
−Vs
+−
v2
v1+
vo
−
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Eg.2 (PP 5.2)
Find the closed-loop gain vo/vs. Determine current i when vs = 2V
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In SKEE1023, we will study some of the important op amp circuits:
• Inverting amplifier
• Non-inverting amplifier
• Summing amplifier
• Difference amplifier
You should :
• Know how (not memorize!) to derive the input-output relationship (Gain = vo/vi))
• Able to identify the circuit correctly
OP AMP circuits
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Inverting Amplifier
ii
fo
f
oi vR
Rv
R
v
R
v
00
1
Since i1 = i2, and v1 = v2 = 0
Reverses the polarity of a signal while amplifying it
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Non-inverting Amplifier
if
o
o
f
o
vR
Rv
RRfvi
Rfv
R
vvi
R
vi
1
1
1
1
111
Since i1 = i2, and v1 = v2 = vi
Maintains the polarity of a signal while amplifying it
15
Summing Amplifier
33
22
11
3
3
2
2
1
1
vR
Rv
R
Rv
R
Rv
R
v
R
v
R
v
R
v
fffo
f
o
KCL at node a gives: i = i1 + i2 + i3
And, since v+ = v- = 0
Output is the inverted, scaled sum of the voltages applied to the input
16
Difference Amplifier
234
4 vRR
Rvb
Using voltage division rule,
With va = vb, applying KCL at the inverting input,
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1
R
vv
R
vv obb
Output is proportional to the difference between the two inputs voltages
17
Difference Amplifier
It can be shown that: 11
22
4
31
2
12
1
1v
R
Rv
RRR
RRR
vo
If4
3
2
1
R
R
R
R 12
1
2 vvR
Rvo
Output is proportional to the difference between the two inputs voltages