1

Partitioning

2

Partitioning

• Decomposition of a complex system into smaller subsystems Done hierarchically Partitioning done until each subsystem has

manageable size Each subsystem can be designed independently

• Interconnections between partitions minimized Less hassle interfacing the subsystems Communication between subsystems usually

costly

[©Sherwani]

[Bazargan]

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Example: Partitioning of a Circuit

[©Sherwani]

Input size: 48

Cut 1=4Size 1=15

Cut 2=4Size 2=16 Size 3=17

[Bazargan]

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Hierarchical Partitioning

• Levels of partitioning: System-level partitioning:

Each sub-system can be designed as a single printed circuit board (PCB)

Board-level partitioning:Circuit assigned to a PCB is partitioned into sub-circuitseach fabricated as a VLSI chip

Chip-level partitioning:Circuit assigned to the chip is divided into manageable sub-circuitsNOTE: physically not necessary

[©Sherwani]

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Delay at Different Levels of Partitions

AB

C

PCB1

[©Sherwani]

D

x

10x

20xPCB2

PCB = Printed Circuit Board

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Partitioning: Formal Definition• Input:

Graph or hypergraph Usually with vertex weights (sizes) Usually weighted edges

• Constraints Number of partitions (K-way partitioning) Maximum capacity of each partition

ORmaximum allowable difference between partitions

• Objective Assign nodes to partitions subject to constraints

s.t. the cutsize is minimized

• Tractability Is NP-complete

[Bazargan]

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Some Terminology

• Partitioning: Dividing bigger circuits into a small number of partitions (top down)

• Clustering: cluster small cells into bigger clusters (bottom up).

• Covering / Technology Mapping: Clustering such that each partitions (clusters) have some special structure (e.g., can be implemented by a cell in a cell library).

• k-way Partitioning: Dividing into k partitions.• Bipartitioning: 2-way partitioning.• Bisectioning: Bipartitioning such that the

two partitions have the same size.[Pan]

8

Circuit Representation

• Netlist: Gates: A, B, C, D Nets: {A,B,C}, {B,D}, {C,D}

• Hypergraph: Vertices: A, B, C, D Hyperedges: {A,B,C}, {B,D}, {C,D}

Vertex label: Gate size/area Hyperedge label:

Importance of net (weight)

AB

C D

A

B

C D

[Pan]

9

Circuit Partitioning Formulation

Bi-partitioning formulation:

Minimize interconnections between partitions

•Minimum cut: min c(x, x’)

•Minimum bisection: min c(x, x’) with |x|= |x’|

•Minimum ratio-cut: min c(x, x’) / |x||x’|

X X’

c(X,X’)

[Pan]

10

A Bi-Partitioning Example

Min-cut size=13Min-Bisection size = 300Min-ratio-cut size= 19

a

b

c e

d f

mini-ratio-cut min-bisection

min-cut 9

10

100

100 100100100

100

4

Ratio-cut helps to identify natural clusters

[Pan]

11

Circuit Partitioning Formulation (Cont’d)

General multi-way partitioning formulation:

Partitioning a network N into N1, N2, …, Nk such that

• Each partition has an area constraint

• Each partition has an I/O constraint

Minimize the total interconnection:

iNv

iAva )(

iii INNNc ),(

),( iN

i NNNci

[Pan]

12

Partitioning Algorithms

•Iterative partitioning algorithms

•Spectral based partitioning algorithms

•Net partitioning vs. module partitioning

•Multi-way partitioning

•Multi-level partitioning

•Further study in partitioning techniques (timing-driven …)

[Pan]

13

Kernighan-Lin (KL) Algorithm• On non-weighted graphs• An iterative improvement technique• A two-way (bisection) partitioning algorithm• The partitions must be balanced (of equal

size)• Iterate as long as the cutsize improves:

Find a pair of vertices that result in the largest decrease in cutsize if exchanged

Exchange the two vertices (potential move) “Lock” the vertices If no improvement possible, and

still some vertices unlocked, thenexchange vertices that result in smallest increase in cutsizeW. Kernighan and S. Lin, Bell System Technical Journal, 1970.

[Bazargan]

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Kernighan-Lin (KL) Algorithm• Initialize

Bipartition G into V1 and V2, s.t., |V1| = |V2| 1 n = |V|

• Repeat for i=1 to n/2

o Find a pair of unlocked vertices vai V1 and vbi V2 whoseexchange makes the largest decrease or smallest increasein cut-cost

o Mark vai and vbi as locked

o Store the gain gi.

Find k, s.t. i=1..k gi=Gaink is maximized If Gaink > 0 then

move va1,...,vak from V1 to V2 and vb1,...,vbk from V2 to V1.

• Until Gaink 0[Bazargan]

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Kernighan-Lin (KL) Example

a

b

c

d

e

f

g

h

4 { a, e } -2 5

0 -- 0 5

1 { d, g } 3 2

2 { c, f } 1 1

3 { b, h } -2 3

Step No. Vertex Pair Gain Cut-cost

[©Sarrafzadeh]

[Bazargan]

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Kernighan-Lin (KL) : Analysis• Time complexity?

Inner (for) loopo Iterates n/2 timeso Iteration 1: (n/2) x (n/2)o Iteration i: (n/2 – i + 1)2.

Passes? Usually independent of n O(n3) per pass

• Drawbacks? Local optimum Balanced partitions only No weight for the vertices High time complexity Hyper-edges? Weighted edges?

[Bazargan]

Replace vertex of weight with vertices of size 1

Add “dummy” nodes

17

Internalcost

Gain Calculation

GAGB

a1a2

an

ai

a3

a5 a6

a4

b2

bj

b4 b3

b1

b6

b7

b5

Ax Byybxbbbb

aaa

jjjjj

iii

CCIED

IED Likewise,

Ax Byybxbbbb

aaa

jjjjj

iii

CCIED

IED Likewise,

[©Kang]

Externalcost

By

yaaAx

xaa iiiiCECI ,

By

yaaAx

xaa iiiiCECI ,

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• Lemma: Consider any ai A, bj B.If ai, bj are interchanged, the gain is

• Proof: Total cost before interchange (T) between A and B

Total cost after interchange (T’) between A and B

Therefore

Gain Calculation (cont.)

jiji baba CDDg 2 jiji baba CDDg 2

[©Kang]

others) allfor cost (jiji baba CEET

others) allfor cost (jiji baba CIIT

jijjii babbaa CIEIETTg 2iaD

jbD

[Bazargan]

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Gain Calculation (cont.)• Lemma:

Let Dx’, Dy’ be the new D values for elements of A - {ai} and B - {bj}. Then after interchanging ai & bj,

• Proof: The edge x-ai changed from internal in Dx to external in Dx’

The edge y-bj changed from internal in Dx to external in Dx’

The x-bj edge changed from external to internal

The y-ai edge changed from external to internal

• More clarification in the next two slides

}{ , 22

}{ , 22

jyaybyy

ixbxaxx

bByCCDD

aAxCCDD

ij

ji

}{ , 22

}{ , 22

jyaybyy

ixbxaxx

bByCCDD

aAxCCDD

ij

ji

[©Kang]

[Bazargan]

Dx = Ex - Ix

20

Clarification of the Lemma

ai

bj

x

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Clarification of the Lemma (cont.)• Decompose Ix and Ex to separate edges from ai and

bj:

• Write the equations before the move

• ... And after the move

ji xbxxax CECI

ji

ij

xbxa

xaxbxxx

CC

CCIED

)()(

ji

ji

xbxax

xbxax

CCD

CCD

22

ij xaxxbx CECI

[Bazargan]

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Example: KL

• Step 1 - InitializationA = {2, 3, 4}, B = {1, 5, 6}A’ = A = {2, 3, 4}, B’ = B = {1, 5, 6}

• Step 2 - Compute D valuesD1 = E1 - I1 = 1-0 = +1

D2 = E2 - I2 = 1-2 = -1

D3 = E3 - I3 = 0-1 = -1

D4 = E4 - I4 = 2-1 = +1

D5 = E5 - I5 = 1-1 = +0

D6 = E6 - I6 = 1-1 = +0 [©Kang]

5

6

4 2 1

3

Initial partition

45

6 2

3

1

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Example: KL (cont.) Step 3 - compute gains

g21 = D2 + D1 - 2C21 = (-1) + (+1) - 2(1) = -2

g25 = D2 + D5 - 2C25 = (-1) + (+0) - 2(0) = -1

g26 = D2 + D6 - 2C26 = (-1) + (+0) - 2(0) = -1

g31 = D3 + D1 - 2C31 = (-1) + (+1) - 2(0) = 0

g35 = D3 + D5 - 2C35 = (-1) + (0) - 2(0) = -1

g36 = D3 + D6 - 2C36 = (-1) + (0) - 2(0) = -1

g41 = D4 + D1 - 2C41 = (+1) + (+1) - 2(0) = +2

g45 = D4 + D5 - 2C45 = (+1) + (+0) - 2(+1) = -1

g46 = D4 + D6 - 2C46 = (+1) + (+0) - 2(+1) = -1

The largest g value is g41 = +2 interchange 4 and 1 (a1, b1) = (4, 1)

A’ = A’ - {4} = {2, 3}B’ = B’ - {1} = {5, 6} both not empty

[©Kang]

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Example: KL (cont.)• Step 4 - update D values of node connected to vertices (4,

1)D2’ = D2 + 2C24 - 2C21 = (-1) + 2(+1) - 2(+1) = -1D5’ = D5 + 2C51 - 2C54 = +0 + 2(0) - 2(+1) = -2D6’ = D6 + 2C61 - 2C64 = +0 + 2(0) - 2(+1) = -2

• Assign Di = Di’, repeat step 3 :g25 = D2 + D5 - 2C25 = -1 - 2 - 2(0) = -3g26 = D2 + D6 - 2C26 = -1 - 2 - 2(0) = -3g35 = D3 + D5 - 2C35 = -1 - 2 - 2(0) = -3g36 = D3 + D6 - 2C36 = -1 - 2 - 2(0) = -3

• All values are equal;arbitrarily choose g36 = -3 (a2, b2) = (3, 6)A’ = A’ - {3} = {2}, B’ = B’ - {6} = {5}

New D values are:D2’ = D2 + 2C23 - 2C26 = -1 + 2(1) - 2(0) = +1D5’ = D5 + 2C56 - 2C53 = -2 + 2(1) - 2(0) = +0

• New gain with D2 D2’, D5 D5’ g25 = D2 + D5 - 2C52 = +1 + 0 - 2(0) = +1 (a3, b3) = (2, 5)

[©Kang]

[Bazargan]

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Example: KL (cont.)

• Step 5 - Determine the # ofmoves to takeg1 = +2

g1 + g2 = +2 - 3 = -1

g1 + g2 + g3 = +2 - 3 + 1 = 0

• The value of k for max G is 1X = {a1} = {4}, Y = {b1} = {1}

• Move X to B, Y to A A = {1, 2, 3}, B = {4, 5, 6}• Repeat the whole process:

• • • • •

• The final solution is A = {1, 2, 3}, B = {4, 5, 6}

5

6

4 2 1

3

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Fiduccia-Mattheyses (FM) Algorithm

• Modified version of KL• A single vertex is moved across the cut

in a single move Unbalanced partitions

• Vertices are weighted• Concept of cutsize extended to

hypergraphs• Special data structure to improve time

complexity to O(n2) per pass (Main feature)

• Can be extended to multi-way partitioningC. M. Fiduccia and R. M. Mattheyses, 19th DAC, 1982.

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The FM Algorithm: Data Structure

-pmax

+pmax

+pmax

-pmax

2nd Partition

Ist Partition

List of freevertices

[©Sherwani]

va1 va2

vb1 vb2

Vertex

1 2 . . . . . . . . . n

Vertex

1 2 n. . . . . . . . .

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The FM Algorithm: Data Structure• pmax

Maximum gain pmax = dmax . wmax, where

dmax = max degree of a vertex (# edges incident to it)wmax is the maximum edge weight

• -pmax .. pmax array Index i is a pointer to the list of unlocked

vertices with gain i.

• Limit on size of partition A maximum defined for the sum of vertex

weights in a partition(alternatively, the maximum ratio of partition sizes might be defined)

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The FM Algorithm• Initialize

Start with a balance partition A, B of G(can be done by sorting vertex weights in decreasing order, placing them in A and B alternately)

• Iterations Similar to KL A vertex cannot move if violates the balance

condition Choosing the node to move:

pick the max gain in the partitions Moves are tentative (similar to KL) When no moves possible or no more unlocked

vertices available, the pass ends When no move can be made in a pass, the algorithm

terminates

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For multi terminal nets, K-L may decompose them into many 2-terminal nets, but not efficient!

Consider this example: If A = {1, 2, 3} B = {4, 5, 6}, graph model shows

the cutsize = 4 but in the real circuit, only 3 wires cut

Reducing the number of nets cut is more realistic than reducing the number of edges cut

Why Hyperedges?

[©Kang]

1

2

3

5

6

4

m

q

k

p

1

3

2

4

5

6

m

m

m

q

q

q

k

p

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Hyperedge to Edge Conversion

• A hyperedge can be converted to a “clique”.

• w=? w=2/(n-1) has been used, also w=2/n w=4/(n2 – mod(n,2))

for n=3, w=4/(9-1)=0.5

• Always necessary to convert hyper-edge to edge?

3

2

4

w

w

w

3 1

2

4

“Real” cut=1 “net” cut=2w

[©Keutzer][Bazargan]

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FM Gain Calculation: Direct Hyperedge Calc

• FM is able to calculate gain directly using hyperedges ( not necessary to convert hyperedges to edges)

• Definition: Given a partition (A|B), we define the terminal

distribution of n as an ordered pair of integers (A(n),B(n)), which represents the number of cells net n has in blocks A and B respectively (how fast can be computed?)

Net is critical if there exists a cell on it such that if it were moved it would change the net’s cut state (whether it is cut or not).

Net is critical if A(n)=0,1 or B(n)=0,1[©Keutzer]

[Bazargan]

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FM Gain Calc: Direct Hyperedge Calc (cont.)• Gain of cell depends only on its critical nets:

If a net is not critical, its cutstate cannot be affected by the move

A net which is not critical either before or after a move cannot influence the gains of its cells

• Let F be the “from” partition of cell i and T the “to”:

• g(i) = FS(i) - TE(i), where: FS(i) = # of nets which have cell i as their only F

cell TE(i) = # of nets connected to i and have an

empty T side

[©Keutzer]

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Hyperedge Gain Calculation Example

• If node “a” moves to the other partition…

a

b

c

de

f

g

i

j

kl

mn

h1

h3

h2

h4

[Bazargan]

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Subgraph Replication to Reduce Cutsize

• Vertices are replicated to improve cutsize• Good results if limited number of

components replicated

[©Sherwani]

A’

B’

A

B

A’A

BB’

C. Kring and A. R. Newton, ICCAD, 1991.[Bazargan]

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FM Partitioning:

-1

-2

-1

1

0

0

0

2

0

0

1

-1

-1

-2

- each object is assigned a gain- objects are put into a sorted gain list- the object with the highest gain from the larger of the two sides is selected and moved.- the moved object is "locked"- gains of "touched" objects are recomputed- gain lists are resorted

Object Gain: The amount of change in cut crossings that will occur if an object is moved from its current partition into the other partition

Moves are made based on object gain.

[Pan]

37

-1

-2

-1

1

0

0

0

2

0

0

1

-1

-1

-2

FM Partitioning:

[Pan]

38

-1

-2

-1

1

0

-2

-20

0

1

-1

-1

-2

-2

[Pan]

39

-1

-2

-1

1

0

-2

-20

0

1

-1

-1

-2

-2

[Pan]

40

-1

-2

-11

0

-2

-20

0

1

-1

-1

-2

-2

[Pan]

41

-1

-2

1 -1

0

-2

-20

-2

-1

-1

-1

-2

-2

[Pan]

42

-1

-2

1 -1

0

-2

-2 0

-2

-1

-1

-1

-2

-2

[Pan]

43

-1

-2

1 -1

0

-2

-20

-2

-1

-1

-1

-2

-2

[Pan]

44

-1

-2

1 -1

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

45

-1

-2

1

-1

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

46

-1

-2

1

-1

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

47

-1

-2

-1

-3

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

48

-1

-2

-1

-3

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

49

-1

-2

-1

-3

-2

-2

-2

0

-2

-1

1

-1

-2

-2

[Pan]

50

-1

-2

-1

-3

-2

-2

-2

-2

-2

-1

-1

-1

-2

-2

[Pan]

51

Time Complexity of FM

• For each pass, Constant time to find the best vertex to move. After each move, time to update gain buckets is

proportional to degree of vertex moved. Total time is O(p), where p is total number of

pins

• Number of passes is usually small.

[Pan]

52

Extension by Krishnamurthy

“An Improved Min-Cut Algorithm for Partitioning VLSI Networks”,

IEEE Trans. Computer,33(5):438-446, 1984.

[Pan]

53

Tie-Breaking Strategy

• For each vertex, instead of having a gain bucket, a gain vector is used.

• Gain vector is a sequence of potential gain values corresponding to numbers of possible moves into the future.

• Therefore, rth entry looks r moves ahead.• Time complexity is O(pr), where r is max # of

look-ahead moves stored in gain vector.

• If ties still occur, some researchers observe that LIFO order improves solution quality.

[Pan]

54

Ratio Cut Objective by Wei and Cheng

“Towards Efficient Hierarchical Designs by Ratio Cut Partitioning”,

ICCAD, pages 1:298-301, 1989.

[Pan]

55

Ratio Cut Objective

• It is not desirable to have some pre-defined ratio on the partition sizes.

• Wei and Cheng proposed the Ratio Cut objective.

• Try to locate natural clusters in circuit and force the partitions to be of similar sizes at the same time.

• Ratio Cut RXY = CXY/(|X| x |Y|)

• A heuristic based on FM was proposed.

[Pan]

56

Sanchis Algorithm

“Multiple-way Network Partitioning”,IEEE Trans. Computers,

38(1):62-81, 1989.

[Pan]

57

Multi-Way Partitioning

• Dividing into more than 2 partitions.• Algorithm by extending the idea of FM +

Krishnamurthy.

[Pan]

Simulated annealing

• See text, section 2.4.4

58

59

Paper by Johnson, Aragon, McGeoch and Schevon on Bisectioning using SA

“Optimization by Simulated Annealing:An Experimental Evaluation Part I,

Graph Partitioning”,Operations Research, 37:865-892, 1989.

[Pan]

60

The Work of Johnson, et al.

• An extensive empirical study of Simulated Annealing versus Iterative Improvement Approaches.

• Conclusion: SA is a competitive approach, getting better solutions than KL for random graphs.

Remarks: Netlists are not random graphs, but sparse

graphs with local structure. SA is too slow. So KL/FM variants are still most

popular. Multiple runs of KL/FM variants with random

initial solutions may be preferable to SA.[Pan]

Buffon’s needle• Given

A set of parallel lines at distance 1 A needle of length 1 Drop the needle, and find the probability that it intersects a

line Can show that this probability is 2/

• Generate multiple trials to estimate this probability Use it to calculate the value of Google this to find java applets

• Uses probabilistic methods to solve a deterministic problem: this is a well-established idea

61

62

Another probabilistic experiment: random partitions

• For any partitioning problem:

• Suppose solutions are picked randomly.• If |G|/|A| = r, Pr(at least 1 good in 5/r trials)

= 1-(1-r)5/r

• If |G|/|A| = 0.001, Pr(at least 1 good in 5000 trials) = 1-(1-0.001)5000 = 0.9933

G

All solutions (State space)

Good solutionsA

[Pan]

63

Adding Randomness to KL/FM• In fact, # of good states are extremely few.

Therefore, r is extremely small.• Need extremely long time if just picking

states randomly (without doing KL/FM).• Running KL/FM variants several times with

random initial solutions is a good idea.

Cut

V

alue

Partitions

Good Initial States

Good States

[Pan]

64

Some Other Approaches

• KL/FM-SA Hybrid: Use KL/FM variant to find a good initial solution for SA, then improve that solution by SA at low temperature.

• Tabu Search• Genetic Algorithm• Spectral Methods (finding Eigenvectors)• Network Flows• Quadratic Programming• ......

[Pan]

65

Clustering• Clustering

Bottom-up process Merge heavily connected

components into clusters Each cluster will be a new

“node” “Hide” internal connections (i.e.,

connecting nodes within a cluster)

“Merge” two edges incident to an external vertex, connecting it to two nodes in a cluster

• Can be a preprocessing step before partitioning Each cluster treated as a single

node

3

416

25

64

3

1

1

1

3

46

1,2

5

43

12

3,46

1,2

5

3

12

[Bazargan]

66

Multilevel Hypergraph Partitioning: Applications in VLSI Domain

G. Karypis, R. Aggarwal, V. Kumar and S. Shekhar,DAC 1997.

[Pan]

67

Multi-Level Partitioning

[Pan]

68

Coarsening Phase

• Edge Coarsening

• Hyper-edge Coarsening (HEC)

• Modified Hyperedge Coarsening (MHEC)

[Pan]

69

Uncoarsening and Refinement Phase

1. FM:• Based on FM with two simplifications:

Limit number of passes to 2 Early-Exit FM (FM-EE), stop each pass if k vertex moves

do not improve the cut

2. HER (Hyperedge Refinement)• Move a group of vertices between partitions so

that an entire hyperedge is removed from the cut

[Pan]

70

hMETIS Algorithm

• Software implementation available for free download from Web

• hMETIS-EE20

20 random initial partitons with 10 runs using HEC for coarsening with 10 runs using MHEC for coarsening FM-EE for refinement

• hMETIS-FM20

20 random initial partitons with 10 runs using HEC for coarsening with 10 runs using MHEC for coarsening FM for refinement

[Pan]

71

Experimental Results

• Compared with five previous algorithms

• hMETIS-EE20 is: 4.1% to 21.4% better On average 0.5% better than the best of the 5

algorithms Roughly 1 to 15 times faster

• hMETIS-FM20 is: On average 1.1% better than hMETIS-EE20

Improves the best-known bisections for 9 out of 23 test circuits

Twice as slow as hMETIS-EE20

[Pan]