1

NTUplace: A Partitioning Based Placement Algorithm for Large-Scale

Designs

Tung-Chieh Chen1, Tien-Chang Hsu1, Zhe-Wei Jiang1, and Yao-Wen Chang1,2

Graduate Institute of Electronics Engineering1

Department of Electrical Engineering2 National Taiwan University

Taipei, TaiwanApril 6, 2005

2National Taiwan University

Outline

․ Introduction

․ Global placement HPWL modeling with min-cut Whitespace management Look-ahead partitioning

․ Legalization

․ Detailed placement Matching based detailed placement

․ Results

3National Taiwan University

Introduction

․ NTUplace is based on the min-cut partitioning technique.

․ Algorithm:

Global Placement

Legalization

Detailed Placement

Wirelength modeling with min-cutWhitespace managementLook-ahead partitioning

Matching based detailed placement

4National Taiwan University

HPWL Modeling with Min-Cut

․ The HPWL (half-perimeter wirelength) is exactly modeled with the min-cut objective.

Finding the min-cut is equivalent to finding the minimum HPWL.

․ The idea is similar to the Bounding Box aware Terminal Propagation (BBTP) in the TheTo placer:

Selvakkumaran and Karypis, Technical Report 04-040, Univ. of Minnesota. Oct. 2004.

․ They use 7 cases to discuss the HPWL modeling.

․ We derive a unified method for the modeling.

․ Our method can be applied to the diagonal-bin repartitioning.

TheTo might need to consider tens of cases.

5National Taiwan University

Net-Weight Assignment (1/2)

․ For each net, we compute three HPWL values.․ Consider the case for a net with 2 fixed pins and 2 movable

cells, and the x-range of the 2 pins is within that of the 2 cells and the center of the left partition is closer to the x-range

w1: the wirelength when the 2 cells are at the left side w2: the wirelength when the 2 cells are at the right side, w12: the wirelength when the 2 cells are at different sides. Here, w12 > w2 > w1

2 cells are at the left side.

2 cells are at the right side.

2 cells are at different side.

Fixed pin Movable cellHPWL = w1 HPWL = w2 HPWL = w12

(Fixed pin)

X-range

6National Taiwan University

Net-Weight Assignment (2/2)

․ Introduce a partitioning graph (hypergraph) and two fixed nodes to represent the two sides.

․ Add two hyperedges into the graph. Since w2 > w1, assign the weight of the hyperedge e1

between the cells and the left fixed node be (w2-w1). Assign the weight of the hyperedge e2 between the two

cells be (w12-w2).․ Partition the resulting hypergraph to decide the

cell/node partition.

weight(e1)= (w2-w1)

weight(e2)= (w12-w2)

Left fixed nodeRight fixed node

Movable node

Movable node

7National Taiwan University

Three Possible Partitioning Results

Movable node Fixed node

e1 e2 e2e1

e1

e2

weight(e1)= (w2-w1)

weight(e2)= (w12-w2)

Left fixed node Right fixed node

Movable node

Movable node

21 3

8National Taiwan University

Relationship Between HPWL and Cutsize

ncut = 0 ncut = weight(e1) = (w2-w1)

ncut = weight(e1)+ weight(e2) = (w12-w2) + (w2-w1) = (w12-w1)

HPWL = w1

= w1 + ncut

HPWL = w2

= w1 + ncut

HPWL = w12

= w1 + ncut

e1 e2 e2e1

e1

e2

All three cases: HPWL = w1 + ncut

1 2 3

9National Taiwan University

․ Theorem: HPWL = w1 + ncut.

․ Then, we have

Finding the minimum HPWL is equivalent to finding the min-cut.

Relationship Between HPWL and Cutsize

icutiicutii nwnwHPWL ,,1,,1 min)(minmin(Constant)

10National Taiwan University

Whitespace Management (1/2)

․ Traditional min-cut placers uniformly distribute whitespace and tend to produce excessive wirelength when the whitespace is large.

․ Adya, Markov, Villarrubia use filler (dummy) cells to control the whitespace allocation [ICCAD-03].

Add dummy cells to increase the utilization. Whitespace is distributed according to the dummy cell locations.

However, their method tend to increase the number of cells, leading to longer running time and larger memory usage.

11National Taiwan University

․ We directly control the balance criteria during partitioning using the available free space.

․ Relaxing the balance criteria leads to smaller cutsize and thus smaller wirelength.

․ The balance criterion satisfies that the utilization of each partition is less than or equal to 1.

․ The criterion is fed into the partitioner to allocate whitespace.

Whitespace Management (2/2)

Both util. < 1

Block Area

Left util. = 1,right util. < 1

Block Area

Left util. < 1,right util. = 1

Uniform whitespace distribution

Left partition Utilization = 1.0

Right partitionUtilization = 1.0

12National Taiwan University

Look-Ahead Partitioning․ Simplify the idea in Cong et al., “Fast floorplanning by

look-ahead enabled recursive bipartitioning,” ASPDAC-2005.

․ Use the first-fit bin-packing heuristic to check if the subpartition can be legalized. Increase the chance of legalizing macro blocks.

․ If the subpartition cannot be legalized, we move the cutline and redo the partitioning.

Legalization Fails

Re-partition

Legalization Succeeds

13National Taiwan University

4 1

Legalization

․ Place all cells in the rows to obtain a feasible solution.

1) Place cells into their nearest rows.

2) Sort all standard cells according to their sizes, from the largest to the smallest.

3) Assign the x-coordinates for all cells according to the sorted order. If overlap occurs, we will find a nearest empty slot to place the cell.

2 35

Place cells into nearest rows

2 314 5

Sort the cells

Place cells one-by-one

14National Taiwan University

․ Is based on cell location assignment (matching). Each cell has different costs at

different locations. Minimize total cost: O(n3) time for n cells Is better than O(n!) time for a branch & bound

(BB) detailed placer Can use a much larger window (> 64 cells)

Detailed Placement

A B C

1 2 3

15National Taiwan University

Old Results

․ Old results in the ISPD-05 proceedings.

Circuit Objects Nets Final HPWL (um)

Global Placement Runtime

Total Runtime*

adaptec1 211,447 221,142 9.305 e7 4 min 11 min

adaptec3 451,650 466,758 2.731 e8 15 min 28 min*On a Pentium 4 3.2GHz PC

16National Taiwan University

New Results from the Enhanced Methods

․ Enhance our placer with matching based detailed placement and other schemes (e.g., repartitioning).

․ Improve the published HPWL by 10%.

Circuit Published HPWL

Final

HPWL

Published

Runtime

Final

Runtime

adaptec1 9.305 e7 8.472 e7 11 min 50 min

adaptec3 2.731 e8 2.436 e8 28 min 160 min

Comp. 1.00 0.90 1.00 5.13

17National Taiwan University

Thank you for your attention!