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Low Power Bus Encoding Technique Considering Coupling

Effects

Hsin-Wei Lin

H.W. Lin is with the Graduate Institute of Integrated Circuit Design, National Changhua University of Education, Taiwan.

(e-mail: m94662001@mail.ncue.edu.tw)

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Outline

Introduction Proposed Scheme Experimental Results Conclusion

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Introduction Increased coupling effect between interconnects

not only aggravate the power consumption but also deteriorates the signal integrity.

The power consumption of bus depends on several factors such as: switching activity wire aspect and spacing inter-wire capacitances power supply voltage

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Introduction (con.)

With shrinking feature sizes, the wire aspect is increasing and the spacing between the bus lines is reducing.

In order to reduce the power consumption, many different bus encoding techniques have been presented in the literature. Bus-Invert EXODUS EXNORA

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Introduction (con.) Lowering transition-switching activity on the

bit lines of bus leads to a significant reduction the bus power consumption.

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Bus model with self- and coupling-capacitances

Cs

Cc

Bus Lines

Cs Cs Cs

Cc Cc Cc Cc

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Switching activity Switching activity is described as the transition b

etween different logic levels which divides into self-transition (αs) and coupling-transition (αc ).

Correlated switching is defined as the neighbouring bus lines switch simultaneously in opposite directions.

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Example of transition types

Line 1

Line 2

Line 3

Line 4

Line 1

Line 2

Line 3

Line 4

Line 1

Line 2

Line 3

Line 4

silent line

silent line

Cca1

Cca2

Cca3

Ccb1

Ccb2

Ccb3

Ccc1

Ccc2

Ccc3

Effective capacitance increases almost twice due to Miller effect

correlated switching

correlated switching

type A type B type C

correlated switching

The ratio of total effective coupling capacitance is 1:2:4 in type A, type B and type C respectively.

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Proposed Scheme

The encoding technique utilizes XOR and XNOR four kinds of combinations conversion of data. D(t) ︰ data on a bus at cycle time t E[D(t)] ︰ encoded data of D(t)

Dn(t) is divided into subsets such that each subset consists of D4(t).

and are independently encoded. tD l2 tDm

2

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Encoding rules for 4-bit subset

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Encoding example for 4-bit subset Current data: E[D(t)] = 1011 Next data: D(t+1) = 0 00 0

Encoded data: E[D(t+1)]= 1011

Encoding rule: XOR-XOR

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Encoding example for 4-bit subset Current data: E[D(t)] = 1011 Next data: D(t+1) = 0 10 0

Encoded data: E[D(t+1)]= 0011

Encoding rule: XNOR-XOR

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Encoding examples for 4-bit subset

Next data:D(t+1) Encoding rule

ExampleCurrent data: E[D(t)]=1011

Unencoded data:D(t+1)

Encoded data: E[D(t+1)]

X00X XOR-XOR

0000 1011

0001 1010

1000 0011

1001 0010

X01X XOR-XNOR

0010 1010

0011 1011

1010 0010

1011 0011

X10X XNOR-XOR

0100 0011

0101 0010

1100 1011

1101 1010

X11X XNOR-XNOR

0110 0010

0111 0011

1110 1010

1111 1011

Number of correlated switchings 8 0

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Illustration for 8-bit encoding data lines D0

D1

Cc_Uncoded

Cc_Uncoded

D2

D3

Cc_Uncoded

Cc_Uncoded

D4

D5

Cc_Uncoded

Cc_Uncoded

D6

D7

Cc_Uncoded

D0

D1

Cc_Encoded

Cc_Encoded

D2

D3

Cc_Encoded

Cc_Encoded

D4

D5

Cc_Encoded

Cc_Encoded

D6

D7

Cc_Encoded

Coupling EffectFree Subset

Coupling EffectFree Subset

The rationale for encoding type selection is to silence the middle two data lines of each subset.

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Receiving end Restore original data by control line at the

receiving of the bus.

The original data can be retrieved by simply applying the same type of decoding, because of the XOR property that

, which is also the case for XNOR.

111 tDtDEtDEtDtDEtDE

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Schematic of codec circuit for 4-bit data lines

D0_prev

D0

D1

D1

D2 Control line

Data Bus D Q

Clk

D Q

Clk

D Q

Clk

DQ

Clk

Bus Driver

Clk_encoder Clk_decoder

EncoderDecoder

D3

Control Bus

D0

D3

E0 E0

S0

S1

Receive blockTransmission block

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Experimental Results

Assumed that the activity on a typical data bus was randomly and uniformly distributed as in the statistical power estimation method.

There are 22N possible transitions and N-bit changes per transition, there is a total of N×22N possible bit changes for N-bit bus lines.

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Power dissipation

The average power dissipated on the bus is given by:

︰ average power ︰ number of transitions per bus cycle ︰ parasitic capacitances of the bus lines ︰ supply voltage ︰ clock frequency

avgP

fVCCP ddccssavg 2

2

1

fddV

cs CC、 cs 、

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Number of switching activities in 4-bit data lines

Item4-bit data lines

Unencoded Bus-Invert EXODUS EXNORA Our Scheme

Total combinations 1024 1024 1024 1024 1024

Number of self-transitions

512( 1.6 )

320( 1 )

320( 1 )

320( 1 )

256( 0.8 )

Number of silent lines

512( 0.73 )

704( 1 )

704( 1 )

704( 1 )

768( 1.09 )

Number of coupling-transitions

384( 1 )

384( 1 )

384( 1 )

400( 1 )

256( 0.67 )

Number of correlated switchings

96( 4 )

24( 1 )

16( 0.67 )

0( 0 )

0( 0 )

Power dissipation 1.6 1 0.93 0.84 0.54

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Number of switching activities in 8-bit data lines

Item8-bit data lines

Unencoded Bus-Invert EXODUS EXNORA Our Scheme

Total combinations 524288 524288 524288 524288 524288

Number ofself-transitions

262144( 1.6 )

163840( 1 )

163840( 1 )

163840( 1 )

131072(0.8)

Number ofsilent lines

262144( 0.73 )

360448( 1 )

360448( 1 )

360448( 1 )

393216(1.09)

Number ofcoupling-transitions

229376( 1 .02)

224768( 1 )

229376( 1.02 )

230272( 1.02 )

163840( 0.73 )

Number ofcorrelated switchings

57344(3.7)

15488( 1 )

12288( 0.79 )

5920(0.1)

8192(0.53)

Power dissipation 1.6 1 0.97 0.89 0.69

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Conclusion The propose a bus encoding scheme for reducin

g switching activity and power dissipation.

It eliminates correlated switchings in each subset of 4-bit data lines and minimizes the correlated switchings between the neighbouring subsets.

It also minimizes number of self-transitions compared to other proposed schemes and reduces the power dissipation by 46% compared to Bus-Invert method.

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Thanks for your listening !