1 Japan NC & JEITA/EDA-TC Update IEC/TC93/WG2 on 5-9 September 2005 in Nara, Japan EDA-TSC/STD-TSC...
-
Upload
meghan-dalton -
Category
Documents
-
view
213 -
download
0
Transcript of 1 Japan NC & JEITA/EDA-TC Update IEC/TC93/WG2 on 5-9 September 2005 in Nara, Japan EDA-TSC/STD-TSC...
1
Japan NC & JEITA/EDA-TC Japan NC & JEITA/EDA-TC UpdateUpdate
IEC/TC93/WG2IEC/TC93/WG2on 5-9 September 2005 in Nara, Japan
EDA-TSC/STD-TSC in JEITAWG2 in TC93-JP
RenesasYoshio Okamura
JEITA Structure and Management
EDA-TC Current major activities
STD-TSC and TC93/WG2 activities
SystemC-TG, SytemVerilog-TG Activities
DASC-”EDA-TC” Collaboration Structure
- Outline -
JEITA : Japan Electronics and Information Technology Industries Association
( URL http://www.jeita.or.jp)
What Is JEITA
526 prominent526 prominent
Japanese electronics and IT-related companies
14 boards14 boards represented by member companies
To promote the healthy manufacturing, international trade and consumption of electronics products and components in order to contribute to the overall development of the electronics and IT industries, and thereby further Japan's economic development and cultural prosperity.
To foster a digital network society for the 21st century, in which IT advancement brings fulfillment and a higher quality of life to everyone.
Mission
Objective
Objective & Mission of JEITA
JEITA Structure and Management
JEITA Information Systems BoardPersonal Informatization BoardDigital Home Appliances BoardIndustrial Equipment and Social Systems BoardDisplay Devices BoardElectronic Components Board
Semiconductor Board(JEITA-JSIA):45comaniesSemiconductor Industrial Affairs CommitteeSemiconductor International Affairs Committee
Semiconductor Technology CommitteeMarketing CommitteeRoad Map Committee
EDA Technical Committee(EDA-TC):20companies Chair: Y.Okamura(Renesas)
EDA Technical Committee was formed to handle EDIF 2.0 standard as one of technical committees in JEITA (former EIAJ) in April 1990 .
EDA-TC Current major activities
2. Study Groups New!■PDS (Physical Design Standardization) Study Group
Chair: T.Sato(Renesas) - To investigate standardization for design methodologies, libraries, and their benchmarks in nanometer-era physical design
1. Standardization Technical Subcommittee(STD-TSC)
- To contribute EDA related standardization efforts by supporting EDA standards related groups and organizations such as Accellera, IEEE/IEEE-SA, IEEE/DASC, IEC/TC93, OSCI...
3. EDSFair Executive Committee Chair : M.Nadaoka(Oki) - To organize and support events to promote and encourageEDA technology and standards. To sponsor the EDS Fair exhibition show
■SystemC Task Group Chair: T.Hasegawa(Fujitsu)
■SystemVerilog Task Group Chair: K.Hamaguchi(Matsushita)
Chair : T.Aikyo(Fujitsu)
■Schedule : Thursday, January 26, & Friday, January 27, 2006 10:00 am to 6:00 pm■Location : Pacifico Yokohama, JAPAN■Constituent part : Exhibition with suites, Exhibitor's seminar, FPGA/PLD Design Conference■Simultaneous event Asia and South Pacific Design Automation Conference (ASP-DAC) 2006 System Design Forum 2006■Sponsor :JEITA■Cooperation : Electronic Design Automation Consortium (EDAC)■Support : Ministry of Economy, Trade and Industry of Japan (METI) Embassy of United States of America in Japan
Outline of EDSFair 2006
View of Pacifico Yokohama
Comparison of DAC and EDSFair
DAC 2005 Jun. 12-17 Anaheim , U.S ~10,000EDSFair 2005 Jan. 27-28 Yokohama , JPN 11,153
Chair: T.Aikyo(Fujitsu)
Members: Experts from Academia, Semiconductor industries and EDA industries
Activities : •To contribute EDA standardization in cooperation with standard organizations
Accellera, OSCIIEEE/DASC, IEEE-SA
•Joined the balloting group for IEEE P1800 & IEEE P1666
•Hosted Meeting of IEC/TC93 Design Automation
on 5 -9 September 2005 in Nara, Japan
STD-TSC and TC93/WG2 Activities
SystemC-TG, SytemVerilog-TG Activities
SystemC-TG - Participating IEEE P1666-WG as a voting member. - So far, submitted over 50 issues for the previous version of the LRM. - Reviewed “IEEE P1666™/D2.1” document and submitted 19 modify requests. All requests are accepted. Ready for the final ballot. - Creating the “World Wide SystemC Industrial/Academic Trend Report" - Hosted IEEE P1666-WG to share information on 27 Jan. ,2005
SystemVerilog-TG - Submitted 32 errata to Accellera and IEEE P1800-WG. - Voted in favor for the IEEE P1800 ballot on July. 2nd. - Creating the "Technical term dictionary" for Japanese industry standard - Hosted IEEE P1800-WG to share information on 26 Jan. ,2005
Collaboration of two task groups- Co-hosting the SystemC/SystemVerilog User's Forum at EDSFair2006 at Yokohama
IEICE
TC93 JNC
JEITA
STD-TSC WG2 JNC
IEEE
IEEE-SA
IEC
(Int’l) TC93
(Int’l) WG2
Accellera, OSCI
WG2 JNC
EDA-TC
SCWGs(P1666,P1800,,,)
DASC
CAGNesCom,RevCom,
SCTGSVTG
Member(’04/12~)
StandarsCollaboration
Collaboration
DASC-”EDA-TC” Collaboration Structure
(Dual Logo)
Representative