1 ECE 5465 Advanced Microcomputers Group 11: Brian Knight Benjamin Moore Alex Williams.

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1 ECE 5465 Advanced Microcomputers Group 11: Brian Knight Benjamin Moore Alex Williams

Transcript of 1 ECE 5465 Advanced Microcomputers Group 11: Brian Knight Benjamin Moore Alex Williams.

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ECE 5465Advanced Microcomputers

Group 11:

Brian Knight

Benjamin Moore

Alex Williams

Outline Review Basic Data Processing Instructions

Arithmetic, Bit-wise, Movement, Comparison Instructions

ADC, SBC, and RSB Operand2 Multiply Instructions Immediate Values

Binary Encoding

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Review Data Processing Instructions Arm data processing instructions -

Perform arithmetic operations Perform logical operations Operate on data values in Registers

The only instructions that modify data values Typically require two operands and produce

single result

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Arithmetic & Bit-wise Operations op{cond}{S} Rd, Rn, Operand2, where

op: ADD, SUB, RSB, ADC, SBC, RSC, AND, ORR, EOR, or BIC

cond: optional condition code S: optional suffix that causes condition codes to be

updated Rd: ARM register that stores the result Rn: ARM register holding first Operand Operand2: flexible second operand

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Arithmetic & Bit-wise Operations

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Purpose of ADC and SBC ADC and SBC can be used to perform 64-bit

operations 64-bit Add Example:

1st number : r0,r1 2nd number: r2,r3

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Operand2 Operand2 is a flexible operand with two

possible forms #immed_8r: Expression evaluating to numeric constant Rm{,shift}, where

Rm: ARM Register holding data for second operand shift: Optional shift to be applied to Rm

(LSL,LSR,ASL,ASR,ROR, or RRX)

Why do we need both SUB and RSB? RSB r4, r4, #1280 ; r4:= 1280 – r4

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Outline Review Basic Data Processing Instructions

Arithmetic, Bit-wise, Movement, Comparison Instructions

ADC, SBC, and RSB Operand2 Multiply Instructions Immediate Values

Binary Encoding

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Register Movement Operations op{cond}{S} Rd, Operand2

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Comparison Operations op{cond} Rn, Operand2

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Multiplies Immediate second operands not supported Result register must be different than first

source

Only the least significant 32 bits are saved

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Multiply Long

Opcode [23:21] Mnemonic Meaning Effect0MUL Multiply(32-bit result) Rd:=(Rm*Rs)[31:0]1MLA Multiply-accumulate(32-bit result) Rd:=(Rm*Rs+Rn)[31:0]

100UMULL Unsigned multiply long RdHi:RdLo:=Rm*Rs101UMLAL Unsigned multiply-accumulate long RdHi:RdLo+=Rm*Rs110SMULL Signed multiply long RdHi:RdLo:=Rm*Rs111SMLAL Signed multiply-accumulate long RdHi:RdLo+=Rm*Rs

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‘RdHi:RdLo’ is the 64-bit result from long multiplication

Assignment is denoted with ‘:=‘, Accumulation is denoted by ‘+=‘

Outline Review Basic Data Processing Instructions

Arithmetic, Bit-wise, Movement, Comparison Instructions

ADC, SBC, and RSB Operand2 Multiply Instructions Immediate Values

Binary Encoding

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Immediate ValuesMost immediate values that can be used in ARM data processing instructions are of the form: Immediate = (0 → 255) × , where 0≤ n ≤ 12 Binary encoding : The assembler will report if a user attempts to use an

immediate value which cannot be encoded.

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Binary Encoding

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For Data Processing Instructions Condition Codes

Binary Encoding

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For Data Processing Instructions Opcode:

Binary Encoding For Multiply Instructions

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BACK-UP SLIDES

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How long multiply works

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Supported Immediate Values

00000000 00000000 00000000 XXXXXXXX

00000000 00000000 000000XX XXXXXX00

00000000 00000000 0000XXXX XXXX0000

….

XXXXXXXX 00000000 00000000 00000000

XXXXXX00 00000000 00000000 000000XX

XXXX0000 00000000 00000000 0000XXXX

XX000000 00000000 00000000 00XXXXXX

 

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Supported Immediate Values What if you want an immediate number of the form

following form?

00000000 00000000 XX000000 XXXXXXXX

  Note that this is just …

00000000 00000000 XX000000 00000000 +

00000000 00000000 00000000 XXXXXXXX

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