1. BASIC IDEAL & PRACTICAL OP-AMP · 2018-06-29 · GATE ACADEMY ® 1 - 3 Operational Amplifier 105...

1. BASIC IDEAL & PRACTICAL OP-AMP : 1.1 D 1.2 – 4 1.3 C, D 1.4 D 1.5 B 1.6 0.02 1.7 D 1.8 C 1.9 C 1.10 D

1.11 A 1.12 D 1.13 D 1.14 A 1.15 B 1.16 D 1.17 D 1.18 C, D 1.19 D 1.20 D 1.21 D 1.22 A 1.23 B 1.24 C 1.25 A 1.26 B 1.27 B 1.28 B 1.29 D 1.30 B 1.31 D 1.32 A 1.33 C 1.34 D 1.35 B 1.36 C 1.37 C 1.38 B 1.39 A 1.40 B 1.41 A 1.42 A 1.43 B 1.44 B 1.45 B 1.46 C 1.47 A 1.48 B 1.49 B 1.50 C 1.51 B 1.52 A 1.53 B 1.54 C 1.55 B 1.56 A 1.57 D 1.58 B 1.59 A 1.60 A 1.61 B 1.62 A 1.63 C 1.64 C 1.65 B 1.66 C 1.67 D 1.68 B 1.69 0.6 1.70 12 1.71 250 1.72 1 1.73 1.39 1.74 B 1.75 B 1.76 –1 1.77 100 1.78 100 1.79 D 1.80 D 1.81 C 1.82 B 1.83 C 1.84 B 1.85 B

1.6 For the ideal Op-Amp circuit of figure. Determine the output voltage 0V

[GATE EC 1993, IIT-Bombay]

Ans. 0.02 V Sol. Circuit will reduce as follows

100�

99�

100�

100�

0V

4 V

0V

4 V

V

V

100� 99�

100�

100�

Analog Electronics [EC/EE/EEE/IN] 1 - 2 GATE ACADEMY ®

Due to virtual ground condition V V V

Apply KCL at non-inverting terminals

4

0100 100

V V

2 4

2 Volts100 100

VV

Apply KCL at inverting terminal

040

100 99

V VV

Put V = 2 Volts.

022 40

100 99

V

02 2

99 100

V

0200 100 198V

0100 2V

0 0.02 VoltV

1.8 Correction Option (C) 1 fR

R

1.55 For the Op-Amp circuit shown below, 0V is approximately equal to

[GATE IN 2008, IIT-Bangalore]

(A) –10 V (B) – 5 V (C) + 5 V (D) + 10 V Ans. (B) Sol.

0V

100 k�

1 M�

1 M�

100 k�

10 V

95 �105 �

95 � 105 �

0V

100 k�

1 M�

1 M�

100 k�

10 V

95 �105 �

95 � 105 �

0V

100 k�

1 M�

1 M�

100 k�

10 V

95 �105 �

95 �

105 �XV

YV

I

1I

2I

GATE ACADEMY ® 1 - 3 Operational Amplifier

105

10 5.25 V200XV

1 2I I I

1 2I I [Due to small resistance 95 ]

95 and 105 will be in series

95

10 4.75 V200YV

[By VDR]

Apply KCL at ‘b’

10 11100 1000Y b b

Y b

V V VV V

10

4.31817 Volts11b YV V

Apply KCL at ‘a’

0

100 1000X a aV V V V

010 11X aV V V

0 11 10a XV V V

0 10(4.31187) 10(5.25) 47.5 52.5V

0 5 VV

1.58 The nature of feedback in the Op-Amp circuit shown is [GATE EE 2009, IIT-Roorkee]

(A) Current - Current feedback (B) Voltage - Voltage feedback

(C) Current - Voltage feedback (D) Voltage - Current feedback

Ans. (B)

Sol. (i) Voltage (sampling) + Series (mixing) feedback

(ii) Series (mixing) + Shunt (sampling) feedback

(iii)Voltage (sampling) + Voltage (mixing) feedback

XV100 k�

1 M�

100 k�YV

1 M�

a

b

0d

b a

V

V V

�

�

+

-

~

+

-

outV

1k� 2k�6V

6V

inV


1.71 In the circuit shown, assume that the Op-Amp is ideal. The bridge output voltage 0V (in mV) for

0.05 is______________. [GATE EC 2015 (Set-01), IIT-Kanpur]

Ans. (250) Sol.

Due to virtual ground concept

1VV V

Current in 100 and 50 resistor will be same

50 100

1A

50I I

So, output voltage is given by,

0

1 1250(1 ) 250(1 ) 500

100 100V

0 5 0.05 0.25 VV

0 250 mVV

1.73 In the figure shown, TR represents a resistance temperature device (RTD), whose characteristic is given

by 0(1 )TR R T , where 0 10 100 , 0.0039 CR and T denotes the temperature in 0 C . Assuming

the op-amp to be ideal, the value of 0V in volts when 0100 CT , is __________V.

[GATE IN 2015, IIT-Kanpur]

Ans. (1.39 V)

250(1 )Ω� � 250(1 )Ω� �

250(1 )Ω� � 250(1+ )Ω�

0V

�

�

�

�

50�100�

100� 1 V

250(1 )Ω� � 250(1 )Ω� �

250(1 )Ω� � 250(1+ )Ω�

0V

�

�

�

�

50�

100�

100�1V

1V

1A

50

1A

100

1A

50

1A

100

0V

1 V�

100 �

TR


Sol.

Given : 0 1 0

00.0039 C , 100, 100 CR T

0 (1 ) 100(1 0.0039 100)TR R T

139TR

1

A100

I

0

1139

100TV I R

0 1.39 VV

1.76 In the circuit given below, the OP-AMP is ideal. The output voltage 0V in volt is ________.

[GATE IN 2016, IISc Bangalore]

Sol. 1 1 120

20 20 10

V V V

1 0.5V V

0

200.5

10V

1V

1.77 In the circuit given below, the OP-AMP is ideal. The input xv is a sinusoid. To ensure y xv v , the value

of NC in picofarad is _________ [GATE IN 2016, IISc Bangalore]

Sol. Appling KCL at inverting terminal,

000

1k 10 ky yV V V

0

1 10 10y yV V V

0 11 yV V … (i)

0V

1 V�

100 �

TR

I

1 V by VGC

20k�

20k�

10k�

10k�

20k�

2V1V 0V

NC

1k�

1k�

10k�

xv

1nF

yv


Applying KCL at non-inverting terminal,

0 01 11 k

y x y y

N

V V V V V

sC sC

. ( 11 ). 0y y y NV sC V V sC

. 10 . 0y y NV sC V sC

. 10 .y y NV sC V sC

0.1 nF10N

CC 100 pF

1.78 In the circuit given below, the OP-AMP is ideal. The value of current LI in microampere is ______

[GATE IN 2016, IISc Bangalore]

Sol. Applying KCL at inverting terminal,

000

100 100

V VV

K K

02

100 100

VV

K K

0 2V V

Applying KCL at non inverting,

010

10 10L

V VVI

K K

1

010 10 10L

V VI

K K K

0.1mALI 100 A

1.81 In an Op-Amp, if the feedback voltage is reduced by connecting a voltage divider at the output, which of the following will happen? [IES EC 2016]

1. Input impedance increases

2. Output impedance reduces

3. Overall gain increases

Which of the above statements is/are correct?

(A) 1 only (B) 2 only (C) 3 only (D) 1, 2 and 3

Ans. (C)

Sol.

10k�

100k�

1V

LI

10k�

100k�

LR

1f fV A� � �

10k�

100k�

1V

LI 10k�

100k�

LR

V

V


2. OP-AMP APPLICATION (ADDER / SUBTRACTOR) : 2.1 C 2.2 1 2.3 D 2.4 A 2.5 C 2.6 B 2.7 B 2.8 A 2.9 D 2.10 C

2.11 C 2.12 A 2.13 B 2.14 B 2.15 C 2.16 A 2.17 B 2.18 C 2.19 D 2.20 C 2.21 B 2.22 B 2.23 C 2.24 B 2.25 C 2.26 C 2.27 B 2.28 1.5 2.29 15

2.5 The differential input resistance of the circuit shown in figure is [GATE IN 1996, IISc-Bangalore]

(A) 1R (B) 1/2R (C) 12R (D) fR

Ans. (C) Sol.

Voltage at node ‘b’, 21

fb

f

RV V

R R

For ideal Op-Amp, V V

21

fa b

f

RV V V

R R

Current supplied by source, 1

1

aV VI

R

Differential input resistance, dd

VR

I

2 1

1

1

f

f

RV V

R RI

R

For differential input, 1 2,2 2

d dV VV V

1

1

1

1 12 2

f

f

RV

R RI

R

1 11

1

2 ( )2

2fd

f

R R RVR

I R R

2.25 Correction option (C) 4cos Vt

2.29 An ideal op-amp has voltage sources 1 3 5 1, , ,......, NV V V V connected to the non-inverting input and

2 4 6, , ,......, NV V V V connected to the inverting input as shown in the figure below ( CCV = 15 volt,

CCV = −15 volt). The voltages 1 2 3 4 5 6, , , , , ,......V V V V V V are 1, − 1/2, 1/3, −1/4, 1/5, −1/6, .… volt,

respectively. As N approaches infinity, the output voltage (in volt) is ___________. [GATE EC 2016 (Set - 01), IISc Bangalore]

1R

0V

1V fR

1R2V

iV

fR

1R

0V

1V fR

1R2V

fR

a

b

I

I

dV


Ans. 15 Sol.

Apply nodal analysis at node A,

3 11 ..... 01 k 1 k 1 k 1 k

A A NA AV V V VV V V

1 3 11 .....2A N

NV V V V

B AV V [ Virtual ground concept]

Apply nodal analysis at node B,

02 4 ..... 010 k 10 k 10 k 10 k

A N AA A V V V VV V V V

[We used B AV V ]

0 2 4 61 ( ..... )2A N

NV V V V V V

1 3 10 2 4 6

( ..... )1 ( ..... )

2 12

NN

V V VNV V V V V

N

0 1 2 3 4

1 1 1..... 1 .....

2 3 4V V V V V

0

1V

N

Output of op-amp goes to saturation

0 15 Voltsat CCV V V

Hence, the correct answer is 15.

CCV�

CCV�

10k�

10k�

10k�

10k�

1k�

1k�

1k�

1k�

2V

4V

NV

1V

3V

1NV �

0V

CCV�

CCV�

10k�

10k�

10k�

10k�

1k�

1k�

1k� 1k�

2V

4V

NV

1V

3V

1NV �

0VBV

AV


3. OP-AMP APPLICATION (COMPARATOR / SCHMITT TRIGGER) : 3.1 D 3.2 D 3.3 D 3.4 A 3.5 A 3.6 D 3.7 A 3.8 B 3.9 B 3.10 A

3.11 B 3.12 A 3.13 B 3.14 A 3.15 D 3.16 B 3.17 C 3.18 D 3.19 A 3.20 C 3.21 C 3.22 B 3.23 C 3.24 D 3.25 D 3.26 D 3.27 D 3.28 C 3.29 D 3.30 8.10 3.31 1 3.32 A 3.33 B 3.34 0.67 3.35 D

3.9 Correction Diagram :

Ans. (B) Sol. For increasing input voltage if 10VoutV then triggering voltage using superposition

1 47

10 0.748 48

0.893 V

3.15 Shows a Schmitt trigger circuit and the corresponding hysteresis characteristics. The values of TLV and

THV are [GATE IN 2004, IIT-Delhi]

(A) 3.75 V, 3.75 VTL THV V (B) 1 V, 5 VTL THV V

(C) 5 V, 1 VTL THV V (D) 5 V, 5 VTL THV V Ans. (D) Sol. Given circuit is shown below.

–10 V

+10 V

10 k�

47 k�

inVoutV

0.7 VV =�

1k �

TLV THV

10 V�

10 V�

+

_

0V

10 V�

10 V�

10 k�

5 k�

iV +–

+

_

0V

10 V�

10 V�

10 k�

5 k�

iV +–


NON-INVERTING SCHMITT TRIGGER CIRCUIT

Op-amp with positive feedback act as a comparator and input is given to non-inverting terminal. So

this is a non-inverting Schmitt trigger circuit. Voltage v is given by,

2 1

1 2 1 2

in outV R V Rv

R R R R

When out CCV V ,

Then 2 11

1 2 1 2

in CCV R V Rv V

R R R R

Again out CCV V if 0v

i.e. 2 1

1 2 1 2

0in CCV R V R

R R R R

1

2in CC

RV V

R …… (i)

When out CCV V

Then 2 12

1 2 1 2

in CCV R V Rv V

R R R R


2 1

1 2 1 2

0in CCV R V R

R R R R

1

2

CCin

V RV

R …… (ii)

Transfer characteristics is shown below.

Where 1

2

CCTH

V RV

R and 1

2

CCTL

V RV

R

Hysteresis is given by,

1 1

2 2

CC CCH TH TL

V R V RV V V

R R

1

2

2H CC

RV V

R

1

2

10 55 V

10CC

TH

V RV

R

1

2

10 55 V

10CC

TL

V RV

R

1R

2R

inV ��

v�

outV

HVTHVTLV inV

outV


3.17 In the given figure, if the input is a sinusoidal signal, the output will appear as shown in [GATE EE 2005, IIT-Bombay]

(A) (B)

(C) (D)

Ans. (C) Sol.

Protecting diodes are used to protect the Op-Amp form the damage due to application of high

voltage. This is an open loop system so Op-Amp behaves as a comparator. For positive half cycle, I NI 0 satV V

For negative half cycle, NI I 0 satV V

3.22 The input signal shown in the figure below is fed to a Schmitt trigger. The signal has a square wave amplifier of amplitude of 6 V p-p. It is corrupted by an additive high frequency noise of amplitude 8 V p-p. [GATE IN 2007, IIT-Kanpur]

+

_

outV

+

_

LRR –V

+V

R

Protecting diodes

iV

7 V

3 V

1 V

1 V�

3 V�

7 V�

8 V

6 Vt

Square WaveNoise


Which one of the following is an appropriate choice for the upper and lower trip points of the Schmitt trigger to recover a square wave of the same frequency from the corrupted input signal iV ?

(A) 8.0 V (B) 2.0 V (C) 0.5 V (D) 0 V Ans. (B) Sol.

The above corrupted signal is given as an input to Schmitt trigger circuit.

Operation of Schmitt trigger : For 0i UTPV V V switches from tosat satV V

For 0i LTPV V V switches from tosat satV V

Calculation of Trip point voltage :

0 2

1 2T

V RV

R R

[By VDR]

When 0 satV V

T UTPV V upper trip point

2

1 2

satUTP

V RV

R R

…… (i)

When 0 satV V

T LTPV V lower trip point

2

1 2

satLTP

V RV

R R

…… (ii)

From equation (i) and (ii), we can conclude that both UTPV and LTPV are lesser in magnitude than satV

for proper operation. Since the signal to be recovered is square wave of peak amplitude of +3 V. we should adjust the satV

in such a way that it is equal to 3V . (As output of Schmitt trigger is satV ) therefore the UTPV and

LTPV will have magnitude less than 3 V.

iV

7 V

3 V

1 V

1 V�

3 V�

7 V�

8 V

6 Vt

Square Wave tobe recovered

Noise

T

0V

1R

iV

satV�

2R

TV

satV�


So, option (A) 8 V is straight forwardly rejected. So now we are left with option (B), (C) and (D). Consider option (C) 0.5 V

Key Point : Multiple triggering occurs if we select UTPV or 1 VLTPV . So we can’t recover square

wave with same frequency because due to noise frequency will change. Consider option (B) 2 V

Key Point : For UTPV or 1 VLTPV we get square wave same as input square wave.

So, 2 VUTPV and 2 VLTPV satisfies all the required conditions for recovery of square wave

with same frequency. Hence, the correct option is (B).

7 V

3 V

0.5 V

0.5 V�

3 V�

7 V�

8 V

6 V( )t s

( )t s

T

0.5 VUTPV � �

0.5 VLTPV � �

Vi

satV�

satV�

0V

7 V

3 V

1 V

1 V�

3 V�

7 V�

8 V

6 V( )t s

( )t s

T

2 V�

2 V 2 VUTPV � �

2 VLTPV � �

At VUTP

+ to –V Vsat sat

At VLTP

– to +V Vsat sat

Vi

3 VsatV� � �

3 VsatV� � �

0V

T


3.31 In the bistable circuit shown, the ideal Op-Amp has saturation levels of 5 V . The value of 1R

(in k ) that gives a hysteresis width of 500 mV is _____. [GATE EC 2015 (Set-02), IIT-Kanpur]

Ans. 1 Sol. Given circuit is shown below.

Op-amp with positive feedback at as a comparator.

Voltage v is given by, 2 1

1 2 1 2

in outV R V Rv

R R R R

When out CCV V ,

Then 2 11

1 2 1 2

in CCV R V Rv V

R R R R


i.e. 2 1

1 2 1 2

0in CCV R V R

R R R R

1

2in CC

RV V

R …… (i)

When out CCV V

Then 2 12

1 2 1 2

in CCV R V Rv V

R R R R


2 1

1 2 1 2

0in CCV R V R

R R R R

1

2

CCin

V RV

R …… (ii)

Transfer characteristics is shown below.

outV

1R

2 20 kΩR �

inV ��

1R

2 20 kΩR �

inV ��

v�

outV

HV1V2V inV

outV


Where 11

2

CCV RV

R and 1

22

CCV RV

R

Hysteresis is given by,

1 11 2

2 2

CC CCH

V R V RV V V

R R

1

2

2H CC

RV V

R

Given : 0.5 VHV

12 5 0.520

R

1 1 kR

4. OP-AMP APPLICATION (INTEGRATOR / DIFFERENTIATOR / ACTIVE FILTER / FREQUENCY RESPONSE) :

4.1 A 4.2 D 4.3 C 4.4 C 4.5 A 4.6 A 4.7 D 4.8 B 4.9 * 4.10 C

4.11 D 4.12 C 4.13 D 4.14 A 4.15 C 4.16 C 4.17 A 4.18 A 4.19 D 4.20 B 4.21 A 4.22 D 4.23 A 4.24 A 4.25 A 4.26 A 4.27 D 4.28 A 4.29 C 4.30 C 4.31 B 4.32 C 4.33 D 4.34 D 4.35 A 4.36 D 4.37 D 4.38 D 4.39 C 4.40 B 4.41 A 4.42 A 4.43 D 4.44 B 4.45 A 4.46 3.1-3.26 4.47 A 4.48 15-16 4.49 159.15 4.50 D 4.51 A 4.52 1.245 4.53 B 4.54 C 4.55 D 4.56 –1 4.57 A 4.58 44.37 4.59 2.95

4.9 (A - R, B - S, C - P)

4.2 In the following circuit, the output ‘V’, follows an equation of the form 2

2( )

d V dVa bV f t

dt dt . The

value of a, b and ( )f t are respectively [GATE EE 1992, IIT-Delhi]

R

C

V

C

R

R

R

C

R

R

Rte


(A) 2 2

1 1,

2 2a b

RC R C

2 2

1 1, ( ) 1

2tf t e

R C RC

(B) 2 2

1 1,

2 2a b

RC R C

2 2

1 1, ( ) 1 tf t e

R C RC

(C) 2 2

1 1,

2a b

RC R C

2 2

1 1, ( ) 1

2tf t e

R C RC

(D) 2 2

1 1,

2 2a b

RC R C

2 2

1 1, ( ) 1

2tf t e

R C RC

Ans. (D) Sol. Solve the circuit in parts

Above circuit is an integrator.

Output 2 1

1V V dt

RC

Or 21

dVV RC

dt …… (i)

Output 2

1V V dt

RC

Or 2

dVV RC

dt …… (ii)

23

( )

2

tV eV

And 1 3 3( )d

RC V V Vdt

2V

C

R

R

1V

V

C

R

R

2V

1V

C

R

R

R2V

3V

te


Or 1 3 3( )RC V V V dt

1 3 2

1( )

2tRC V V e V dt

Or 22

1

2 2

ttV ed dV

RC RC RC e V dtdt dt

2

2 22

1 1 1

2 2 2t td V dV

RC R C e RC e RCVdt dt

2

2 22

1 1 1 1

2 2 2 2t td V dV

R C RC e e Vdt dt RC

Or 2

2 22

1 1 11

2 2 2

td V dV eR C RC V

dt dt RC

Compare with

2

2( )

d V dVa bV f t

dt dt

2 2

1 1,

2 2a b

RC R C

2 2

1 1, ( ) 1

2tf t e

R C RC

4.27 For the circuit shown in the following figure, the capacitor C is initially uncharged. At t = 0 the switch

S is closed. The voltage CV across the capacitor at 1msect is [GATE EC 2006, IIT - Kharagpur]

In the figures shown the OP-AMP is supplied with 15 V .

(A) 0 V (B) 6.3 V (C) 9.45 V (D) 10 V

Ans. (D)

Sol.

Above figure represents the linear charging of capacitor. Here transient equation is not valid.

After closing the switch apply KCL at non-inverting terminals.

+

_

10 V

1k�

C 1μF�

+_

cV

S

ci


Due to virtual ground 10VV V

10

1kci

10

1kcdV

cdt

6

3 3

10 10

1 10 10cV

10 VoltcV

4.28 and 4.29 Common data Correction diagram

4.39 The ideal Op-Amp based circuit shown below acts as a [GATE IN 2011, IIT-Madras]

(A) low-pass filter (B) high-pass filter (C) band-pass filter (D) band-reject filter Ans. (C) Sol. . Method 1 :

The type of filter can be determined from the transfer function of circuit in s-domain. So transfer`

function of circuit will be obtained first. From which conclusion will be draw about type of filter. KCL at node (a),

0

1/a i a b aV V V V V

R R sC

As node ‘b’ is at virtual ground, so 0bV

2 i

a

VV sC

R R

2

ia

VV

sCR

…… (i)

+

_

0ViV

R

RC

R

+

–

0V

500 k�

0.5 F�0.5 F�1M�1M�

1 F�iV

+

–

0V

/2R

/2CR

iV C

R/2C

aV bV cV

a b c

1 M

0.5 F

R

C

� �

� �


KCL at node (b),

0 0

02 /

a cV V

R sC

2a c

sCRV V ……. (ii)

From equation (i) and (ii), we have

1

2 2c i

sCRV V

sCR

2

(2 )c iV VsCR sCR

…… (iii)

KCL at node (c),

000

2 / / 2 2 /c c cV V V V

sC R sC

02

2c

sCVV sC

R

02(2 )c

sCRV V

sCR

…… (iv)

From equation (iii) and (iv), we have

0

2

2(2 ) (2 ) i

sCRV V

sCR sCR sCR

02

4

( )i

V

V sCR

In frequency domain, s j

02

4

i

V

V CR

Gain of circuit reduces as increases so given filter like low pass filter. . Method 2 : At low frequency 0, , O.C.Cf X C

This is an open loop system. So, Op-Amp behaves as a comparator. if 0iV 0 satV V

If 0iV 0 satV V

In this case 0 satV V finite gain

At high frequency , 0, S.C.Cf X C

Here 0 0V (Due to virtual ground)

So, this circuit act as a low pass filter.

+

–

0V

1M�1M�

iV

+

–

0V

1M�1M�

iV

500 k�


4.42 The following circuit has 10kR , 10 FC The input voltage is a sinusoidal at 50Hz with an rms

value of 10 V. under ideal conditions, the current si from the source is

[GATE EE 2009, IIT-Roorkee]

(A) 010 mA leading by90 (B) 020 mA leading by90 (C) 010mA leading by90 (D) 010 mA lagging by90

Ans. (A)

Sol. 0c

sc

XV V

R X

Where c

jX

C

and 0

cs s

css

R XV V

XV Vi

R R

ss s

c

RVi V j C

RX

6(2 50 10 10 )si j

10 mAsi j

So, 10 mA lagging by 090 .

4.53 The filters 1F and 2F having characteristics as shown in figure (a) and (b) are connected as shown in

figure (c). [GATE EE 2015 (Set-02), IIT-Kanpur]

+

-~ oV

10 F�

10 k�Si

10 k�

C R

R

OPAMP

0

i

V

V

0

i

V

V

1F

2F

1f 2f

iV

f f

iV0V 0V

(a) (b)

R

1F

2F

R

2

R

satV�

satV�0ViV

(c)

–

+

+

-~oV

C 10 F� �

Si

10k�

OPAMP

10k�

sV


The cut-off frequencies of 1F and 2F are 1f and 2f respectively. If 1 2f f , the resultant circuit exhibits

the characteristic of a (A) Band-pass filter (B) Band-stop filter (C) All pass filter (D) High-Q filter Ans. (B)

Sol. The given circuit represents 1F as LPF & 2F as HPF in parallel followed by a buffer.

LPF will pass all the frequencies less than 1f and HPF pass all the frequencies above 2f .

Since 1 2f f ; frequencies lying between 1 2andf f will be stopped.

Since 1 2 ,f f so /A iV V will be

From figure 0 aV V (voltage follower circuit)

So 0 a

i i

V V

V V

0 / iV V will be

Hence the circuit behaves like a band stop filter.

R

1F

2F

R

2

R

satV�

satV�0ViV

–

+

AV

/A iV V

0 / iV V

1. BASIC IDEAL & PRACTICAL OP-AMP · 2018-06-29 · GATE ACADEMY ® 1 - 3 Operational Amplifier 105...

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Transcript of 1. BASIC IDEAL & PRACTICAL OP-AMP · 2018-06-29 · GATE ACADEMY ® 1 - 3 Operational Amplifier 105...