*AVR

Session 2

Master : Dr.jafariAuthors: M.H Edrisi, hadi.edrisi@yahoo.com

Authors : Nemanja Perovic, nemanjaizbg@yahoo.com Prof. Dr. Veljko Milutinovic, vm@galeb.etf.bg.ac.yu

Last Session Summary What Is AVR?What is microcontrollerMicrocontroller vs MicroprocessorSome of the benefits of CMicrocontrollerAVR Powered Products

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*The History of AVRAVRwas developed in the year 1996 by Atmel CorporationThe architecture ofAVRwas developed byAlf-Egil BogenandVegard WollanAlf-Egil BogenVegard WollanRISC microcontrollerThe AT90S8515 was the first microcontroller which was based onAVR architecture first microcontroller was AT90S1200 in the year 1997.

*AVRs are generally classified into six broad groups:tinyAVR the ATtiny seriesmegaAVR the ATmega seriesCheapXMEGA the ATxmega seriesApplication-specific AVRFPSLIC (AVR with FPGA)32-bit AVRs

Basic Families

*TinyAVR Less memory, small size, suitable only for simpler application

632-pin package0.58kB program memoryLimited peripheral set

Basic Families(tinyAVR)

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*MegaAVR These are the most popular ones having good amount of memory (upto 256 KB), higher number of inbuilt peripherals and suitable for moderate to complex applications.4256kB program memory28100-pin packageExtended instruction set (Multiply instructions and instructions for handling larger program memories)Extensive peripheral set

Basic Families(megaAVR)

*XmegaAVR Used commercially for complex applications, which require large program memory and high speed.4256kB program memory16384kB program memory4464100-pin package (A4, A3, A1)Extended performance features, such as DMA, "Event System", and cryptography support.Extensive peripheral set with DACs

Basic Families(XMEGA)

Other FamiliesApplication-specific AVRmegaAVRs with special features not found on the other members of the AVR family, such as LCD controller,USBcontroller, advanced PWM, CAN etc.FPSLIC (AVR with FPGA)FPGA5K to 40K gatesSRAM for the AVR program code, unlike all other AVRsAVR core can run at up to 50MHz32-bit AVRs In 2006 Atmel released microcontrollers based on the new, 32-bit,AVR32architecture. They includeSIMDandDSPinstructions, along with other audio and video processing features. This 32-bit family of devices is intended to compete with theARMbased processors. The instruction set is similar to other RISC cores, but is not compatible with the original AVR or any of the various ARM cores. *

*Information

Series NamePinsFlash MemorySpecial FeatureTinyAVR6-320.5-8 KBSmall in sizeMegaAVR28-1004-256KBExtended peripheralsXmegaAVR44-10016-384KBDMA , Event System included

8051PICAVRSPEEDSlowModerateFastMEMORYSmallLargeLargeARCHITECTURECISCRISCRISCADCNot PresentInbuiltInbuiltTimersInbuiltInbuiltInbuiltPWM ChannelsNot PresentInbuiltInbuilt

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ATmega32

ATmega32

ATmel32KB Flash Programming MemorymegaAVR

*Features High-performance, Low-power AVR 8-bit MicrocontrollerAdvanced RISC Architecture High Endurance Non-volatile Memory segments JTAG (IEEE std. 1149.1 Compliant) Interface Peripheral Features Special Microcontroller Features I/O and Packages Operating Voltages Speed Grades Power Consumption at 1 MHz, 3V, 25C for ATmega32L

*AVR ArchitectureAdvanced RISC Architectur131 Powerful Instructions Most Single-clock Cycle Execution32 x 8 General Purpose Working RegistersFully Static OperationUp to 16 MIPS Throughput at 16 MHzOn-chip 2-cycle Multiplier

* High Endurance Non-volatile Memory segments

Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

*JTAG (IEEE std. 1149.1 Compliant) Interface

131 Powerful Instructions Most Single-clock Cycle Execution32 x 8 General Purpose Working RegistersFully Static OperationUp to 16 MIPS Throughput at 16 MHzOn-chip 2-cycle Multiplier

* Peripheral FeaturesTwo 8-bit Timer/Counters with Separate Prescalers and Compare ModesOne 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and CaptureModeReal Time Counter with Separate OscillatorFour PWM Channels 8-channel, 10-bit ADC8 Single-ended Channels7 Differential Channels in TQFP Package Only2 Differential Channels with Programmable Gain at 1x, 10x, or 200x

* Peripheral Features(2)Byte-oriented Two-wire Serial Interface Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator

*Special Microcontroller FeaturesPower-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standbyand Extended Standby

*AVR Architecture I/O and Packages32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF Operating Voltages 2.7 - 5.5V for ATmega32L 4.5 - 5.5V for ATmega32

*AVR Architecture Speed Grades 0 - 8 MHz for ATmega32L 0 - 16 MHz for ATmega32 Power Consumption at 1 MHz, 3V, 25C for ATmega32L Active: 1.1 mAIdle Mode: 0.35 mAPower-down Mode: < 1 A

End Of Session2*

*http://en.wikipedia.org/wiki/Atmel_AVR

*http://en.wikipedia.org/wiki/Atmel_AVR

*http://en.wikipedia.org/wiki/Atmel_AVR4256kB program memory28100-pin packageExtended instruction set (Multiply instructions and instructions for handling larger program memories)Extensive peripheral set

*http://en.wikipedia.org/wiki/Atmel_AVR16384kB program memory4464100-pin package (A4, A3, A1)Extended performance features, such as DMA, "Event System", and cryptography support.Extensive peripheral set with DACs*DSP:Digital SignalProcessingSingle Instruction Multiple DataPulse Width ModulationFastPWM(Pulse Width Modulation) Mode ofAVRMicrocontroller (Atmega16) Timer

*http://en.wikipedia.org/wiki/Atmel_AVR16384kB program memory4464100-pin package (A4, A3, A1)Extended performance features, such as DMA, "Event System", and cryptography support.Extensive peripheral set with DACs*http://en.wikipedia.org/wiki/Atmel_AVR16384kB program memory4464100-pin package (A4, A3, A1)Extended performance features, such as DMA, "Event System", and cryptography support.Extensive peripheral set with DACs**