1 A Sequential Parity Checker Parity Checker X Z Clock(P) (Data Input) Odd Parity – Total number...

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1 A Sequential Parity Checker Parity Checker X Z Clock(P) (Data Input) Odd Parity – Total number of 1 bits is odd. Even Parity – Total number of 1 bits is even. 0000000 1 0110110 0 1010101 1 7 data bits parity bit Example: Odd parity This is a simple example of a sequential network with one input plus clock. ned for serial data input ta enters the network sequentially,one bit at a time. dd parity checker, Z = 1 (at a given time) if the total numbe eceived is odd.

Transcript of 1 A Sequential Parity Checker Parity Checker X Z Clock(P) (Data Input) Odd Parity – Total number...

Page 1: 1 A Sequential Parity Checker Parity Checker X Z Clock(P) (Data Input) Odd Parity – Total number of 1 bits is odd. Even Parity – Total number of 1 bits.

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A Sequential Parity Checker

Parity Checker

X Z

Clock(P)

(Data Input)

Odd Parity – Total number of 1 bits is odd.Even Parity – Total number of 1 bits is even.

0000000 10110110 01010101 1

7 data bits parity bit

Example: Odd parity

This is a simple example of asequential network with one input plus clock.

Designed for serial data input-- data enters the network sequentially,one bit at a time.

For an odd parity checker, Z = 1 (at a given time) if the total numberof 1’s received is odd.

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A Sequential Parity Checker

State Graph

Network Timing Diagram

State Table State Table for T-FF implementation

State Encoding:

S0 Q = 0

S1 Q = 1

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Moore Sequential Network

-a sequential network whoseoutput is a function of the present state only.

X = 1 0 1 0 1A = 0 1 1 1 1 0B = 0 1 1 0 0 1Z = (0) 1 1 0 0 1

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Mealy Sequential Network

-a sequential network whose output is a function of both the present state and the input.

X = 1 0 1 0 1A = 0 0 0 1 1 0B = 0 1 1 1 1 0Z = 1(0)1 0(1)0 1

A “false” value arises becausethe network has assumed a newstate but the old input associatedwith the previous state is stillpresent.

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1. Determine the FF input equations and the output equations from the network.2. Derive the next-state equation for each FF from its input equations using the characteristic equation D FF Q+ = D

T-FF Q+ = T Q

SR-FF Q+ = S + R’Q JK-FF Q+ = JQ’ + K’Q

3. Plot a next state map for each FF4. Combine these maps to form the state table.

Deriving the State Table

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The FF input eqns. and output eqn. areJA = X KA = XB’ Z = B

JB = X KB = X A’

The next state eqns. for the FF’s areA+ = JAA’ + K’AA = XA’ + (X’ + B)A

B+ = JB B’ + K’BB = XB’ + (X A’)’B = XB’+(XA’+ X’A)B

Moore Sequential Network

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7Moore State Tables

Moore Sequential Network

Moore State Graph

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Mealy Sequential Network

The next-state and output eqns. are

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Mealy Sequential Network

Mealy State Graph

Mealy State Tables

input/output

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Mealy Sequential Network

-- Another Example

-two inputs and two outputs

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Mealy Sequential Network -- General

Model D-FF’s

Combinational subnetworkrealizes the n outputfunctions and the k next state functions, which serveas inputs to the D=FF’s.All FF’s change state synchronous with clock pulse.After FF’s change state thenew FF outputs are fed back into the combinationalsubnetwork awaiting the nextclock pulse.

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Moore Sequential Network -- General

Model D-FF’s

-Similar to Mealy.In the combinationalsubnetwork the output section is drawn separately from theinput section. (Output is onlya function of the present state.)

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State Table with Multiple Inputs and Outputs

Let X=0 rep. the input combination X1X2= 00, X=1 rep. X1X2= 01, etc.

Let Z=0 rep. the output combination Z1Z2= 00, Z=1 rep. Z1Z2= 01, etc.

Obtain the following table in terms of a single input variable X and a singleoutput variable Z.

(S0 , 1) = S2 (S2 , 3) = S1 Next State functions … S+ = (S,X)

(S0 , 1) = 2 (S2 , 3) = 1 Output function …….. Z = (S,X)

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What do you have to know?

• Analysis of clocked sequential networks

• State Graph, State Table, Network Realization

• Timing Diagrams

• Deriving State Table

• Moore and Mealy State machines

• General Models for Sequential Networks