06-Chapter 6 Boards.doc
Transcript of 06-Chapter 6 Boards.doc
-
7/28/2019 06-Chapter 6 Boards.doc
1/118
OptiX OSN 9500
Hardware Description Manual
Contents
Contents
6 Boards 1
6.1 Overview 1
6.A.1 Classified Board Description 1
6.A.2 Board Relationships 5
6.A.3 Board Appearance 6
6.2 STM-64 Optical Interface Board JL64 8
6.A.4 Functions and Principles 8
6.A.5 Front Panel 10
6.A.6 Interface 12
6.A.7 Parameter Configuration 12
6.A.8 Specifications 14
6.3 STM-16 Optical Interface Board JO16/JQ16/JD16/JL16 15
6.A.1 Functions and Principles 15
6.A.2 Front Panel 18
6.A.3 Interface 20
6.A.4 Parameter Configuration 20
6.A.5 Specifications 22
6.4 STM-4/STM-1 Optical Interface Board JH41/JLQ4/JLH1 23
6.A.1 Functions and Principles 23
6.A.2 Front Panel 26
6.A.3 Interface 28
6.A.4 Parameter configuration 28
6.A.5 Specifications 29
6.5 STM-1 Electrical Interface Board JLHE 31
6.A.6 Functions and Principles 31
6.A.7 Front Panel 33
6.A.8 Interface 35
6.A.9 Parameter configuration 35
6.A.10 Specifications 35
6.6 6-Port Gigabit Ethernet Processing Board GE06 36
6.A.11 Functions and Principles 36
6.A.12 Front Panel 38
6.A.13 Interface 40
6.A.14 Parameter configuration 40
6.A.15 Specifications 41
Huawei Technologies Proprietary
i
-
7/28/2019 06-Chapter 6 Boards.doc
2/118
OptiX OSN 9500
Hardware Description Manual
Contents
6.7 General High Order Cross-Connect Board GXCH 42
6.A.16 Functions and Principles 42
6.A.17 Front Panel 44
6.A.18 Interface 46
6.A.19 Specifications 466.8 Enhanced High Order Cross-Connect Board EXCH 46
6.A.20 Functions and Principles 46
6.A.21 Front Panel 48
6.A.22 Interface 49
6.A.23 Specifications 49
6.9 General Low Order Cross-Connect Board GXCL 50
6.A.24 Functions and Principles 50
6.A.25 Front Panel 52
6.A.26 Interface 53
6.A.27 Specifications 53
6.10 System Control & Communication Board JSCC 536.A.28 Functions and Principles 53
6.A.29 Front Panel 58
6.A.30 Interface 60
6.A.31 Parameter Configuration 61
6.A.32 Specifications 61
6.11 Synchronous Timing Generation Board JSTG 62
6.A.33 Functions and Principles 62
6.A.34 Front Panel 67
6.A.35 Interface 69
6.A.36 Parameter Configuration 69
6.A.37 Specifications 726.12 Synchronous Timing Interface Board JSTI 72
6.A.38 Functions and Principles 72
6.A.39 Front Panel 72
6.A.40 Interface 73
6.A.41 Parameter Configuration 73
6.A.42 Specifications 74
6.13 Orderwire Board JEOW 74
6.A.43 Functions and Principles 74
6.A.44 Front Panel 76
6.A.45 Interface 78
6.A.46 Parameter configuration 79
6.A.47 Specifications 80
6.14 System Communication Board JCOM 81
6.A.48 Functions and Principles 81
6.A.49 Front Panel 83
6.A.50 Interface 84
6.A.51 Specifications 84
6.15 Power Interface Board JPIU 85
6.A.52 Functions and Principles 85
6.A.53 Front Panel 86
6.A.54 Interface 88
6.A.55 Specifications 88
Huawei Technologies Proprietary
ii
-
7/28/2019 06-Chapter 6 Boards.doc
3/118
OptiX OSN 9500
Hardware Description Manual
Contents
6.16 Electromechanical Information Processing Board EMPU 89
6.A.56 Functions and Principles 89
6.A.57 Front Panel 91
6.A.58 Interface 92
6.A.59 Parameter configuration 946.A.60 Specifications 94
6.17 Key Power Backup Board JPBU 95
6.A.61 Functions and Principles 95
6.A.62 Front Panel 96
6.A.63 Interface 97
6.A.64 Specifications 98
6.18 Booster Amplifier Board JBA2 99
6.A.65 Functions and Principles 99
6.A.66 Front Panel 102
6.A.67 Interface 103
6.A.68 Parameter Configuration 1036.A.69 Specifications 103
6.19 Pre-amplifier Board JBPA 104
6.A.70 Functions and Principles 104
6.A.71 Front Panel 106
6.A.72 Interface 107
6.A.73 Parameter Configuration 107
6.A.74 Specifications 107
6.20 Dispersion Compensation Board JDCU 108
6.A.75 Functions and Principles 108
6.A.76 Front Panel 108
6.A.77 Interface 1106.A.78 Specifications 110
Huawei Technologies Proprietary
iii
-
7/28/2019 06-Chapter 6 Boards.doc
4/118
OptiX OSN 9500
Hardware Description Manual
Figures
Figures
Figure 4.1Max. access capacities for respective slots when the
subrack cross-connect capacity is 400 G 4
Figure 1.1Board relationships 6
Figure 1.1Board appearance 7
Figure 2.1Principle block diagram of the JL64 9
Figure 1.1LC optical interface 12
Figure 2.1Principle block diagram of the JO16 17
Figure 2.1Principle block diagram of the JH41 25
Figure 2.1Principle block diagram of the JLHE 32
Figure 2.1Principle block diagram of the GE06 37
Figure 2.1Principle block diagram of the GXCH 43
Figure 2.1Principle block diagram of the EXCH 47
Figure 2.1Block diagram of the GXCL 51
Figure 2.1Functional modules of the JSCC 55
Figure 2.2Functional module of the JSCC 57
Figure 2.1Principle block diagram of the JSTG 63
Figure 2.1Principle block diagram of the JEOW 75
Figure 2.1Principle block diagram of the JCOM 82
Figure 2.1Principle block diagram of the JPIU 85
Huawei Technologies Proprietary
iv
-
7/28/2019 06-Chapter 6 Boards.doc
5/118
OptiX OSN 9500
Hardware Description Manual
Figures
Figure 2.1Principle block diagram of the EMPU 90
Figure 2.1Principle block diagram of the JPBU 95
Figure 2.1Principle block diagram of the BA functional module onthe JBA2 100
Figure 3.1Function of the BA module in the system 101
Figure 2.1Principle block diagram of the PA module on the JBPA 104
Figure 3.1The PA module on the JBPA receives optical signals fromthe line 105
Figure 2.1Position of the JDCU in the system 108
Huawei Technologies Proprietary
v
-
7/28/2019 06-Chapter 6 Boards.doc
6/118
OptiX OSN 9500
Hardware Description Manual
Tables
Tables
Table 1.1Board configuration resources 2
Table 1.1Mandatory board list 3
Table 1.1Service boards available when the subrack is configuredwith GXCH 5
Table 1.2Service boards available when the subrack is configuredwith EXCH 5
Table 1.1Board size 7
Table 1.2Widths of the board front panel 7
Table 1.1Appearance and components of the front panel 11
Table 1.1Parameter configuration 12
Table 1.1Relevant ITU-T specifications for the optical interface 14
Table 1.2Comparison among the JO16, JQ16, JD16 and JL16. 15
Table 1.1Appearance and components of the front panel 19
Table 1.1Parameter configuration 20
Table 1.1Relevant ITU-T specifications for the optical interface 22
Table 1.2Comparison between the JH41, JLQ4 and JLH1 23
Table 1.1Appearance and components of the front panel 27
Table 1.1Parameter configuration 28
Table 1.1Optical interface specifications 30
Table 1.1Appearance and components of the front panel 34
Table 1.1Parameter configuration 35
Table 1.1Appearance and components of the front panel 39
Table 1.1Parameter configuration 40
Table 1.1Appearance and components of the front panel 45
Table 1.1Front Panel 49
Huawei Technologies Proprietary
vi
-
7/28/2019 06-Chapter 6 Boards.doc
7/118
OptiX OSN 9500
Hardware Description Manual
Tables
Table 1.1Appearance and components of the front panel 52
Table 1.1Appearance and components of the front panel 59
Table 1.1Pinouts of Ethernet NM interface 60
Table 1.1Pinouts of F&f/OAM serial ports 60
Table 1.1Parameter configuration 61
Table 1.1Encoding mode of the SSM 66
Table 1.1Appearance and components of the front panel 68
Table 1.1Parameter configuration 69
Table 1.1Appearance and components of the front panel 73
Table 1.1Appearance and components of the front panel 77
Table 1.1Pinouts of the orderwire phone 78
Table 1.1Pinouts of interface F1 78
Table 1.2Pinouts of Serial 1Serial 4 79
Table 1.1Parameter configuration 79
Table 1.1Appearance and components of the front panel 83
Table 1.1Pinouts of the Ethernet interface 84
Table 1.1Appearance and components of the front panel 87
Table 1.1JPIU Interface description 88
Table 1.2Pinouts of HUB power interface 88
Table 1.1Appearance and components of the front panel 91Table 1.1Pinouts of ALARM interface (DB50) 92
Table 1.1Description of the indicator drive interface (DB9) 93
Table 1.1Parameter configuration 94
Table 1.1Appearance and components of the front panel 97
Table 1.1Appearance and components of the front panel 102
Table 1.1Parameter configuration 103
Huawei Technologies Proprietary
vii
-
7/28/2019 06-Chapter 6 Boards.doc
8/118
OptiX OSN 9500
Hardware Description Manual
Tables
Table 1.1Appearance and components of the front panel 106
Table 1.1Parameter configuration 107
Table 1.1Appearance and components of the front panel 109
Huawei Technologies Proprietary
viii
-
7/28/2019 06-Chapter 6 Boards.doc
9/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6 BoardsThis chapter introduces board classification, board appearance, andspecifications. The specifications include:
Functions and principle
Front panel
Interface
Parameter configuration
Specifications
6.1 Overview
6.A.1 Classified Board Description
The OptiX OSN 9500 has 58 slots and 40 of them are service slots, which can beinstalled with different boards as required to meet the actual networking demands.For detailed networking configurations, refer to OptiX OSN 9500 Intelligent OpticalSwitching System Technical Manual System Description.
Board configuration resources for the OptiX OSN 9500 are shown in Table 1.1.
Huawei Technologies Proprietary
1
-
7/28/2019 06-Chapter 6 Boards.doc
10/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1 Board configuration resources
Unit name Boardname
Full name Slot
SDH unit JL64 STM-64 Optical InterfaceBoard
IU01IU40
JO16 8 x STM-16 OpticalInterface Board
IU01IU32
JQ16 4 x STM-16 OpticalInterface Board
IU01IU40
JD16 2 x STM-16 OpticalInterface Board
IU01IU40
JL16 1 x STM-16 OpticalInterface Board
IU01IU40
SDH unit JLQ4 4 x STM-4 OpticalInterface Board
IU01IU40
JH41 16 x STM-4/STM-1Optical Interface Board
IU01IU40
JLH1 16 x STM-1 OpticalInterface Board
IU01IU40
JLHE 16 x STM-1 ElectricalInterface Board
IU01IU40
Ethernet processing unit GE06 6-Port Gigabit Ethernet
Processing Board
IU01IU40
Cross-Connect unit GXCH General High Order Cross-Connect Board
XCH
EXCH Enhanced High Order Cross-Connect Board
XCH
GXCL General Low Order Cross-Connect board
IU01IU32
System control &communication unit
JSCC System Control &Communication Board
SCC
Synchronous timinggeneration board JSTG Synchronous TimingGeneration Board STG
JSTI Synchronous TimingInterface Board
STI
Orderwire unit JEOW Orderwire Board EOW
System communicationunit
JCOM System CommunicationBoard
COM
Power interface unit JPIU Power Interface Board PIU
Electromechanical
information processing
EMPU Electromechanical
Information Processing
EPU
Huawei Technologies Proprietary
2
-
7/28/2019 06-Chapter 6 Boards.doc
11/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Unit name Boardname
Full name Slot
unit Board
Key power backup unit JPBU Key Power Backup Board PBUFan control unit JFAN Fan Control Board FAN
Dispersioncompensation unit
JDCU Dispersion CompensationBoard
IU01IU40/DCU/STI/EOW/SIG
Booster amplifier (BA) &Pre-amplifier (PA) unit
JBPA Pre-amplifier Board IU01IU40/DCU/STI/EOW/SIG
JBA2 BA Board IU01IU40/DCU/STI/
EOW/SIG
System backplane JAFB System Backplane
Note:1. The system backplane (JAFB) has been introduced in Chapter 4 Subrack.
2. The fan control board (JFAN) has been introduced in Chapter 5 Fan TrayAssembly.
3. Other boards are covered in this chapter.
4. Slots for JO16/JQ16/JD16/JL16/JLQ4/JH41/JLH1/JLHE/GE06/GXCL dependon configuration of the cross-connect board. Refer to relevant parts of respectiveboards for details.
The board configuration principle is described as follows:
2. Mandatory Boards
Table 1.1 Mandatory board list
Unit Boardname
Protection
scheme
Remarks
Cross-connect unit GXCH/EXCH 1+1protection
GXCH and EXCH areoptional for configuration.
System control andcommunication unit
JSCC 1+1protection
Synchronous timinggeneration unit
JSTG 1+1protection
Systemcommunication unit
JCOM
Power interface unit JPIU 1+1
protection
Huawei Technologies Proprietary
3
-
7/28/2019 06-Chapter 6 Boards.doc
12/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Unit Boardname
Protectionscheme
Remarks
Electromechanical
information processingunit
EMPU
Key power backup unit JPBU
Fan control unit JFAN
Service unit JL64/JO16/JQ16/JD16/JL16/JLQ4/JH41/JLH1/JLHE/GE06
1:3 keypowerprotection
Configured as the actualneeds of the user.
3. Optional Boards
The JSTI, JDCU, JBPA/JBA2, GXCL and JEOW can be configured as required bythe actual needs of the user.
4. Access Capacity
The maximum access capacity for the service board should not exceed themaximum cross-connect capacity of a single subrack. For example, when thecross-connect capacity of the subrack is 400 G/720 G, the maximum accessedservice should not exceed 400 G/720 G.
When the cross-connect capacity of the subrack is 400 G, and boards with
access capacity of up to 20 G are supported. The access capacities for respectiveslots are as shown in Figure 4.1.
I
U
18
0
5
G
I
U
17
0
5
G
I
U
19
1
0
G
I
U
20
1
0
G
I
U
21
1
0
G
17
I
U
22
1
0
G
I
U
23
2
0
G
I
U
24
2
0
G
I
U
25
2
0
G
I
U
26
2
0
G
I
U
27
1
0
G
I
U
28
1
0
G
I
U
29
1
0
G
I
U
30
1
0
G
I
U
31
0
5
G
I
U
32
0
5
G
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
I
U
0
2
0
5
G
I
U
0
1
0
5
G
I
U
0
3
1
0
G
I
U
0
4
1
0
G
I
U
0
5
1
0
G
01
I
U
0
6
1
0
G
I
U
0
7
2
0
G
I
U
0
8
2
0
G
I
U
0
9
2
0
G
I
U
1
0
2
0
G
I
U
1
1
1
0
G
I
U
1
2
1
0
G
I
U
1
3
1
0
G
I
U
1
4
1
0
G
I
U
1
5
0
5
G
I
U
1
6
0
5
G
02 03 04 05 06 07 08 09 10 11 12 13 14 15 16
Front slot
area
E
O
W
P
B
U
S
C
C
S
C
C
I
U
3
3
0
5
G
55
I
U
3
4
0
5
G
X
C
H
X
C
H
I
U
3
5
0
5
G
I
U
3
6
0
5
G
S
T
I
E
P
U
P
I
U
51 47 48 33 34 41 42 35 36 58 52 56
SI
G
DC
U
SI
G
CO
M
I
U
37
0
5
G
53
I
U
38
0
5
G
XC
H
XC
H
I
U
39
0
5
G
I
U
40
0
5
G
ST
G
ST
G
PI
U
49 50 54 37 38 43 44 39 40 45 46 57
Back slot
area
Figure 4.1 Max. access capacities for respective slots when the subrack cross-connect capacity is 400 G
When the GXCH is configured in the subrack, the slots can be installed withboards as follows:
Huawei Technologies Proprietary
4
-
7/28/2019 06-Chapter 6 Boards.doc
13/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1 Service boards available when the subrack is configured with GXCH
Slot types Available boards
20 G slots (IU7IU10 and IU23IU26)
JL64/JO16/JQ16/JD16/JL16/JLQ4/JH41/JLH1/JLHE/GE06/JBPA/JBA2/J
DCU/GXCL
10 G slots (IU3IU6, IU11IU14,IU19IU22, IU27IU30)
JL64/JQ16/JD16/JL16/JLQ4/JH41/JLH1/ JLHE/GE06/JBPA/JBA2/JDCU
5 G slots (IU1, IU2, IU15, IU16,IU17, IU18, IU31, IU32 and IU33IU40)
JD16/JL16/JLQ4/JLH1/JLHE/JBPA/JBA2/JDCU
Cross-connect slots (41, 42, 43 and44)
GXCH
When the subrack cross-connect capacity is 720 G, the access capacity foreach of the 32 slots in the front board area is 20 G, and that for each of the 8 slotsin the rear board area is 10 G.
Table 1.2 Service boards available when the subrack is configured with EXCH
Slot types Available boards
20 G slots (IU1IU32) JL64/JO16/JQ16/JD16/JL16/JLQ4/JH41/JLH1/ JLHE/GE06/JBPA/JBA2/JDCU/GXCL
10 G slots (IU33IU40) JL64/JQ16/JD16/JL16/JLQ4/JH41/JLH1/JLHE/GE06/JBPA/JBA2/JDCU
Cross-connect slots (41, 42,
43 and 44)
EXCH
6.A.2 Board Relationships
Figure 1.1 shows the relationships among the boards of the OptiX OSN 9500. Fordetails, refer to board relationships in respective sections of board principles.
Huawei Technologies Proprietary
5
-
7/28/2019 06-Chapter 6 Boards.doc
14/118
OptiX OSN 9500
Hardware Description Manual
6Boards
JPIU
JEOW
JD64/JL64/JO16/Q16/
JD16/JL16
JH41/
JLH1/
JLQ4/
EXCH/GXCH
EMPU
System
management
system
JLHE
GE06
JSCCJSTG JCOMJSTI
JBPA/
JBA2
JDCU
JPBU
JD64/JL64/
JO16/Q16/
JD16/JL16
JH41/
JLH1/
JLQ4/
GXCL
System orderwire
STM-4 & STM-1
STM-64 & STM-16
External clock
input/output
interface
GE
STM-4 & STM-1
STM-64 & STM-16
Key power
backup
System
environmentmonitoring
System working
power
System
communication
control
Inter-board
communicationSystem clock
Working
power input
External alarm
input/outputHUB power
output
JPIU
JSTG JSCC
EXCH/
GXCH
JSCC Active/standby
STM-1(e)
Figure 1.1 Board relationships
Note:The JDCU in Figure 1.1 is only connected with the optical interface board,responsible for dispersion compensation.
6.A.3 Board Appearance
Board architectures of the OptiX OSN 9500 are shown in Figure 1.1. By widths ofthe front panel, the boards fall into three types, as shown in Table 1.2.
Huawei Technologies Proprietary
6
-
7/28/2019 06-Chapter 6 Boards.doc
15/118
OptiX OSN 9500
Hardware Description Manual
6Boards
1. Power access 2. Connector 3. Captive screw
4.Board name 5. Indicator 6. Front panel
7. Ejector lever 8. Optical interface 9. Prompt
10. Power interface 11. Power switch 12. HUB power output
13. Shell
Figure 1.1 Board appearance
Note:The slot and appearance of the JFAN are not the same as those of other boards.The JFAN is installed on the fan box, responsible for fan control. There is no frontpanel on the JFAN.
Table 1.1 shows the size of the boards.
Table 1.1 Board size
Board name Size
All boards 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Widths of front panels of the OptiX OSN 9500 boards fall into three specifications,as shown in Table 1.2:
Table 1.2 Widths of the board front panel
Board name Width of front panel
EXCH/GXCH 60.96 mm, see the middle one in Figure 1.1.
JPIU 50.80 mm, see the right one in Figure 1.1.
Other boards 30.48 mm, see the left one in Figure 1.1.
Huawei Technologies Proprietary
7
-
7/28/2019 06-Chapter 6 Boards.doc
16/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Note:Always wear an ESD wrist strap when holding boards, and make sure the wriststrap is well grounded to prevent static electricity from damaging the board.
Warning:
It is strictly forbidden to stare straightly at the optical interface board and opticalinterface, lest the laser beam inside the optical fiber would hurt your eyes.
6.2 STM-64 Optical Interface Board JL64
The STM-64 optical interface board is abbreviated to JL64 hereinafter.
6.A.4 Functions and Principles
1. Functions
The JL64 integrates the transmitting and receiving of two channels of 10 Gbit/s
optical signals and performs functions such as section overhead (SOH)processing of one channel of STM-64 signals, higher order path overhead (POH)monitoring and pointer justification. It also supports ITU-T G.664.
The maximum access capacity of a single JL64 is 10 G.
The JL64 supports concatenating services in modes of VC-4-4c, VC-4-16c andVC-4-64c.
The JL64 supports mutual exclusion among inloop, outloop, non-loopback and
loopback. Non-loopback is set as the default.
The JL64 supports loopback at the optical interface. Also, it can provide
loopback alarm, cancel the loopback periodically, and insert AIS at loopback.
The output wavelength of the optical interface of the JL64 is in line with the ITU-
T Recommendation G.692, with the optical interface type being compliant with theITU-T Recommendation G.957.
The JL64 provides optical interface types of I-64.1, S-64.2b, Le-64.2, L-64.2b,
V-64.2b and 100G EA.
Items such as power feeding, environment temperature monitoring and power-
on/off control are realized through the maintenance bus (MBUS).
Items, such as communication with the JSCC, collecting and reporting the
alarm and performance events, interpreting and processing the configurationcommands sent by the network management system (NM) through the host, areimplemented by the communication channel. Through this channel, the inter-boardoverhead pass-through can also be realized when JSCC is not in position.
2. Principles
The JL64 is an interface board for 1 x STM-64 optical signals. It performs O/E and
E/O conversion, multiplexing/demultiplexing, overhead processing and pointer
Huawei Technologies Proprietary
8
-
7/28/2019 06-Chapter 6 Boards.doc
17/118
OptiX OSN 9500
Hardware Description Manual
6Boards
justification on the 1 x STM-64 SDH signals, and interchanges data between theactive and standby cross-connect boards through the high-speed bus.
Figure 2.1 shows a principle block diagram of the JL64.
POH
processing
SOH
termination
Frame
synchronization
/descrambling
SOH POH
insertion
O/EMultiplexing
/
Demultiplex
ingScrambling
1 x STM-64
optical signals
Control & communication module
Logical
control bus
Active/Standby
cross-connect
board
Inter-board
communication
Address busData bus
Slave MBUS
module
EMPUMBUS
E/O
Front panel interface Backplane interface
1 x STM-64
optical signals
Clock
processing
module
Communication bus
Active/Standby
cross-connect
board
SDH processing module
Figure 2.1 Principle block diagram of the JL64
O/E conversion module
It is responsible for the O/E or E/O conversion, signal multiplexing/demultiplexingand line clock extraction.
SDH processing module
In receiving direction, it performs framing, descrambling, overhead extraction,alarming and processing of part of the overheads within itself. Such informationcan be obtained by reading the status register inside the chip.
In transmitting direction, it inserts the overhead and implements scrambling.
Clock processing module
It locks the system clock from the clock board and generates the system clock ofitself, thus to provide the SDH processing unit and the optical signal processingunit with reference clock.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoring
module. The slave MBUS module communicates with the master MBUS modulethrough the MBUS. The MBUS unit functions temperature and voltage monitoringand the board power-on/off control.
Control and communication module
It controls the SDH processing unit, configures the services and communicateswith the JSCC. The communication between respective boards can also berealized through the JCOM, and the information transmission between boardsrequires no transfer of the system control and communication module.
In the receiving direction, it converts the overhead bytes output by the SDH signalprocessing unit and then transmits them to the JSCC.
In the transmitting direction, it receives and converts the overhead bytes from theJSCC, and then transmits them to the SDH signal processing unit and inserts
Huawei Technologies Proprietary
9
-
7/28/2019 06-Chapter 6 Boards.doc
18/118
OptiX OSN 9500
Hardware Description Manual
6Boards
them into the SDH SOH to be transmitted.
3. Board Relationships
Relationship with the JSCC
The JSCC sends configuration command and multiplex section (MS) switchingcommand to the JL64, and collects information such as alarm performancereported from the JL64.
The JL64 sends the overhead it receives to the system control and communicationmodule for processing. Meanwhile, it receives the transmission overhead from theJSCC and sends it out through the optical fiber.
Relationship with the cross-connect board
The JL64 transmits/receives service data from the GXCH/EXCH and receives thein-position signal and status signal of the cross-connect board.
Relationship with the JCOM
The JL64 communicates with other boards through the JCOM. Relationship with the JSTG
The JL64 transmits clock signal to the JSTG for selection. It also receives thesystem clock provided by the JSTG, and receives signals indicating whether theJSTG is in-position.
Relationship with the EMPU
Through the MBUS control module, functions such as controlling power-on/off,enabling/disabling power protection, monitoring power voltage and boardenvironmental temperature, and so on, can be implemented. Then, the collectedmonitoring information is sent to the EMPU for processing through the MBUS.
With its power fed by the EMPU and JPBU through backplane, the function of theMBUS is independent of the boards, thus ensuring its operation not influenced byboard power failure.
6.A.5 Front Panel
Appearance and components of the front panel are shown in Table 1.1.
Huawei Technologies Proprietary
10
-
7/28/2019 06-Chapter 6 Boards.doc
19/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1Appearance and components of the front panel
Appearance Description
RUN
ALM.JL64
IN1
OUT1
Status description of the red alarm indicator-ALM
Status Meaning Flashing
parameters
Common alarms
Normally off No alarms Normally off
The alarmindicator isnormally on,while the runningindicator isnormally off.
Self-test error Normally on
Flash three timesevery othersecond.
Critical alarmoccurs.
On for 0.3 s andoff for 0.3 s forthree times, then
off for 1 s.
R_LOS and R_LOF
Flash twice everyother second.
Major alarmoccurs.
On for 0.3 s andoff for 0.3 s twice,then off for 1 s.
MS_AIS, AU_AISand AU_LOP
Flash once everyother second
Minor alarmoccurs.
On for 0.3 s andoff for 0.3 s once,then off for 1 s.
MS_RDI, HP_TIMand HP_SLM
Status description of the green running indicator-RUN
Status Meaning Flashing parameters
Flash once everytwo seconds.
The board is operatingnormally (in-service).
On for 1 second and off for1 second.
Flash five timesevery second.
The board is not operatingnormally (not in-service).
On for 0.1 second and offfor 0.1 second.
Flash once everyfour seconds.
Database protection mode;The communicationbetween the board and theJSCC is interrupted.
On for 2 seconds and offfor 2 seconds.
Optical interface connector
LC
Size of front panel
322.25 mm (H) x 30.48 mm (W)
Huawei Technologies Proprietary
11
-
7/28/2019 06-Chapter 6 Boards.doc
20/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.6 Interface
The JL64 adopts the multi-source agreement (MSA) compliant transponder withLC optical connector and supports the ALS function. Located on the front panel of
the optical interface unit, the LC optical connector features the followingcharacteristics:
Small volume, requiring little space at the board interface, and convenient in
use.
Convenient in installation/demounting for single module, supporting hot
swapping and on-site installation.
The LC optical connector is shown in Figure 1.1.
Figure 1.1 LC optical interface
6.A.7 Parameter Configuration
Before using the JL64 for running the service, parameters should be set for itthrough the NM. Common parameter settings for the JL64 are shown in Table 1.1.
Table 1.1 Parameter configuration
Name Range and referencevalue
Meaning
J0 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the regenerator section (RS)trace byte J0 to be transmitted.
Usually the default value isselected. The settings should be the
same for the interconnectedequipments.
J0 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 to bereceived.
Usually the default value isselected. The settings should be thesame for the interconnectedequipments.
Huawei Technologies Proprietary
12
-
7/28/2019 06-Chapter 6 Boards.doc
21/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Name Range and referencevalue
Meaning
J0 received No more than 15 bytes Shows the actually received RStrace byte J0.
In normal conditions, it should bethe same as the J0 value to bereceived.
J1 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order path tracebyte J1 to be transmitted.
Usually the default value isselected. The settings should be thesame for the interconnectedequipments.
J1 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order path tracebyte J1 to be received.
Usually the default value isselected. The settings should be thesame for the interconnectedequipments.
C2 to betransmitted
Path unloaded signal, pathloaded non-specific payload,TUG structure, locked TU,asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal into
C-4, ATM, MAN (DQDB),FDDI, test signal or VC-AIS.
Default value: TUG structure
Sets the signal label byte C2 to betransmitted.
It should be set as the actual servicetype required.
C2 to bereceived
Path unloaded signal, pathloaded non-specific payload,TUG structure, locked TU,asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal intoC-4, ATM, MAN (DQDB),
FDDI, test signal or VC-AIS.Default value: TUG structure
Sets the signal label byte C2 to bereceived.
It should be set as the actual servicetype required.
Laser switch Range: enabled/disabled.
Default value: enabled.
Sets the laser on/off status of theoptical interface board.
Usually the default value isselected.
Opticalinterfacename
No more than 15 bytes It can be set as what the userwants.
Huawei Technologies Proprietary
13
-
7/28/2019 06-Chapter 6 Boards.doc
22/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.8 Specifications
Specifications for the JL64 are shown as follows:
Parameters Description
Rate 9953.280 Mbit/s
Line code pattern Scrambled NRZ
Laser class Class 1
Connector LC
Processingcapability
1 x STM-64 signal
Optical interfacetype
I-64.1, S-64.2b, Le-64.2, L-64.2b, V-64.2b, 100G EA
Size (mm) 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Width of front panel 30.48 mm
Silkscreen print JL64
Power consumption(W)
About 41 W
Weight (kg) 1
Slots available 1. When the subrack cross-connect capacity is configured as720 G, all the 40 IU slots in the subrack are available for theJL64.
2. When the subrack cross-connect capacity is configured as400 G, slots IU3IU14 and IU19IU30 on the front of thesubrack are available for the JL64.
Indices stipulated in the ITU-T Recommendations for the JL64 board are shown inTable 1.1
Table 1.1 Relevant ITU-T specifications for the optical interface
Opticalmoduletype
Launched power(dBm)
Receiversensitivity(dBm)
Overloadpoint (dBm)
I-64.1 6 to 1 < 14 > 1
S-64.2b 1 to +2 < 14 > 1
Le-64.2 +1 to +4 < 19.5 > 9
L-64.2b +13 to +15 < 26 > 3
V-64.2b +13 to +15 < 27 > 9
100 G EA 3 to 1 < 14 > 1
Huawei Technologies Proprietary
14
-
7/28/2019 06-Chapter 6 Boards.doc
23/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.3 STM-16 Optical Interface Board JO16/JQ16/JD16/JL16
The 8 x STM-16 optical interface board is abbreviated to JO16 hereinafter.
The 4 x STM-16 optical interface board is abbreviated to JQ16 hereinafter.
The 2 x STM-16 optical interface board is abbreviated to JD16 hereinafter.
The 1 x STM-16 optical interface board is abbreviated to JL16 hereinafter.
The JQ16/JD16/JL16 is basically the same as the JO16 in principle, but in terms offunctions, they are different in channel number of the SDH optical signalsaccessed. For the detailed differences in specifications, refer to the respectivesections of specifications. The following description takes the JO16 as anexample.
Table 1.2 Comparison among the JO16, JQ16, JD16 and JL16.
Items JO16 JQ16 JD16 JL16
Processingcapability 8 STM-16 4 STM-16 2 STM-16 1 STM-16
Frontpanel
8 pairs of opticalinterfaces
4 pairs of opticalinterfaces
2 pairs of opticalinterfaces
1 pair of opticalinterfaces
Processingcapability
8 x STM-16optical signals
4 x STM-16optical signals
2 x STM-16optical signals
1 x STM-16 opticalsignal
Maximumaccesscapacity
20G 10G 5G 2.5G
Opticalinterface
type
I-16, S-16.1, L-16.1 and L-16.2
I-16, S-16.1, L-16.1 and L-16.2
I-16, S-16.1, L-16.1, L-16.2, V-
16.2, Le-16.2 andU-16.2
I-16, S-16.1, L-16.1 andL-16.2
6.A.1 Functions and Principles
1. Functions
The JO16 integrates the transmission and receiving of eight channels of 2.5
Gbit/s optical signals and performs functions such as SOH processing of eightchannels of STM-16, higher order POH monitoring and pointer justification.
Huawei Technologies Proprietary
15
-
7/28/2019 06-Chapter 6 Boards.doc
24/118
OptiX OSN 9500
Hardware Description Manual
6Boards
The maximum accessing capacity of a single JO16 is 20 G.
The maximum accessing capacity of a single JQ16 is 10 G.
The maximum accessing capacity of a single JD16 is 5 G.
The maximum accessing capacity of a single JL16 is 2.5 G.
The JO16/JQ16/JD16/JL16 supports concatenated services in the modes of
VC-4-4c and VC-4-16c.
The JO16/JQ16/JD16/JL16 supports mutual exclusion among inloop, outloop,
non-loopback and loopback. Non-loopback is set as the default. It supportsloopback at the optical interface. Also, it can provide loopback alarm, cancel theloopback periodically, and insert AIS at loopback.
The output wavelength of the optical interface of the JO16 is in line with the
ITU-T Recommendation G.692, with the optical interface type compliant with theITU-T Recommendation G.957.
The JO16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2.
The optical interface module supports hot swapping.
The JQ16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2.
The optical interface module supports hot swapping.
The JD16 provides optical interface types of I-16, S-16.1, L-16.1, L-16.2, V-
16.2, Le-16.2 and U-16.2.
The JL16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2.
Supports power monitoring, environment temperature monitoring and power-
on/off controlling through the MBUS.
Items, such as communication with the JSCC, collecting and reporting thealarm and performance events, interpreting and processing the configurationcommands sent by the NM through host, are implemented by the communicationchannel. Through this channel, the inter-board overhead pass-through can also berealized in the event of JSCC not-in-position.
2. Principles
The JO16 is an interface board for 8 x STM-16 optical signals. It performs O/E andE/O conversion, multiplexing/demultiplexing, overhead processing and pointerjustification on the 8 x STM-64 SDH signals, and interchanges data between theactive and standby boards through the high-speed bus.
Figure 2.1 shows a principle block diagram of the JO16.
Huawei Technologies Proprietary
16
-
7/28/2019 06-Chapter 6 Boards.doc
25/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Figure 2.1 Principle block diagram of the JO16
Note:Each STM-16 optical signal in Figure 2.1 has its corresponding optical transceivermodule, O/E and E/O conversion unit and overhead processing unit. Same inprinciples, they are not presented respectively.
O/E conversion moduleIt performs O/E conversion and multiplexing/demultiplexing on the signal, andextracts the line clock.
SDH processing module
In receiving direction, it performs framing, descrambling, overhead extraction,alarming, and processing of part of the overheads within itself. Such informationcan be obtained by reading the status register inside the chip.
In transmitting direction, it inserts the overhead and implements scrambling.
Clock processing module
It processes the system clock and provides the SDH processing unit with working
clock.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoringmodule. The slave MBUS module communicates with the master MBUS modulethrough the MBUS. The MBUS monitors the board temperature and voltage, andcontrols the board power-on/off.
Communication and control module
It controls the SDH processing unit, configures the services and communicateswith the JSCC. The communication between respective boards can also berealized through the JCOM, and the information transmission between boards
requires no transfer of the JSCC.
Huawei Technologies Proprietary
17
-
7/28/2019 06-Chapter 6 Boards.doc
26/118
OptiX OSN 9500
Hardware Description Manual
6Boards
In the receiving direction, it converts the overhead bytes output by the SDH signalprocessing unit and then transmits them to the JSCC.
In the transmitting direction, it receives and converts the overhead bytes from theJSCC, and then transmits them to the SDH signal processing unit and inserts
them into the SDH SOH to be transmitted.
3. Board Relationships
Relationship with the JSCC
The JSCC sends configuration command and MS switching command to theJO16, and collects information such as alarm performance reported from theJO16.
The JO16 sends the overhead it receives to the JSCC for processing. Meanwhile,it receives the transmission overhead from the JSCC and sends it out through theoptical fiber.
Relationship with the cross-connect unit
The JO16 transmits/receives service data from the GXCH/EXCH and receives thein-position signal and status signal of the cross-connect board.
Relationship with the JCOM
The JO16 communicates with other boards through the JCOM.
Relationship with the JSTG
The JO16 transmits clock signal to the JSTG for selection. It also receives thesystem clock provided by the JSTG, and receives signals indicating whether theJSTG is in-position.
Relationship with the EMPU
Through the MBUS control module, functions such as controlling power-on/off,enabling/disabling power protection, monitoring power voltage and boardenvironmental temperature, and so on, can be implemented. Then, the collectedmonitoring information is sent to the EMPU for processing through the MBUS.With its power fed by the EMPU and JPBU through backplane, the function of theMBUS is independent of the boards, thus ensuring its operation not influenced byboard power failure.
6.A.2 Front Panel
Appearance and components of the front panel are shown in Table 1.1.
Huawei Technologies Proprietary
18
-
7/28/2019 06-Chapter 6 Boards.doc
27/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1Appearance and components of the front panel
Appearance Description
RUN
ALM.JO16
IN1
OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
IN8
OUT8
Status description of the red alarm indicator-ALM
Status Meaning Flashing
parameters
Common alarms
Normally off No alarms Normally off
The alarm indicator isnormally on, while therunning indicator isnormally off.
Self-testerror
Normally on
Flash three times everyother second.
Criticalalarmoccurs.
On for 0.3 s andoff for 0.3 s forthree times,then off for 1 s.
R_LOS and R_LOF.
Flash twice every othersecond.
Majoralarmoccurs.
On for 0.3 s andoff for 0.3 stwice, then offfor 1 s.
MS_AIS, AU_AIS andAU_LOP.
Flash once every othersecond.
Minoralarmoccurs.
On for 0.3 s andoff for 0.3 sonce, then offfor 1 s.
MS_RDI, HP_TIM andHP_SLM.
Status description of the green running indicator-RUN
Status Meaning Flashing parameters
Flash once every
two seconds.
The board is operating
normally (in-service).
On for 1 second and off for 1
second.
Flash five timesevery second.
The board is notoperating normally (notin-service).
On for 0.1 second and off for0.1 second.
Flash once everyfour seconds.
Database protectionmode; Thecommunication betweenthe board and the JSCCis interrupted.
On for 2 seconds and off for 2seconds.
Optical interface connector
LC
Size of front panel
322.25 mm (H) x 30.48 mm (W)
Huawei Technologies Proprietary
19
-
7/28/2019 06-Chapter 6 Boards.doc
28/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Note:The difference between the JQ16/JD16/JL16 and JO16 lies in their board namesand number of optical interfaces.
6.A.3 Interface
The optical interface connector of the JO16/JQ16/JD16/JL16 is of LC type. Referto the interface description of the JL64 for details.
6.A.4 Parameter Configuration
Table 1.1 Parameter configuration
Name Range and referencevalue
Meaning
J0 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe transmitted.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J0 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe received.
Usually the default value isselected. The settings shouldbe the same for the
interconnected equipments.
J0 received No more than 15 bytes Shows the actually receivedRS trace byte J0.
In normal conditions, itshould be the same as the J0value to be received.
J1 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order pathtrace byte J1 to betransmitted.
Usually the default value isselected. The settings should
be the same for theinterconnected equipments.
J1 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order pathtrace byte J1 to be received.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
Huawei Technologies Proprietary
20
-
7/28/2019 06-Chapter 6 Boards.doc
29/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Name Range and referencevalue
Meaning
C2 to betransmitted
Path unloaded signal, pathloaded non-specific payload,
TUG structure, locked TU,asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal intoC-4, ATM, MAN (DQDB),FDDI, test signal or VC-AIS.
Default value: TUG structure
Sets the signal label byte C2to be transmitted.
It should be set as the actualservice type required.
C2 to bereceived
Path unloaded signal, pathloaded non-specific payload,TUG structure, locked TU,
asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal intoC-4, ATM, MAN (DQDB),FDDI, test signal or VC-AIS.
Default value: TUG structure
Sets the signal label byte C2to be received.
It should be set as the actual
service type required.
Laser switch Range: enabled/disabled.
Default value: enabled.
Sets the laser on/off status ofthe optical interface board.
Usually the default value isselected.
Opticalinterfacename
No more than 15 bytes It can be set as what the userwants.
Huawei Technologies Proprietary
21
-
7/28/2019 06-Chapter 6 Boards.doc
30/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.5 Specifications
Specifications for JO16/JQ16/JD16/JL16 are shown as follows
Parameters Description
JO16 JQ16 JD16 JL16
Rate 2488.320 Mbit/s
Line code pattern Scrambled NRZ
Laser class Class 1
Connector LC
Size (mm) 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Width of front panel 30.48 mm
Silkscreen print JO16 JQ16 JD16 JL16
Weight (kg) 1.2 kg 1 kg 1 kg 1 kg
Power consumption (W) 50 W 32 W 35 W 23 W
Slots available When the subrack cross-connect capacity isconfigured as 720 G, all 32IU slots on the front of thesubrack are available forthe JO16, for example,IU1IU32.
When the subrack cross-connect capacity isconfigured as 400 G, themiddle 8 IU slots on thefront of the subrack areavailable for the JO16, forexample, IU7IU10 andIU23IU26.
When the subrackcross-connect capacityis configured as 720G, all the 40 IU slots ofthe subrack areavailable for the JQ16.
When the subrackcross-connect capacityis configured as 400G, the slots IU3IU14and IU19IU30 on thefront of the subrackare available for theJQ16.
All IU slotsof thesubrack.
All IUslots ofthesubrack.
Note: The boards JO16/JQ16/JD16/JL16 with different signal transmission distances have
different power consumptions. Those listed in the above table are their maximum power
consumption values.
Indices stipulated in the ITU-T Recommendations for the JO16/JQ16/JD16/JL16board are shown in Table 1.1
Table 1.1 Relevant ITU-T specifications for the optical interface
Optical moduletype
Launchedpower
Receiversensitivity
Overloadpoint
I-16 3 to 10 < 18 > 3
S-16.1 5 to 0 < 18 > 0
L-16.1 2 to +3 < 27 > 9
L-16.2 2 to +3 < 28 > 9
Le-16.2 +5 to +7 < 28 > 9
Huawei Technologies Proprietary
22
-
7/28/2019 06-Chapter 6 Boards.doc
31/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Optical moduletype
Launchedpower
Receiversensitivity
Overloadpoint
V-16.2 +13 to +15 < 28 > 9U-16.2 +15 to +18 < 34 > 18
6.4 STM-4/STM-1 Optical Interface Board JH41/JLQ4/JLH1
The 16 x STM-4/STM-1 optical interface board is abbreviated to JH41 hereinafter.
The 16 x STM-1 optical interface board is abbreviated to JLH1 hereinafter.
The 4 x STM-4 optical interface board is abbreviated to JLQ4 hereinafter.
The JLQ4/JLH1 is basically the same as the JH41 in functions and principles,except that the latter supports hybrid access of different channels of STM-1/STM-4SDH optical signals. Refer to the respective sections of specifications for theirspecific differences. The JH41 is taken as an example in the followingdescriptions.
Table 1.2 Comparison between the JH41, JLQ4 and JLH1
Items JH41 JLQ4 JLH1
Processingcapability
16 x STM-1, 16 xSTM-4 or mixture ofmultiple STM-1s andSTM-4s.
4 x STM-4 16 x STM-1
Front panel 16 pairs of optical
interfaces
4 pairs of optical
interfaces
16 pairs of optical
interfaces
Processingcapability
Mixture of 16 x STM-4/STM-1 opticalsignals.
4 x STM-4 opticalsignals
16 x STM-1 opticalsignals
Maximumaccesscapacity
10 G 2.5 G 2.5 G
Opticalinterfacetype
S-4.1 and S-1.1 S-4.1 S-1.1
6.A.1 Functions and Principles
1. Functions
The JH41 integrates the transmission and receiving of 16 channels of 622
M/155 M optical signals and performs functions such as SOH processing of 16channels of STM-4s or STM-1s, POH monitoring and pointer justification. It alsosupports the ALS function.
The maximum access capacity of a single JH41 is 10 G (16 x STM-4 signals).
The maximum access capacity of a single JLQ4 is 2.5 G.
The maximum access capacity of a single JLH1 is 2.5 G.
Huawei Technologies Proprietary
23
-
7/28/2019 06-Chapter 6 Boards.doc
32/118
OptiX OSN 9500
Hardware Description Manual
6Boards
The STM-4 optical interface of the JH41/JLQ4/JLH1 supports concatenated
services in VC-4-4c mode.
The JH41/JLQ4/JLH1 supports mutual exclusion among inloop, outloop, non-
loopback and loopback. Non-loopback is set as the default. It also supports
loopback at all optical interfaces, and can provide loopback alarm, cancel theloopback periodically, and insert AIS at loopback.
The output wavelength of the optical interface of the JH41 is in line with the
ITU-T Recommendation G.692, with the optical interface type being compliant withthe ITU-T Recommendation G.957.
The JH41 provides optical interfaces of S-4.1 and S-1.1 types, which can be
configured freely as the actual service required. The optical interface modulessupport hot swapping.
The JLQ4 provides optical interfaces of S-4.1 types. The optical interface
module supports hot swapping.
The JLH1 provides optical interfaces of S-1.1 types. The optical interfacemodule supports hot swapping.
Supports power monitoring, environment temperature monitoring and power-
on/off controlling through the MBUS.
Functions such as communication with the JSCC, collecting and reporting the
alarm and performance events, interpreting and processing the configurationcommands sent by the NM through host, are implemented by the communicationchannel. Through this channel, the inter-board overhead pass-through can also berealized in the event of JSCC not-in-position.
2. Principles
The JH41 is an interface board for 16 x STM-4/STM-1 optical signals. It performsO/E and E/O conversion, multiplexing/demultiplexing, overhead processing andpointer justification on the mixture of 16 x STM-4/STM-1 SDH signals, andinterchanges data between the active and standby boards through the high-speedbus.
Figure 2.1 shows a principle block diagram of the JH41.
Huawei Technologies Proprietary
24
-
7/28/2019 06-Chapter 6 Boards.doc
33/118
OptiX OSN 9500
Hardware Description Manual
6Boards
POH
processing
SOH
termination
Frame
synchronization
/descrambling
SOH POH
insertion
O/EMultiplexing
/
DemultiplexingScrambling
16 x STM-4/STM-1
optical signals
Control & communication module
Logical
control bus
Active/Standby
cross-connect
board
Inter-board
communication
Address busData bus
Slave MBUS
module
EMPUMBUS
E/O
Front panel interface Backplane interface
16 x STM-4/STM-1
optical signals
Clock
processing
module
Communication bus
Active/Standby
cross-connect
board
SDH processing module
Figure 2.1 Principle block diagram of the JH41
Note:Each STM-4/STM-1 optical signal in Figure 2.1 has its corresponding opticaltransceiver module, O/E and E/O conversion unit and overhead processing unit.Same in principles, they are not presented respectively.
O/E conversion moduleIt is responsible for O/E conversion of the signal.
SDH processing module
In receiving direction, it performs framing, descrambling, overhead and line clockextraction, alarming and processing of part of the overheads within itself. Suchinformation can be obtained by reading the status register inside the chip.
In transmitting direction, it inserts the overhead and implements scrambling.
Clock processing module
It processes the system clock and provides the SDH processing unit with workingclock.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoringmodule. The slave MBUS module communicates with the master MBUS modulethrough the MBUS. The MBUS monitors the board temperature and voltage, andcontrols the board power-on/off.
Communication & control module
It controls the SDH processing module, configures the services and communicateswith the JSCC. The communication between respective boards can also berealized through the JCOM, and the information transmission between boardsrequires no transfer of the JSCC board.
Huawei Technologies Proprietary
25
-
7/28/2019 06-Chapter 6 Boards.doc
34/118
OptiX OSN 9500
Hardware Description Manual
6Boards
3. Board Relationships
Relationship with the JSCC board
The JSCC sends configuration command and MS switching command to theJH41, and collects information such as alarm performance reported from theJH41.
The JH41 sends the overhead to JSCC board. Meanwhile, it receives thetransmission overhead from the JSCC and sends it out through the optical fiber.
Relationship with the cross-connect board
The JH41 transmits/receives service data from the GXCH/EXCH and receives thein-position signal and status signal of the cross-connect board.
Relationship with the JCOM
The JH41 communicates with other boards through the JCOM.
Relationship with the JSTG
The JH41 transmits clock signal to the JSTG for selection. It also receives thesystem clock provided by the JSTG, and receives signals indicating whether theJSTG is in-position.
Relationship with the EMPU
Through the MBUS control module, functions of the EMPU such as controlling theJH41 power-on/off, enabling/disabling power protection, monitoring power voltageand board environmental temperature, and so on, can be implemented. Then, thecollected monitoring information is sent to the EMPU for processing via the MBUS.With its power fed by the EMPU and JPBU via backplane, the function of theMBUS is independent of the boards, thus ensuring its operation not influenced byboard power failure.
6.A.2 Front Panel
Appearance and components of the front panel are shown in the following table.
Huawei Technologies Proprietary
26
-
7/28/2019 06-Chapter 6 Boards.doc
35/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1Appearance and components of the front panel
Appearance Description
RUN
ALM
.JH41
I1
O1
I2
O2
I3
O3
I5
O5
I4
O4
I6
O6
I7
O7
I8
O8
I9
O9
I10
O10
I11
O11
I12
O12
I13
O13
I14
O14
I15
O15
I16
O16
Status description of the red alarm indicator-ALM
Status Meaning Flashing
parameters
Common
alarmsNormally off No alarms Normally off
The alarmindicator isnormally on,while therunningindicator isnormally off.
Self-test error Normally on
Flash threetimes every
other second.
Critical alarmoccurs.
On for 0.3 s andoff for 0.3 s for
three times, thenoff for 1 s.
R_LOS and R_LOF.
Flash twiceevery othersecond.
Major alarmoccurs.
On for 0.3 s andoff for 0.3 s twice,then off for 1 s.
MS_AIS, AU_AISand AU_LOP.
Flash onceevery othersecond.
Minor alarmoccurs.
On for 0.3 s andoff for 0.3 s once,then off for 1 s.
MS_RDI, HP_TIMand HP_SLM.
Status description of the green running indicator-RUN
Status Meaning Flashing parametersFlash once everytwo seconds.
The board is operatingnormally (in-service).
On for 1 second and off for 1second.
Flash five timesevery second.
The board is not operatingnormally (not in-service).
On for 0.1 second and off for0.1 second.
Flash once everyfour seconds.
Database protectionmode; The communicationbetween the board and theJSCC is interrupted.
On for 2 seconds and off for 2seconds.
Optical interface connector
LCSize of front panel
322.25 mm (H) x 30.48 mm (W)
Huawei Technologies Proprietary
27
-
7/28/2019 06-Chapter 6 Boards.doc
36/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.3 Interface
The JH41 adopts the LC optical interface connector and direct fiber out-leadingmode. Refer to the interface description part of the JL64 for details.
6.A.4 Parameter configuration
Table 1.1 Parameter configuration
Name Range and referencevalue
Meaning
J0 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe transmitted.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J0 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe received.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J0 received No more than 15 bytes Shows the actually receivedRS trace byte J0.
In normal conditions, itshould be the same as the J0value to be received.
J1 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order pathtrace byte J1 to betransmitted.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J1 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the higher order pathtrace byte J1 to be received.
Usually the default value isselected. The settings should
be the same for theinterconnected equipments.
C2 to betransmitted
Path unloaded signal, pathloaded non-specific payload,TUG structure, locked TU,asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal intoC-4, ATM, MAN (DQDB),FDDI, test signal or VC-AIS.
Default value: TUG structure
Sets the signal label byte C2to be transmitted.
It should be set as the actualservice type required.
Huawei Technologies Proprietary
28
-
7/28/2019 06-Chapter 6 Boards.doc
37/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Name Range and referencevalue
Meaning
C2 to bereceived
Path unloaded signal, pathloaded non-specific payload,
TUG structure, locked TU,asynchronous mapping ofthe 34.368 Mbit/s and 44.736Mbit/s signals into C-3,asynchronous mapping ofthe 139.264 Mbit/s signal intoC-4, ATM, MAN (DQDB),FDDI, test signal or VC-AIS.
Default value: TUG structure
Sets the signal label byte C2to be received.
It should be set as the actualservice type required.
Laser switch Range: enabled/disabled.
Default value: enabled.
Sets the laser on/off status ofthe optical interface board.
Usually the default value is
selected.
Opticalinterfacename
No more than 15 bytes It can be set as what the userwants.
6.A.5 Specifications
Specifications for JLQ4/JH41/JLH1 are shown as follows
Parameters Description
JLQ4 JH41 JLH1
Rate 155.520 Mbit/s or 622.080 Mbit/s
Line code pattern Scrambled NRZ
Laser class Class 1
Connector LC
Size (mm) 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Width of front panel 30.48 mm
Silkscreen print JLQ4 JH41 JLH1
Weight (kg) 1 kg 1 kg 1 kg
Power consumption (W) 61 W 48 W 60 W
Slots available When the subrack cross-connect capacity is configuredas 720 G, all the 40 IU slots ofthe subrack are available for theJH41.
When the subrack cross-connect capacity is configuredas 400 G, the slots IU3IU14and IU19IU30 on the front of
the subrack are available for the
All IU slots. All IU slot.
Huawei Technologies Proprietary
29
-
7/28/2019 06-Chapter 6 Boards.doc
38/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Parameters Description
JLQ4 JH41 JLH1
JH41.
Note: The boards JH41/JLQ4/JLH1 with different signal transmission distances have
different power consumptions. Those listed in the above table are their maximum
power consumption values.
Indices stipulated in the ITU-T Recommendations for the JLQ4/JH41/JLH1 boardis shown in Table 1.1
Table 1.1 Optical interface specifications
Opticalmoduletype
Launchedpower (dBm)
Receiversensitivity(dBm)
Overload point(dBm)
S-1.1 15 to 8 < 28 > 8
S-4.1 15 to 8 < 28 > 8
Huawei Technologies Proprietary
30
-
7/28/2019 06-Chapter 6 Boards.doc
39/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.5 STM-1 Electrical Interface Board JLHE
The 16 x STM-1 electrical interface board is abbreviated to JLHE hereinafter.
6.A.6 Functions and Principles
1. Functions
The JLHE integrates the transmission and receiving of 16 channels of STM-1
electrical signals and performs functions such as SOH processing of 16 channelsof STM-1singnal, POH monitoring and pointer justification. It also supports the ALSfunction.
Provides 75 SMB interfaces.
The maximum access capacity of a single JLHE is 2.5 G.
The JLHE supports inloop, outloop, non-loopback and loopback. Non-loopback
is set as the default. It also supports loopback at all electrical interfaces, and canprovide loopback alarm, cancel the loopback periodically, and insert AIS atloopback.
Supports power monitoring, environment temperature monitoring and power-
on/off controlling through the MBUS.
Supports configuration of such bytes as D1, D2D12, E1 and E2 to transparent
transmission or into other unused overhead bytes.
Deals with 4 channels DCC of the 16 x STM-1electrical interfaces.
Supports various protection schemes such as 1+1 or 1:N linear MSP.
Provides abundant alarm and performance events for convenient equipment
management and maintenance. Supports smooth software upgrade and expansion.
Supports hot swapping.
2. Principles
The JLHE is an interface board for 16 x STM-1 electrical signals. It performstransmission and receiving of electrical signal, multiplexing/demultiplexing,overhead processing and pointer justification on the mixture of 16 x STM-1 SDHsignals, and interchanges data between the active and standby boards throughthe high-speed bus.
6.A.1Figure 2.1 shows a principle block diagram of the JLHE.
Huawei Technologies Proprietary
31
-
7/28/2019 06-Chapter 6 Boards.doc
40/118
OptiX OSN 9500
Hardware Description Manual
6Boards
SDH processing module
CMI/
NRZ
Control & communication module
Communication
bus Inter-board
communication
Address busData bus
Active/Standby
cross-connect board
Slave
MBUS
module
EMPU
Maintenance
bus
NRZ/
CMI
Front panel interface Backplane interface
Clock
processing
module
16STM-1
elecrical signals
Logical
control
module
Signal converting
module
16STM-1
elecrical signals
Active/Standby
cross-connect board
Figure 2.1 Principle block diagram of the JLHE
Signal converting module
It is responsible for CMI/NRZ and NRZ/CMI conversion of the signal.
SDH processing module
In receiving direction, it performs framing, descrambling, overhead and line clockextraction, alarming and processing of part of the overheads within itself. Suchinformation can be obtained by reading the status register inside the chip.
In transmitting direction, it inserts the overhead and implements scrambling. Clock processing module
It processes the system clock and provides the SDH processing unit with workingclock.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoringmodule. The slave MBUS module communicates with the master MBUS modulethrough the MBUS. The MBUS monitors the board temperature and voltage, andcontrols the board power-on/off.
Control & communication module
It controls the SDH processing module, configures the services and communicateswith the JSCC. The communication between respective boards can also berealized through the JCOM, and the information transmission between boardsrequires no transfer of the JSCC board.
3. Board Relationships
Relationship with the JSCC board
The JSCC sends configuration command to the JLHE, and collects informationsuch as alarm performance reported from the JLHE.
The JLHE sends the overhead to JSCC board. Meanwhile, it receives thetransmission overhead from the JSCC and sends it out through the cables.
Huawei Technologies Proprietary
32
-
7/28/2019 06-Chapter 6 Boards.doc
41/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Relationship with the cross-connect board
The JLHE transmits/receives service data to/from the GXCH/EXCH and receivesthe in-position signal and status signal of the cross-connect board.
Relationship with the JCOM
The JLHE communicates with JSCC board through the JCOM.
Relationship with the JSTG
The JLHE transmits clock signal to the JSTG for selection. It also receives thesystem clock provided by the JSTG, and receives signals indicating whether theJSTG is in-position.
Relationship with the EMPU
Through the MBUS control module, functions of the EMPU such as controlling theJLHE power-on/off, enabling/disabling power protection, monitoring power voltageand board environmental temperature, and so on, can be implemented. Then, thecollected monitoring information is sent to the EMPU for processing via the MBUS.With its power fed by the EMPU and JPBU via backplane, the function of theMBUS is independent of the boards, thus ensuring its operation not influenced byboard power failure.
6.A.7 Front Panel
Appearance and components of the front panel are shown in the following table.
Huawei Technologies Proprietary
33
-
7/28/2019 06-Chapter 6 Boards.doc
42/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1Appearance and components of the front panel
Appearance Description
.JLHERUNALM
RX1
TX1
RX2
TX2
RX3
TX3
RX4
TX4
RX5
TX5
RX6
TX6
RX7
TX7
RX8
TX8
RX9
RX12
RX10
RX11
RX13
RX14
RX15
TX9
RX16
TX15
TX16
TX11
TX12
TX14
TX13
TX10
Status description of the red alarm indicator-ALM
Status Meaning Flashing
parameters
Common
alarmsNormally off No alarms Normally off
The alarmindicator isnormally on,while therunningindicator isnormally off.
Self-test error Normally on
Flash threetimes every
other second.
Critical alarmoccurs.
On for 0.3 s andoff for 0.3 s for
three times, thenoff for 1 s.
R_LOS and R_LOF.
Flash twiceevery othersecond.
Major alarmoccurs.
On for 0.3 s andoff for 0.3 s twice,then off for 1 s.
MS_AIS, AU_AISand AU_LOP.
Flash onceevery othersecond.
Minor alarmoccurs.
On for 0.3 s andoff for 0.3 s once,then off for 1 s.
MS_RDI, HP_TIMand HP_SLM.
Status description of the green running indicator-RUN
Status Meaning Flashing parametersFlash once everytwo seconds.
The board is operatingnormally (in-service).
On for 1 second and off for 1second.
Flash five timesevery second.
The board is not operatingnormally (not in-service).
On for 0.1 second and off for0.1 second.
Flash once everyfour seconds.
Database protectionmode; The communicationbetween the board and theJSCC is interrupted.
On for 2 seconds and off for 2seconds.
Electrical interface connectorSMB
Size of front panel
322.25 mm (H) x 30.48 mm (W)
Huawei Technologies Proprietary
34
-
7/28/2019 06-Chapter 6 Boards.doc
43/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.8 Interface
JLHE provides 75 SMB unbalanced interface, with the maximum transmission
distance reaching 70 m.
6.A.9 Parameter configuration
Table 1.1 Parameter configuration
Name Range and referencevalue
Meaning
J0 to betransmitted
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe transmitted.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J0 to bereceived
Default value: HuaWei SBS
No more than 15 bytes
Sets the RS trace byte J0 tobe received.
Usually the default value isselected. The settings shouldbe the same for theinterconnected equipments.
J0 received No more than 15 bytes Shows the actually receivedRS trace byte J0.
In normal conditions, itshould be the same as the J0value to be received.
6.A.10 Specifications
Specifications for JLHE are shown as follows
Parameters Description
Rate 155.520 Mbit/s
Access capability 16 x STM-1 electrical signals
Line code pattern CMI
Connector SMB
Transmitting signal eyepattern
Compliant with the ITU-T RecommendationG.703
Size (mm) 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Width of front panel 30.48 mm
Silkscreen print JLHE
Power consumption (W) About 45 W
Weight (kg) About 1 kg
Huawei Technologies Proprietary
35
-
7/28/2019 06-Chapter 6 Boards.doc
44/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Parameters Description
Slots available All IU slot.
Note: That listed in the above table is its maximum power consumption value.
6.6 6-Port Gigabit Ethernet Processing Board GE06
The 6-port Gigabit Ethernet process board is abbreviated to GE06 hereinafter.
6.A.11 Functions and Principles
1. Functions
Accesses six channels of Gigabit Ethernet signals.
Supports transmission mode of 1000BASE-LX/1000BASE-SX.
Supports point-to-point Ethernet transparent transmission of the GE-to-GE
services. Controls the data flow.
Supports PPP, LAPS (X.85 or X.86) and GFP-F framing protocol.
Supports virtual concatenation and cross-connect at VC-4 level.
Maps/demaps the SDH signal.
Supports virtual concatenation and adjacent concatenation. Specifically, each
GE path corresponds to virtual concatenation in VC-4-Xv mode (where X is 1through 8 optional), or the adjacent concatenation in VC-4-Xv mode (where X is 1and 4 optional).
IEEE802.1p/IEEE802.q-supporting port feature. Supports the IEEE802.3X protocol, with adjustable transmission distance
supported by the flow control performance. At present, the optical moduleemployed has a transmission distance of 550 m or 10 km.
The optical interface module supports hot swapping.
2. Principles
The GE06 performs O/E conversion and mapping on the six channels of GigabitEthernet optical signals, and processes the Ethernet frames and overhead pointer.Through connection of the active and standby cross-connect boards throughbackplane, data exchange can be implemented and thus service grooming can be
realized consequently.Figure 2.1 shows a principle block diagram of the GE06.
Huawei Technologies Proprietary
36
-
7/28/2019 06-Chapter 6 Boards.doc
45/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Optical
transceiver
module6 Gigabit Ethernet
optical signals
communication &
Control moduleInter-board
communication
Active/standby cross-
connect board
Slave MBUS
module
EMPUMBUS
Front panel interface Backplane interface
Clock
processing
module
6 Gigabit Ethernet
optical signals
Communication bus
Data processing and mapping module
Data bus
Active/standby cross-connect board
Data bus
Figure 2.1 Principle block diagram of the GE06
Optical transceiver module
It performs O/E and E/O conversion on the Ethernet interface signal. The GE06uses the LC optical connector, which is located at the front panel of the opticalinterface unit.
Data processing and mapping module
It includes physical layer (PHY), medium access control layer (MAC) and mappingprocessing part.
In receiving direction, the PHY implements data recovery, clock extraction,
serial/parallel conversion and decoding on the Ethernet input signal. In thetransmitting direction, it performs signal parallel/serial conversions.
Being compliant with IEEE 802.3, the GMAC judges and counts the Ethernet dataand performs flow control on it. It will discard the error packets passing by andreports the error information to the JSCC board.
The mapping processing part maps/demaps the SDH signals, processes thevirtual concatenation at VC-4 level, and performs HDLC, LAPS and GFP- Fencapsulation/de-encapsulation of the data.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoringmodule. The slave MBUS module communicates with the master MBUS moduleon the EMPU through the MBUS. The MBUS monitors the board temperature andvoltage, and controls the board power-on/off.
3. Board Relationships
Relationship with the JSCC board
The JSCC sends configuration command to the GE06, and collects informationsuch as alarm performance reported from the GE06.
Relationship with the cross-connect unit
The GE06 transmits/receives service data from the GXCH/EXCH and receives thein-position signal and status signal of the cross-connect board.
Relationship with the JCOM
Huawei Technologies Proprietary
37
-
7/28/2019 06-Chapter 6 Boards.doc
46/118
OptiX OSN 9500
Hardware Description Manual
6Boards
The GE06 communicates with other boards through the JCOM.
Relationship with the JSTG
The GE06 receives the system clock and frame header signal from the JSTG.
Relationship with the EMPUThrough the MBUS control module, functions of the EMPU such as controlling theGE06 power-on/off, enabling/disabling power protection, monitoring the powervoltage and board environmental temperature, and so on, can be implemented.Then, the collected monitoring information is sent to the EMPU for processing viathe MBUS. With its power fed by the EMPU and JPBU via backplane, the functionof the MBUS is independent of the boards, thus ensuring its operation notinfluenced by board power failure.
6.A.12 Front Panel
Appearance and components of the front panel are shown in Table 1.1.
Huawei Technologies Proprietary
38
-
7/28/2019 06-Chapter 6 Boards.doc
47/118
OptiX OSN 9500
Hardware Description Manual
6Boards
Table 1.1Appearance and components of the front panel
Appearance Description
RUN
ALM.GE06
I1
O1
I2
O2
I3
O3
I5
O5
I4
O4
I6
O6
Status description of the red alarm indicator-ALM
Status Meanin
g
Flashing
parameters
Common alarms
Normally off No alarms Normally off
The alarmindicator isnormally on, whilethe runningindicator isnormally off.
Self-testerror
Normally on
Flash three timesevery othersecond.
Criticalalarmoccurs.
On for 0.3 s andoff for 0.3 s forthree times, then
off for 1 s.
R_LOS andLINK_ERR.
Flash twice everyother second.
Majoralarmoccurs.
On for 0.3 s andoff for 0.3 s twice,then off for 1 s.
AU_AIS, AU_LOP andAU_CMM
Flash once everyother second.
Minoralarmoccurs.
On for 0.3 s andoff for 0.3 s once,then off for 1 s.
HP_TIM and HP_SLM
Status description of the green running indicator-RUN
Status Meaning Flashing parameters
Flash onceevery twoseconds.
The board is operatingnormally (in-service).
On for 1 second and offfor 1 second.
Flash five timesevery second.
The board is not operatingnormally (not in-service).
On for 0.1 second and offfor 0.1 second.
Flash onceevery fourseconds.
Database protection mode;The communication betweenthe board and the JSCC isinterrupted.
On for 2 seconds and offfor 2 seconds.
Optical interface connectorLC
Size of front panel
322.25 mm (H) x 30.48 mm (W)
Huawei Technologies Proprietary
39
-
7/28/2019 06-Chapter 6 Boards.doc
48/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.13 Interface
The GE06 employs the LC optical interface connector. Refer to the interfacedescription part of the JL64 for details.
6.A.14 Parameter configuration
Table 1.1 Parameter configuration
Domain Description
Time interval of adjacentpackets (8 ns)
Time interval of the two adjacent packetstransmitted.
Max. packet length Maximum length of the packet.
Dead time after flowcontrol packettransmission (512 ns)
Dead time after the flow control packet istransmitted.
Auto-negotiationenabling
Range: disabled/enabled. Default value: enabled.
Counter of correctpackets in receivingdirection
Number of correct packets received.
Counter of error packetsin receiving direction
Number of error packets received.
Counter of all packets inreceiving direction
Number of all packets received.
Optical interfaceloopback Sets whether to loop back the optical interface.Range: inloop, outloop and non-loopback. Defaultvalue: non-loopback.
Data encapsulationprotocal
Refers to the data encapsulation protocol of theport.
Laser switch Controls the laser switch.
Range: enabled/disabled. Default value: enabled.
Flow control Controls the flow.
Huawei Technologies Proprietary
40
-
7/28/2019 06-Chapter 6 Boards.doc
49/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.A.15 Specifications
Parameters Description
Transmission rate 1000 Mbit/s
Size 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Weight (kg) 1.9 kg
Power consumption(W)
70 W
Width of front panel(mm)
30.48 mm
Processingcapability
Six channels of GE signals.
Laser class Class 1
Interface Type LC
Slots available When the subrack cross-connect capacity isconfigured as 720 G, all the 40 IU slots of the subrackare available for the GE06.
When the subrack cross-connect capacity isconfigured as 400 G, the slots IU3IU14 and IU19IU30 on the front of the subrack are available for theGE06.
Huawei Technologies Proprietary
41
-
7/28/2019 06-Chapter 6 Boards.doc
50/118
OptiX OSN 9500
Hardware Description Manual
6Boards
6.7 General High Order Cross-Connect Board GXCH
The General high order cross-connect board is abbreviated to GXCH hereinafter.
Note:Two cross-connect boards of the same type are recommended for the 1+1 hotbackup for the sake of protection, for example, you can use either two GXCHs ortwo EXCHs, but no hybrid configuration is allowed.
6.A.16 Functions and Principles
1. Functions
A single board supports a cross-connect capacity of 200 G, and a single
subrack, 400 G. It implements flexible service grooming at VC-4 granularity, including loopback,
cross-connect, multicast and broadcast.
It supports the 1+1 protection at board level, with the active and standby boards
backing up each other. In the event that the active board goes faulty, the servicecan be reliably switched over to the standby board automatically. The slots 41 and42 provide hot backup for each other, so do the slots 43 and 44.
Note:The cross-connect board hot backup is of binding protection scheme, for example,when switching occurs, the cross-connect boards in both the upper and lower
frames will perform switches simultaneously.
When services are configured to/deleted from the GXCH as response to the
service configuration send by the JSCC, it will bring no negative effect to theoriginal services configured.
Through the communication bus, the GXCH implements the configuration sent
by the JSCC and sends the signal indicating completion of sending of theconfiguration from the JSCC back to the relevant boards. It also reportsinformation such as performance, status and alarm of itself to the JSCC.
It provides perfect performance and alarm reporting, very convenient inmaintenance.
2. Principles
The GXCH is chiefly responsible for the higher order service grooming andprotection. It implements unblocked cross-connection of the 1280 x 1280 VC-4services, which are equivalent to a cross-connect capacity of 200 G x 200 G. Thecross-connect capacity of a single subrack is 400 G, fulfilled by the cross-connectboards on both the upper and lower frames, who possess a cross-connectcapacity of 200 G respectively. The principle block diagram of the GXCH is shownbelow.
Huawei Technologies Proprietary
42
-
7/28/2019 06-Chapter 6 Boards.doc
51/118
OptiX OSN 9500
Hardware Description Manual
6Boards
communication &
Control board
Communication busInter-board
communication
Slave
MBUS
module EMPUMBUS
Front panel interface Backplane interface
Clock
processing
module
cross-connect matrix
(1280 x 1280 VC-4 )
System clock
Frame header signal
Data bus
Service board
JSTG
Data bus
Figure 2.1 Principle block diagram of the GXCH
Cross-connect matrix
It implements unblocked cross-connection of multicast and broadcast services andfull cross-connection of the 1280 1280 VC-4 services. Functions such asbroadcast, multicast and loopback to the services can be performed through thisunit. The cross-connect matrix unit connects with the service bus of the opticalinterface board through backplane.
Clock processing module
It provides system clock and frame header signal from the active and standbyclock boards for the cross-connect unit.
Communication & Control module
It provides the communication channel and control signals.
Slave MBUS module
The MBUS unit is an MBUS-based maintenance and environment monitoringmodule. The slave MBUS module communicates with the master MBUS modulethrough the MBUS. The MBUS functions monitoring of the board temperature andvoltage.
3. Board Relationships
Relationship with the JSCC board
It reports the performance and alarm data of itself to the JSCC and receives thecontrol command and parameter configuration from the JSCC.
Relationship with the optical interface board
It receives the service signal from the optical interface board and then sends it tothe optical interface board after cross-connection