0.3 arsitektur mikrokontroler

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APLIKASI MIKROKONTROLER DTG2K3 (3 sks)

Transcript of 0.3 arsitektur mikrokontroler

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APLIKASI MIKROKONTROLER

DTG2K3

(3 sks)

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0.3 Arsitektur mikrokontroler dan spesifikasinya

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Arsitektur Mikrokontroler / Prosesor

• Based on the instruction set are CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer)

• Based on the memory architecture are Harvard architecture and Von Neumann architecture

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CISC vs RISC

• CISC are hardware optimized, complex instruction, greater machine cycle per instruction e.g. 12 clocks, hardware circuitry more complex, draws greater power consumption

• RISC are software optimized (compiler), simpler instruction, lower machine cycle per instruction e.g. 1 clocks, simpler hardware circuitry, draws lower power consumption

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Arsitektur Von-Neumann

• Hanya mempunyai satu blok memori dan 8-bit bus data

• Akibatnya program dan data diproses secara bergantian, tidak bisa langsung bersamaan

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Arsitektur Harvard

• Memiliki dua bus data yang berbeda

• Program dan data dapat diproses bersamaan

• Memudahkan pada saat menghitung keperluan memori bagi suatu aplikasi

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Harvard vs. Von Neumann• Harvard micro architecture

: separate between program and data, faster execution, e.g. Intel MCS-8051, Atmel AVR, Microchip PIC, Texas Instrument DSP, ARM (Advanced RISC Machine)

• Von Neumann : merge between program instruction and data, simpler hardware interface, e.g. Intel IAPx-86 (80x86 up to Pentium 4, Core)

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Arsitektur AVR

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Single Cycle Execution

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High Code Density

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High Integration

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Single-chip Solution

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AVR single-chip solution