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IEEE TKANSACTI3NS ON ELECTRONDEVICES, VOL. ED-26, NO. 11 NOVEMBER 1978 6
Briefs
Field Induced Reemissionof Electrons Trapped inSO z
L FORBES, E. SUN, R. ALDERS, AND J MOLL
Abstract-A new form of ho t electron njection and rapping in n-chan nel IGFET’s is descr ibed, a necessary and sufficien t conditi on far
the emission of these trapped electrons is a reset pulse of negative gate
and positive drain voltages. The effectof this trapping on device
characteristics, reliability, and the proposed low-temperature operation
of IGFET’s is discussed.
Electron injection and trapping in silicon dioxide is a topic
of considerable mportance n ntegrated-circuit development
and reliability. Abbas and Dockerty [ l [ 2 ] were among the
first to docu ment the changes in IGFET characteristics cauaed
byhotelectron njection nto heoxideandconsequentlyshiftsn device haracteristics. Ning [3] , 4 ] has ecently
reported on not only such electron injection but in addition
the hermal reemission of these lectrons rom heoxide,
which he has characterized by low-temperature measurements.Low-temperature operation hasalso beenproposedfor nte-
grated circuits to ake advantage of the increase n mobility
and improved performance [5 ] - 71 . As Keyes e t al [ 5 ] E~US-
pected and postulated, new reliability imits would be found
forow-temperatureperation ; we will demon stratehat
this is in fact imposed in the case of IGFET’s by electron in-
jection into the oxide which results in permanent change:; in
conduct ivity under normal operating conditions and whic.h is
greatly ccelerated t ow emperatures.These changes are
so large and fast that in reality no advantage in performance
for MOSFET’s is likely to be achievedby low-temperature
operation.
Like Ning, we have observed electron injection into the oxide
andbot h he her mal reemission and ermanentrapping
which will not thermally reemit at room temperatures. How-
ever, on good-quali ty ox ides such as used in current integratedcircuitshere is nohermalemission,atherhiseport
demonstra tes that a reset pulse of negative gate voltages and
positive drain voltages is a necessary and sufficient condition
to cause field induced reemission on n-channel IGFET’s.
A striking illustration of these effects is given by the set of
curve-tracercharacteristics nFig. 1. Fig. l( a) shows nn-
channel GFETat77Kbefore tress; Fig. l( b) shows he
same device afte r he drainvoltagehas been increased to
allow for avalanche mult iplication of elec trons earhe
drain and subsequent njection nto he oxide. The effect of
stress has been to cause a arge shift in the threshold voltage
at the drainend of thechannel, so large n fact hat he
transistor will not urnonwith henorma l ange of gatevoltages unti l there s sufficient drain voltage t o punch through
this ormally ffegion.Therapped lectrons will no t
Manuscript received January 3, 197 9; revised May 2 9, 19 79.L Forbes was with he Integrated CircuitsLaboratory,Hewlett-
Packard, Palo Alto,CA, on leave rom heUniversity of California,
California, Davis, CA 9 56 16.Davis, CA 95 616 . He is with the College of Engineering, University of
E. Sun, R. Alders, andJ Moll are with the Integrated Circuits Labora-tory, Hewlett-Packard,Palo Alto, CA 94304.
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Shortn-channel GFETdeviceJMSCl: W / L = 4 um/3 urn
k F E T characterist ics at 77 K after successive stress, reset and stresvoltage conditions. a) FET characteristics at 77 K. b) FE T characteristics after stress at 77 K c) FET characteristics after reset withnegative gate and p ositive drain voltages. d) FE T ch aracteristics aftehigh stress at 77 K
~ .
thermally eemitand hesecharacteristics willpersist if the
device is warmed to room tempe rature. They will in fact only
bake out by extended times athigh temperatures like +200° Cand are unlike he results reported by Ning where most are
thermally eemittedat ow emperatures.The rapped elec
trons can, however, be removed by field induced reemissionby applying negative gate voltage and positive drain voltage.
This sets up a large reverse electric field in the oxid e and wil
remove th e electrons rapped n heoxide near th e drain
Fig. l(c) sh ows the FET haracteristics after such a reset cycl
where it has reverted to its original characteristics as shown in
Fig. l(a). Fig. l( d) shows he FET’s characteristicsat 77 Kafter another stresscycle.
The trapped electrons can in fact be reemitted by applying
only a negative gate voltage, however, the rat e at which th e
device will reset is extremely slowndicating tha t aarge
reverse field in the ox ide is required for reemission. In similar
measurements on p-channel devices to be reported at a later
date , we have found no evidence of hole injection but rather
under the most severe stress conditions only residual electron
injection.Thuswedonot believe th e reset sdue to hole
injection [SI [91,but ather sdue o he field-inducedreemission of the trappe d electrons.
The natureof these conductance changes havebeen character
ized by using an automated calculator-controlled measuremen
system t o apply imed sequences of stress and measurement
voltage conditions [ 101. One of these is shown n Fig. 2whe re the small signal ac drain conductance is measured first
at time “ A ” the device is stressed by a large drain voltage, and
0018-9383/79/1 100-1816 00.75 979 IEEE
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1817EEE T RANSA CTION S ON ELECTRON DEVICES VOL. ED-26, NO. 1 1 , NOVEMBER 1979
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1818 IEEE TRANSACTIONS ON ELECTRONEVICES,OL. ED-26 , NO. 1 1 , NOVEMBER 197
the conducta nce gain measured at time“ ” and the difference
in these measurementslottedsemperature is varied.
Between hesecyclesandwhile the empera ture is changing
the reset condition of negative gate and positive drain oltages
are applied. The time diagram is shown at the bot tomof Fig.
2. Clearly there is a large acceleration in the changes at low
temperatures.This igure also shows he esults if no reset
pulse is applied t o he device, there is no changebetween
measurement imes ndicating eset is a necessaryconc.ition.
The same system has been used to plot conductance changes
versus time at room emperatu re; he same largechanges in
device characteri stics occur but only over much onger imeperiods.Fig. 3 shows he ime dependence of he stress and
reset conditions at77 KA large number of variables are clearly important factors in
determining the magnitude f these changes [ 11 [2] ; owever,
the following pproximate ccelerationactors ave een
deduced; V n where V is voltageand n is around 10, T - m ,
where T is temperature in Kelvin and r is around 3, and t l t l
where t is imeand 1 is around 4. Largechangescanoccur
in IGFET haracteristics over lon g imeperiods tmom
temperature, there is no apparent saturation in this trapping,
which is a fundamental reliability limit 1 [ 21These acceleration factorsalso clearly preclude any advantage
to be gained from operation of IGFET circuits at low t empera-
tures. Because of the accelerated changes due to electron in-
jecti on, lower voltages must be used. It is not just the mohil ity
which determines IGFET performance but rather the prcductof mobility and voltage. In fact, hese effects might beused
to advantage in constructinga very simple electrically alterable
READONLY memory E A R O M) , considerable rocess nd
power supply simplic ity might be achieved over othe r cu::rent
designs by cooling during programming. Recently very dgnif-
icant advances have been made n Joule-Thomson refrigerators
for low-temperature cooling.
Using the field induced reset conditions of negative gate and
positive drain voltages on n-channel IGFET’s serves to ma ke
the changes aused byelectron njectionveryevidentand
allows a veryconvenient echnique or hecharacterization
of the magnitude, time dependence, and temperature depen-
denceof hese changes.Similar electron njectionhasalso
beenobserved on p-channeldevices,whoseconductance n-
creases after stress.
REFERENCES
S A. Abbas and R. C. Dockerty, “N-Channel IGFET Limitations
due to hot electron trapping,” in Proc.975
nt. Electron DevicMee t . pp. 35-38, 1915.“Hot carrier nstability in IGFETs,” Appl .Phys .Le t t .
V O ~ . 7, pp. 147-148, AUg., 1977.T H. Ning,“Shallow-levelelectron raps in SiOZ,” presentedat 1 9 7 8 ElectronDeviceResearch Conf., SantaBarbara,CA.Abstracts published in IEEE Trans. Electron Devices vol. ED-25p. 1348, Nov. 1978.
Phys. to be published.R. W Keyes, E. P Harris, and K. L. Konnerth, “The role of lowtemperatures in the operation of logic circuitry,” in Proc. IEEEvol. 5 8 , pp. 1914-1932, Dec. 1970.R. W Keyes, “Low emperature high mobility ransistor mate-rials,”Commun.Sol idS ta tePhys . vo l . 8 , n o . 2,pp. 37-46, 1977.
Solidstate Phys. vol. 8, no. 3, pp. 47-53, 1977.H. Hara et al . “A new instability in MOS transistors caused by
hot electronandhole njection romdrainavalancheplasmaintogateoxide,” Jap. J Appl.Phys. vol. 9, pp. 1103-1112,1970.C.Bulucea, Avalanchenjection into oxides in silicongate
‘‘Thermal reemissionof trapped electrons in SiO2, J. Appl
“Semiconductor devices at low temperatures,” Commun.
controlled devices:Theory,” Solid-stateElectron. vol. -18DD 3 6 3 - 3 7 4 . 1 9 7 5 .L. Forbes and U. Kaempf, “Capacitance and conductance deeplevel transient spectroscopy using HP-IB instruments and a desktop computer,” Hewlett-Packard J. vol. 30 no 4 , pp. 29-32,1979.