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SIX MONTHS INDUSTRIAL TRAINING REPORT (Batch – 2007) On “Embedded System and PCB design” In partial fulfillment of the degree of Bachelor of Technology in Electronics and communication Engineering AT “INNOVATIVE PROJECT SOLUTIONS” SCO-54, New Grain Market, Gill Road, Ludhiana-141003 (www.ludhianaprojects.com ) Submitted to Dr. Rajneesh Talwar Professor & Head (ECE) Guided by Submitted by Mr. Arun Bansal Nishat Gupta 1
Transcript of trainingludhiana.intrainingludhiana.in/wp-content/uploads/2017/06/FINAL... · Web view7th Sem....
SIX MONTHS INDUSTRIAL TRAINING REPORT
(Batch – 2007)
On“Embedded System and PCB design”
In partial fulfillment of the degree of Bachelor of Technology in Electronics and communication Engineering
AT
“INNOVATIVE PROJECT SOLUTIONS”
SCO-54, New Grain Market, Gill Road, Ludhiana-141003
(www.ludhianaprojects.com)
Submitted to
Dr. Rajneesh Talwar
Professor & Head (ECE)
Guided by Submitted by Mr. Arun Bansal Nishat Gupta
(Training Head, Electronics) Uni. Roll No - 7840408418
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
RIMT-INSTITUTE OF ENGINEERING AND TECHNOLOGY
MANDI GOBINDGARH-147301
1
01765-241407, 241507, FAX-01765-241405, www.rimt.ac.in
Preface
Every professional course may not be considered completed till the student has practical
knowledge about it. To fulfill this requirement, a practical training must be done.
B.Tech has become a sort of prerequisite to a successful career in electronics and computers in
today’s competitive environment. Electronics and computers basically stress on doing things practically.
It is essential that practical field experience be gathered which puts to test the classroom learning because
we never came across problems, which can be solved using standard solution. Thus in the absence of
practical training, classroom learning is highly handicapped.
This project is being accomplished by me as a part of this training to partially fulfill the
requirements of completion of the degree course I am pursuing, keeping in mind the importance and
relevance of this project to my future professional life.
This project work provided me ample opportunity of handling things practically, in knowledge of
embedded system and PCB designing and other various tools used in development of this project.
In the forthcoming pages, an attempt has been made to present a comprehensive report on the
different aspects of my development work.
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Acknowledgement
I take this opportunity to express my profound sense of gratitude and respect to all those who
helped me throughout the duration of this project. I acknowledge the effort of those who have
contributed significantly to my project. I feel privileged to offer my sincere thanks and deep sense of
gratitude to Mr. Arun Bansal (Sr. Project Developer & Training Co-coordinator) for expressing their
confidence in me by letting me work on a project and using latest technologies and providing
support, help & encouragement in implementing this project.
NISHAT GUPTA
ECE
7th Sem.
B.Tech
Univ. Roll No: 7840408418
RIMT-IET, MandiGobindgarh
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Declaration
I hereby declare that the report work entitled "Embedded System & PCB designing” is an
authentic record of my own work carried out at INNOVATIVE PROJECT SOLUTION as
requirements of Six Months Industrial Training in 7th semester for the award of Bachelor’s
Degree of Technology in Electronics & Communication Engineering at RIMT Institute of
Engineering & Technology, Mandi Gobindgarh, under the guidance of Mr. Arun Bansal (Sr.
Project Developer & Training Co-coordinator, Electronics) during 1st JULY 2010-31st
DEC2010.
NISHAT GUPTA
(Univ. Roll No: 7840408418)
Date: ____________________
Certified that the above statement made by the student is correct to the best of our knowledge
and belief.
Mr. Arun Bansal(Director & Sr. Project Developer)
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INNOVATIVE PROJECT SOLUTION
CONTENTS
S.No. Title Page No.
(A) COMPANY PROFILE …………………… 1
Chapter (1) POWER SYSTEM DESIGN……………… 4
(1.1) Unregulated power supply …………………….. 4
(1.2) Regulated power supply ……………………….. 4
(1.3) Constant positive voltage regulators ……………….. 5
(1.3.1) Table………………………………………………… 5
(1.4) Constant negative voltage regulators……………….. 5
(1.4.1) Table………………………………………………… 5
(1.5) Variable voltage regulators ………………………. 5
(1.6) LM317 3-Terminal Adjustable Regulator………….. 6
(1.6.1) General Description………………………………… 6
(1.6.2) CIRCUIT DIAGRAM OF LM317…………………. 7
(1.6.3) Features……………………………………………… 7
(1.6.4) Packages of LM317...................................................... 8
(1.6.5) LM117 circuit diagram……………………………… 8
(1.6.6) Protection Diodes………………………………….. .. 9
(1.7) LM337 3-Terminal Adjustable Regulator………… 10
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(1.7.1) General Description………………………………... 10
(1.7.2) LM317 circuit diagram……………………………. 10
(1.7.3) Pin diagram of LM337…………………………….. 11
(1.7.4) Features…………………………………………….. 11
Chapter (2) EMBEDDED SYSTEM………………….. 12
(2.1) Introduction………………………………………. 12
(2.1.1) Embedded System Applications…………………. 12
(2.1.2) Difference between MICROPROCESSORS and
MICROCONTROLLERS…….............................. 13
(2.1.3) Disadvantages of MICROPROCESSORS over
MICROCONTROLLERS………………………… 13
(2.2) Types of microcontroller architecture……............... 13
(2.2.1) Difference between CISC and RISC…………….. 14
(2.3) History of 8051……………………………………. 14
(2.3.1) Features Table……………………………………. 14
(2.3.2) 8051 Architecture Overview……………………… 15
(2.3.3) Block diagram of 8051…………………………… 16
(2.3.4) Internal Architecture of 8051…………………….. 17
(2.3.5) Pin configuration of 8051………………………… 18
(2.3.6) Table………………………………………………. 21
(2.4) AT89s8252…………………………………………. 22
(2.4.1) Features…………………………………………….. 23
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(2.4.2) Pin Description……………………………………. 24
(2.4.3) Table………………………………………………. 25
(2.4.4) Hardware interfacings and programming ………… .25
(2.4.5) Hardware interfacings and programming ………… 26
(2.4.6) Programming in assembly language……………… 26
(2.4.4.6a) Introduction……………………………………….. 26
(2.4.7) Basic instructions…………………………………. 27
(2.5) THE 8051 INTERRUPTS…………………………. 30
(2.6) ELECTROMAGNETIC RELAYS………………… 31
(2.7) INTERFACING OF VARIOUS DEVICES………… 32
(2.7.1) LED Interfacing……………………………… 32
(2.7.1a) C code for Blinking LED connected on PORT2…….. 33
(2.7.1b) C code for running LED connected on PORT2………. 34
(2.7.2) Hardware interfacing of LCD (JHD162A)…………… 36
(2.7.2a) Table…………………………………………………. 37
(2.7.2b) Hardware interfacing of LCD with AT89s52
Microcontroller………………………………………… 38
(2.7.2c) C code for LCD display………………………………… 39
(2.7.2d) C code for string display on LCD………………………. 42
(2.7.3) ADC-0804 interfacing with AT89s52…………………. 45
(2.7.3a) Features……………………………………………….. 45
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(2.7.3b) PIN DIAGRAM OF ADC-0804……………………… 47
(2.7.4) Serial communication between At89s8252 and PC…… 48
(2.7.4a) Serial Transmission……………………………………. 48
(2.7.4b) C- code for serial transmission ………………………… 49
(2.7.4c) Serial Reception ……………………………………….. 51
(2.7.4d) C- code for serial reception…………………………….. 52
(2.7.5) Interfacing of seven segment display…………………… 56
(2.7.5a) C code for seven segment display……………………… 57
Chapter (3) OrCad 10.5…………………………………….. 60
(3.1) Circuit Design Steps in OrCad 10.5……………………. 60
(3.1.1) Entry of Schematic Diagram…………………………… 60
(3.1.2) The Schematic Page Editor…………………………….. 60
(3.1.3) Schematic Diagram……………………………………… 61
(3.1.4) The Part editor…………………………………………… 61
(3.1.5) The Session Log……………………………………….. 61
(3.1.6) Schematic diagram…………………………………….. 62
(3.1.7) The Toolbar……………………………………………. 62
(3.1.8) The Tool Palette………………………………………. 63
(3.1.9) The schematic page editor tool palette…………………. 63
(3.1.10) The part editor tool palette……………………………… 63
(3.1.11) Selecting and deselecting of objects……………………. 64
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(3.1.12) To select an object……………………………………… 64
(3.1.13) To select multiple objects……………………………… 64
(3.1.14) To deselect objects……………………………………… 64
(3.1.15) Creation of net list in capture………………………….. 64
(3.2) CREATING A SCHEMATIC
DESIGN IN CAPTURE… 65
(3.2.1) Creating a project………………………………… 65
(3.2.2) Renaming the schematic folder and
the schematic page… 65
(3.2.3) Creating a flat design……………………………… 66
(3.2.4) Adding parts to schematic………………………… 66
(3.2.5) Connecting parts…………………………………… 68
(3.2.6) Adding ports……………………………………….. 69
(3.2.7) Creating a hierarchical design………………………...... 70
(3.2.8) Creating the full adder design……………………... 70
(3.2.9) Adding Collector Voltage…………………………. 74
(3.2.10) Adding Ground………………………………... 74
(3.2.11) Generating parts for a schematic…………………. 75
(3.2.11 ) Processing a design………………………………………. 76
(3.2.12) Adding part references……………………………. 76
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(3.2.13) Creating a cross reference report…………………. 78
(3.2.14) Generating a bill of materials…………………. 79
(3.2.15) Design rules check……………………………….. 80
Chapter (4) PCB Design Soft wares…………………. 82
(4.1) OrCad……………………………………………………. 82
(4.1.2) DESIGN ENVIOURMENT…………………………….. 83
(4.1.3) Technique Used For PCB Design………………… 84
(4.1.4) BASIC DESIGN STEPS IN CAD- SYSTEM…………… 86
(4.1.5) A TRADITIONAL DESIGN FLOW IN CAD- SYSTEM… 87
(4.2) PSpice…………………………………………………… 88
(4.2.1) Objective……………………………………………….. 88
(4.2.2) Simulation using PSpice…………………………… 88
(4.2.2) Simulation using PSpice…………………………… 89
(4.2.4) Files generated by PSpice……………………………….. 89
(4.2.5) Analysis types…………………………………… 90
(4.2.5a) Overview of the full adder design…………………..90
(4.2.5b) Simulating the full adder design…………………. 91
(4.2.6) Editing a simulation profile……………………… 91
(4.2.7) Running PSpice……………………………………. 92
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(4.2.8) Viewing Output Waveforms…………………………….. 93
4.2.9) Place markers……………………………………………. 94
(4.2.10) Add Plot Window template……………………………………………. 96
(4.2.11) Add complex traces……………………………………….. 97
(4.2.12) Configuring the Probe window………………………….. 97
(4.2.13) Performing parametric analysis…………………………. 98
(4.2.14) Adding a variable circuit parameter……………………. 99
(4.2.15) Adding a Plot Window Template marker………………. 100
(4.2.16) Setting up parametric analysis…………………………. 101
(4.2.17) Running the simulation…………………………….
102
(4.2.18) Exporting output waveforms…………………………… 102
(4.3) Layout Plus…………………………………………….. 104
(4.3.1) Introduction ..................................................................... 104
(4.3.2) Layout master workflow………………………………… 104
(4.3.3) Repetition of the steps for board design………………… 105
(4.3.4) Setting board parameters……………………………….. 107
(4.3.7) Creating of board outline………………………………… 107
(4.3.8) Placement of components………………………………… 107
(4.3.9) Conductor Routing in Layout……………………………. 108
(4.3.10) Design Rule Check………………………………………. 108
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(4.3.11) Post processing…………………………………………… 109
(4.3.12) Component Placemen……………………………………. 109
(4.3.13) Manual Placement……………………………………… 109
(4.3.14) Automatic Placement……………………………………. 109
(4.3.15) Automatic placement board…………………………….. 110
(4.3.16) Board Routing…………………………………………. 111
(4.3.17) Manual Routing…………………………………………. 111
(4.3.18) Auto Routing……………………………………………. 112
(4.3.19) Fabricating the Layout……………………………………. 114
BIBLIOGRAPHY………………… ………. 126
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(www.ludhianaprojects.com)
(A) Company Profile
Innovative Project Solutions is a prestigious name for embedded system products and solutions,
enabling Engineers and system development companies to rapidly and cost effectively innovate,
differentiate, and win in their markets. The top management has hands on experience in the
design, development and manufacture of microcontroller based systems.
With latest industrial equipments, instruments and soft wares we provide a complete set of
engineering package for development of existing and new projects. We provide complete
solution in project designing and developing phase for industries.
With our high-level expertise in cutting edge technologies including Embedded Software
Development, Electronic design Automation, Real-time systems, VHDL, Development Boards.
We offer product design and development services and technical consultancy to companies who
are interested to out-source whole or a portion of their design jobs.
The Training in Innovative is offered in the areas of Embedded Systems Design, ARM,
Electronic Design Automation and VLSI. The course content is designed keeping in mind the
current and future requirements of the industry. We also interact regularly with technical
members of renowned industries to verify the relevance of the content to the industry expectation
and upgrade the content accordingly. This up-gradation happens every six months.
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Training Program in Embedded Systems aims at offering application oriented training to
students, and thereby provides for bridging the gap between industry's requirement and students'
skill sets.
Infrastructure
Well furnished Classrooms, Lab with systems, Hardware Lab
Class rooms are equipped with better seating arrangements
3 Labs with over 50 Systems to offer systems to the students on 1:1 ratio
Labs: All the systems are with Ubuntu Linux and Windows.
Labs are open for the students for practical training and to gain more knowledge on
embedded domain
Hardware Lab is equipped with 8051, ARM, PIC Microcontroller kits with accessories to
facilitate experiments on interfacing and hardware. Customized kits are also made
available that will suit the requirements of the course
Practicals: Students in batch of 10 each will attend the Lab for practicals under the able
guidance of Lab co-coordinators.
Wide range of Books, Magazines, Journals and CDs, DVDs pertaining to Embedded
Systems to facilitate students to acquire complete and updated knowledge on Electronics.
Innovative Faculty
The Directors and the Faculty members of Innovative Project solutions are professionals with
unsurpassable passion for training. They have rich experience in development, training and
recruitment, and have developed projects and products for many companies.
Mr. Arun Bansal (Sr. Project Developer & Training Co-coordinator), leading expert in
embedded domain with 5 years of rich Industrial and academic experience. Developed
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many industrial projects and trained over 5000 students by giving Technical Support on
Projects.
Mr. Ajayant Kumar (Software Developer)
Mr. Vikas (Project Developer & Hardware manager)
Mr. Ashu Kumar (B-Tech, Electronics & Communication)
Sahil Chawla (B.tech from RIMT, Embedded Engineer)
Bhupinder Kalra( Jr. Engg.)
Sapna Bhasin( B.Tech , Jr. Engg.)
Mr. Harjeev Sharma (B-Tech, Electronics & Communication)
Mr. Kanwarpreet Singh (B-Tech, Electronics & Communication)
Mr. Ashish Bansal (M-Tech, IIT-Roorkee)
About Our Trainings
1) Embedded Trainings
An embedded system is some combination of computer hardware and software, either fixed in
capability or programmable, that is specifically designed for a particular kind of application
device. Industrial machines, automobiles, medical equipment, cameras, household appliances,
airplanes, vending machines, and toys (as well as the more obvious cellular phone and PDA) are
among the myriad possible hosts of an embedded system. Embedded systems that are
programmable arc provided with a programming interface, and embedded systems programming
is a specialized occupation.
2) Electronic Design Automation Training
E DA for electronics has rapidly increased in importance with the continuous scaling of
semiconductor technology. The term EDA is also used as an umbrella term for computer-aided
engineering, computer-aided design and computer-aided manufacturing of electronics in the
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discipline of electrical engineering. EDA tools are also used for programming design
functionality into FPGAs. EDA tools arc the back bone of electronics industry. Today the
excellence in designing can be achieved due to of high core end features like:-
Design and Architecture, Floor planning, Logic synthesis, EDA databases, Simulation and Logic
simulation, Power analysis and optimization, Place and route, Design for Manufacturability.
Design closure. Design rule checking, Layout versus schematic, Layout extraction, Automatic
test pattern generation.
Chapter- (1)
POWER SYSTEM DESIGN
First part of electronics circuits is power. The main power supply is in AC but mostly electronic
circuits work with DC. So a system is required to convert ac to dc and these sources should able
to produce stable supplies. Power supplies may be used in. may be of different types such as
regulated, unregulated, smps etc.
(1.1) Unregulated power supplies
These are the power supplies in which the out put is not constant. That it is varies with input
voltage, load, and also effected by the environment conditions such as temperature, etc. so these
are the variable supplies. Commonly these supplies are not employed as there efficiency is very
less. The unregulated power can be obtained using rectifying circuit after AC supply.
(1.2) Regulated power supplies
These are the power supplies in which the output voltage is constant, i.e. the out put voltage is
independent of the input voltage, load and other external conditions. So to obtain the regulated
voltage using different regulators. The regulator voltage is mainly the DC voltage; it may AC to
or DC to DC voltage. A better approach to power supply design is to use enough capacitance to
reduce ripple to low level, then use an active feedback circuit to eliminate the remaining ripple
and dependence of output voltage on input, load and environment conditions. These active
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devices are known as Regulators. These regulators can be used to produce negative and positive
voltage of required value.
The voltage regulators are of three types:-
1) Constant positive voltage regulators
2) Constant negative voltage regulators
3) Variable voltage regulators
(1.3) Constant positive voltage regulators: -These are the regulators which are able to produce
positive and constant voltage. Some of them are given below:-
(1.3.1) Table:-
S. no. Name of regulator Output voltage
1 LM 7805 5v
2 LM 7810 10v
3 LM 7812 12v
4 LM 7815 15v
These regulators are used according to the required voltage need.
(1.4) Constant negative voltage regulators: - These are also the constant output voltage
regulator but there output is negative in polarity. These regulators are also employed according
to voltage requirements. Some of them are given below with there outputs:-
(1.4.1) Table:-
S. no Name of regulator Output voltage
1 LM7905 -5v
2 LM7910 -10v
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3 LM7912 -12v
4 LM7915 -15v
(1.5) Variable voltage regulators: - These are the regulator whose output voltage can be varied
according to the desired need. These regulators again of two types i.e.:-
Positive
Negative
The output of these regulators can be varied by varying the resistance of the variable resistance
which is connected to the adjustable pin the regulators. So these are the most commonly used
regulators in the electronic industry as wide range of stable voltage can be obtained from single
chip by varying the resistance connected to the adjustable pin of the regulators. The most
commonly variable regulators are:-
LM317 (it is positive regulator)
LM 337(it is negative regulator)
There description is given below:-
(1.6) LM317 3-Terminal Adjustable Regulator:-
(1.6.1) General Description:
The LM317 series of adjustable 3-terminal positive voltage regulators is capable of supplying in
excess of 1.5A over a 1.2V to 37V output range. They are exceptionally easy to use and require
only two external resistors to set the output voltage. Further, both line and load regulation is
better than standard fixed regulators. Also, the LM117 is packaged in standard transistor
packages which are easily mounted and handled. In addition to higher performance than fixed
regulators, theLM317 series offers full overload protection available only in IC’s. Included on
the chip are current limit, thermal overload protection and safe area protection. All overload
protection circuitry remains fully functional even if the adjustment terminal is disconnected.
Normally, no capacitors are needed unless the device is situated more than 6 inches from the
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input filter capacitors in which case an input bypass is needed. An optional output capacitor can
be added to improve transient response.
The adjustment terminal can be bypassed to achieve very high ripple rejection ratios which are
difficult to achieve with standard voltage, supplies of several hundred volts can be regulated as
long as the maximum input to output differential is not exceeded, i.e., avoid short-circuiting the
output.
Also, it makes an especially simple adjustable switching regulator, a programmable output
regulator, or by connecting a fixed resistor between the adjustment pin and output, theLM317
can be used as a precision current regulator. Supplies with electronic shutdown can be achieved
by clamping the adjustment terminal to ground which programs the output to 1.2V where most
loads draw little current.
(1.6.2) CIRCUIT DIAGRAM OF LM317:-
U 1L M 3 1 7 / C Y L
V IN3
AD
J1
V O U T2
R 12 2 0 E
C 1. 1 u F
C 2. 1 u F
R 25 k
VOUTVIN
(1.6.3) Features:-
1. Guaranteed 1% output voltage tolerance (LM317A)
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2. Guaranteed max. 0.01%/V line regulation (LM317A)
3. Guaranteed max. 0.3% load regulation (LM317)
4. Guaranteed 1.5A output current
5. Adjustable output down to 1.2V
6. Current limit constant with temperature
7. P+ Product Enhancement tested
8. 80 dB ripple rejection
(1.6.4) Packages of LM317:-
(1.6.5) LM117 circuit diagram:-
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In operation, the LM317 develops a nominal 1.25V reference voltage, VREF, between the output
and adjustment terminal. The reference voltage is impressed across program resistor R1 and,
since the voltage is constant, constant current I1 then flows through the output. Since the 100μA
current from the adjustment terminal represents an error term, the LM317 was designed to
minimize IADJ and make it very constant with line and load changes. To do this, all quiescent
operating current is returned to the output establishing a minimum load current requirement. If
there is insufficient load on the output, the output will rise.
(1.6.6) Protection Diodes:-
When external capacitors are used with any IC regulator it is sometimes necessary to add
protection diodes to prevent the capacitors from discharging through low current points into the
regulator. Most 10μF capacitors have low enough internal series resistance to deliver 20A spikes
when shorted. Although the surge is short, there is enough energy to damage parts of the IC.
When an output capacitor is connected to a regulator and the input is shorted, the output
capacitor will discharge into the output of the regulator. The discharge current depends on the
value of the capacitor, the output voltage of the regulator, and the rate of decrease of VIN. In the
LM317, this discharge path is through a large junction that is able to sustain 15A surge with no
problem. This is not true of other types of positive regulators. For output capacitors of 25μF or
less, there is no need to use diodes.
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The bypass capacitor on the adjustment terminal can discharge through a low current junction.
Discharge occurs when either the input or output is shorted. Internal to the LM317 is a
50resistor which limits the peak discharge current. No protection is needed for output
voltages of 25V or less and 10μF capacitance. Figure 3 shows an LM317 with protection diodes
included for use with outputs greater than 25V and high values of output capacitance.
(1.7) LM337 3-Terminal Adjustable Regulator
(1.7.1) General Description:
The LM337 is adjustable 3-terminal negative voltage regulators capable of supplying in excess
of −1.5A over an output voltage range of −1.2V to −37V. These regulators are exceptionally
easy to apply, requiring only 2 external resistors to set the output voltage and 1 output capacitor
for frequency compensation. The circuit design has been optimized for excellent regulation and
low thermal transients. Further, the LM337 series features internal current limiting, thermal
shutdown and safe-area compensation, making them virtually blowout-proof against overloads.
The LM337 serves a wide variety of applications including local on-card regulation,
programmable-output voltage regulation or precision current regulation. The LM337 are ideal
complements to the LM317 adjustable positive regulators.
(1.7.2) LM317 circuit diagram:-
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(1.7.3) Pin diagram of LM337:-
(1.7.4) Features:-
1) Output voltage adjustable from −1.2V to −37V
2) 1.5A output current guaranteed, −55°C to +150°C
3) Line regulation typically 0.01%/V
4) Load regulation typically 0.3%
5) Excellent thermal regulation, 0.002%/W
6) 77 dB ripple rejection
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7) Excellent rejection of thermal transients
8) Temperature-independent current limit
9) Internal thermal overload protection
10) Standard 3-lead transistor package
11) Output is short circuit protected.
These two Ic's i.e. LM337and LM317are mainly used in the regulated power supplies because
using these regulator a wide range of output can be obtain which can be varied from 0v to 30v,
which is much sufficient to drive any electronic circuit.
Chapter-(2)
EMBEDDED SYSTEM
(2.1) Introduction:
Embedded system employs a combination of software & hardware to perform a specific
function. It is a part of a larger system which may not be a “computer” Works in a reactive &
time constrained environment.
Any electronic system that uses a CPU chip, but that is not a general-purpose workstation,
desktop or laptop computer is known as embedded system. Such systems generally use
microprocessors; microcontroller or they may use custom-designed chips or both. They are used
in automobiles, planes, trains, space vehicles, machine tools, cameras, consumer and office
appliances, cell phones, PDAs and other handhelds as well as robots and toys. The uses are
endless, and billions of microprocessors are shipped every year for a myriad of applications.
In embedded systems, the software is permanently set into a read-only memory such as a ROM
or flash memory chip, in contrast to a general-purpose computer that loads its programs into
RAM each time. Sometimes, single board and rack mounted general-purpose computers are
called "embedded computers".
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(2.1.1) Embedded System Applications:-
Consumer electronics, e.g., cameras, cell phones etc.
Consumer products, e.g. washers, microwave ovens etc.
Automobiles (anti-lock braking, engine control etc.)
Industrial process controller & defense applications.
Computer/Communication products, e.g. printers, FAX machines etc.
Medical Equipments.
ATMs
Aircrafts
(2.1.2) Difference between MICROPROCESSORS and MICROCONTROLLERS:
A Microprocessor is a general purpose digital computer central processing unit
(C.P.U) popularly known as CPU on the chip. The Microprocessors contain no
RAM, no ROM, and no I/P O/P ports on the chip itself.
On the other hand a Microcontroller has a C.P.U (microprocessor) in addition to a
fixed amount of RAM, ROM, I/O ports and a timer all on a single chip.
In order to make a Microprocessor functional we must add RAM, ROM, I/O Ports
and timers externally to them, i.e any amount of external memory can be added to
it.
But in controllers there is a fixed amount of memory which makes them ideal for
many applications.
The Microprocessors have many operational codes (opcodes) for moving data
from external memory to the C.P.U
Whereas Microcontrollers may have one or two operational codes.
(2.1.3) Disadvantages of MICROPROCESSORS over MICROCONTROLLERS:
System designed using Microprocessors are bulky
They are expensive than Microcontrollers
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We need to add some external devices such as PPI chip, Memory, Timer/counter
chip, Interrupt controller chip, etc. to make it functional.
(2.2) Types of microcontroller architecture:
There are two types of Microcontroller architecture designed for embedded system development.
These are:
1) RISC- Reduced instruction set computer
2) CISC- Complex instruction set computer
(2.2.1) Difference between CISC and RISC:-
CISC stands for Complex Instruction Set Computer. Most PC's use CPU based on this
architecture. For instance Intel and AMD CPU's are based on CISC architectures. Typically
CISC chips have a large amount of different and complex instructions. In common CISC chips
are relatively slow (compared to RISC chips) per instruction, but use little (less than RISC)
instructions. MCS-51 family microcontrollers based on CISC architecture.
RICS stands for Reduced Instruction Set Computer. The philosophy behind it is that almost no
one uses complex assembly language instructions as used by CISC, and people mostly use
compilers which never use complex instructions. Therefore fewer, simpler and faster instructions
would be better, than the large, complex and slower CISC instructions. However, more
instructions are needed to accomplish a task. Atmel’s AVR microcontroller based on RISC
architecture.
(2.3) History of 8051
Intel Corporation introduced an 8-bit microcontroller called 8051 in 1981 this controller had 128
bytes of RAM, 4k bytes of on chip ROM, two timers, one serial port, and four ports all are on
single chip. The 8051 is an 8 bit processor, meaning that the CPU can work on only 8 bit data at
a time. Data larger than 8 bits broken into 8 bit pieces to be processed by CPU. It has for I/O 8
bit wide.
26
(2.3.1) Features Table:-
Feature Quantity
ROM 4K bytes
RAM 128 bytes
Timer 2
I/O pins 32
Serial port 1
Interrupt sources 6
(2.3.2) 8051 Architecture Overview:-
The 8051 family is one of the most common microcontroller architectures used worldwide. 8051
based microcontrollers are offered in hundreds of variants from many different silicon
manufacturers
.The 8051 is based on an 8-bit CISC core with Harvard architecture. It's an 8-bit CPU, optimized
for control applications with extensive Boolean processing (single-bit logic capabilities), 64K
program and data memory address space and various on-chip peripherals.
The 8051 microcontroller family offers developers a wide variety of high-integration and cost-
effective solutions for virtually every basic embedded control application. From traffic control
equipment to input devices and computer networking products, 8051 u.c deliver high
performance together with a choice of configurations and options matched to the special needs of
each application. Whether it's low power operation, higher frequency performance, expanded on-
chip RAM, or an application-specific requirement, there's a version of the 8051 microcontroller
that's right for the job. When it's time to upgrade product features and functionality, the 8051
architecture puts you on the first step of a smooth and cost-effective upgrade path - to the
enhanced performance of the 151 and 251 microcontrollers.
27
(2.3.3) Block diagram of 8051:-
28
(2.3.4) Internal Architecture of 8051:-
29
(2.3.5) Pin configuration of 8051:-
30
\
31
.
There are four ports P0, P1, P2 and P3 each use 8 pins, making them 8-bit ports. All the ports
upon RESET are configured as output, ready to be used as output ports. To use any of these ports
as an input port, it must be programmed
Port 0:- Port 0 occupies a total of 8 pins (pins 32-39) .It can be used for input or output. To use
the pins of port 0 as both input and output ports, each pin must be connected externally to a 10K
ohm pull-up resistor. This is due to the fact that P0 is an open drain, unlike P1, P2, and P3.Open
drain is a term used for MOS chips in the same way that open collector is used for TTL chips.
With external pull-up resistors connected upon reset, port 0 is configured as an output port. For
example, the following code will continuously send out to port 0 the alternating values 55H and
AAH
Port 0 as input: - With resistors connected to port 0, in order to make it an input, the port must
be programmed by writing 1 to all the bits. In the following code, port 0 is configured first as an
input port by writing 1's to it, and then data is received from the port and sent to P1.
Dual Role of Port 0:-Port 0 is also designated as AD0-AD7, allowing it to be used for both
address and data. When connecting an 8051/31 to an external memory, port 0 provides both
32
address and data. The 8051 multiplexes address and data through port 0 to save pins. ALE
indicates if P0 has address or data. When ALE = 0, it provides data D0-D7, but when ALE =1 it
has address and data with the help of a 74LS373 latch.
Port 1:- Port 1 occupies a total of 8 pins (pins 1 through 8). It can be used as input or output. In
contrast to port 0, this port does not need any pull-up resistors since it already has pull-up
resistors internally. Upon reset, Port 1 is configured as an output port. For example, the
following code will continuously send out to port1 the alternating values 55h & AAh
Port 1 as input:-To make port1 an input port, it must be programmed as such by writing 1 to all
its bits. In the following code port1 is configured first as an input port by writing 1’s to it, then
data is received from the port and saved in R7 ,R6 & R5.
Port 2:-Port 2 occupies a total of 8 pins (pins 21- 28). It can be used as input or output. Just like
P1, P2 does not need any pull-up resistors since it already has pull-up resistors internally. Upon
reset, Port 2 is configured as an output port. For example, the following code will send out
continuously to port 2 the alternating values 55h and AAH. That is all the bits of port 2 toggle
continuously.
Port 2 as input: - To make port 2 an input, it must programmed as such by writing 1 to all its
bits. In the following code, port 2 is configured first as an input port by writing 1’s to it. Then
data is received from that port and is sent to P1 continuously.
Dual role of port 2:- In systems based on the 8751, 8951, and DS5000, P2 is used as simple I/O.
However, in 8031-based systems, port 2 must be used along with P0 to provide the 16-bit
address for the external memory. As shown in pin configuration 8051, port 2 is also designed as
A8-A15, indicating the dual function. Since an 8031 is capable of accessing 64K bytes of
external memory, it needs a path for the 16 bits of the address. While P0 provides the lower 8
bits via A0-A7, it is the job of P2 to provide bits A8-A15 of the address. In other words, when
8031 is connected to external memory, P2 is used for the upper 8 bits of the 16 bit address, and it
cannot be used for I/O.
33
Port 3:- port 3 occupies a total of 8 pins, pins 10 through 17. It can be used as input or output.
P3 does not need any pull-up resistors, the same as P1 and P2 did not. Although port 3 is
configured as an output port upon reset. Port 3 has the additional function of providing some
extremely important signals such as interrupts. This information applies both 8051 and 8031
chips. There functions are as follows:-
(2.3.6) Table:-
P3.0 and P3.1 are used for the RxD and TxD serial communications signals. Bits P3.2 and P3.3
are set aside for external interrupts. Bits P3.4 and P3.5 are used for timers 0 and 1. Finally P3.6
PORT 3 Function pin
P3.0 RxD 10
P3.1 TxD 11
P3.2 ___
Int0
12
P3.3 ___
Int1
13
P3.4 T0 14
P3.5 T1 15
P3.6 ___
WR
16
P3.7 ___
RD
17
34
and P3.7 are used to provide the WR and RD signals of external memories connected in 8031
based systems.
ALE/PROG
Address Latch Enable is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/ 6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data memory. If desired, ALE operation can
be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a
MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the AT89S8252 is
executing code from external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to
VCC for internal program executions. This pin also receives the 12-volt programming enable
voltage (VPP) during Flash programming when 12-volt programming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
35
(2.4) AT89s8252
AT89S8252 is an ATMEL controller with the core of Intel MCS-51. It has same pin
configuration as give above.
The AT89S8252 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes
of Downloadable Flash programmable and erasable read only memory and 2K bytes of
EEPROM. The device is manufactured using Atmel’s high density nonvolatile memory
technology and is compatible with the industry standard 80C51 instruction set and pinout. The
on-chip Downloadable Flash allows the program memory to be reprogrammed in-system through
an SPI serial interface or by a conventional nonvolatile memory programmer. By combining a
versatile 8-bit CPU with Downloadable Flash on a monolithic chip, the Atmel AT89S8252 is a
powerful microcomputer which provides a highly flexible and cost effective solution to many
embedded control applications. The AT89S8252 provides the following standard features: 8K
bytes of Downloadable Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines,
programmable watchdog timer, two Data Pointers, three 16-bit timer/counters, a six-vector two-
level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In
addition, the AT89S8252 is designed with static logic for operation down to zero frequency and
supports two software selectable power saving modes. The Idle Mode stops the CPU while
allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The
Power down Mode saves the RAM contents but freezes the oscillator, disabling all other chip
functions until the next interrupt or hardware reset.
The Downloadable Flash can be changed a single byte at a time and is accessible through the SPI
serial interface. Holding RESET active forces the SPI bus into a serial programming interface
and allows the program memory to be written to or read from unless Lock Bit 2 has been
activated.
(2.4.1) Features:-
• Compatible with MCS-51™Products
• 8K bytes of In-System Reprogrammable Downloadable Flash Memory
- SPI Serial Interface for Program Downloading
36
- Endurance: 1,000 Write/Erase Cycles
• 2K bytes EEPROM
- Endurance: 100,000 Write/Erase Cycles
• 4.0V to 6V Operating Range
• Fully Static Operation: 0 Hz to 24 MHz
• Three-Level Program Memory Lock
• 256 x 8 bit Internal RAM
• 32 Programmable I/O Lines
• Three 16 bit Timer/Counters
• Nine Interrupt Sources
• Programmable UART Serial Channel
• SPI Serial Interface
• Low Power Idle and Power Down Modes
• Interrupt Recovery From Power Down
• Programmable Watchdog Timer
• Dual Data Pointer
• Power off Flag
(2.4.2) Pin Description
Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port select, data
input/output and shift clock input/output pins as shown in the following table.
37
(2.4.3) Table:-
Port 1 also receives the low-order address bytes during Flash programming and verification.
(2.4.4) Hardware interfacings and programming
There are two types of programming language used for microcontroller programming:
1) Low Level Language (Assembly Language)
2) High Level Language (C Language)
ALE/PROG
Address Latch Enable is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/ 6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data memory. If desired, ALE operation can
be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a
38
MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the AT89S8252 is
executing code from external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to
VCC for internal program executions. This pin also receives the 12-volt programming enable
voltage (VPP) during Flash programming when 12-volt programming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
(2.4.5) Hardware interfacings and programming
There are two types of programming language used for microcontroller programming:
1) Low Level Language (Assembly Language)
2) High Level Language (C Language)
(2.4.6) Programming in assembly language:
39
Tools used:
1). 8051 assembler cum simulator.
2).command prompts as a programming environment.
(2.4.4.6a) Introduction to programming in assembly language:
Assembly languages were developed that provided mnemonics for the machine code
instructions, plus others features that made programming faster and less prone to error. The term
mnemonic is frequently used in computer science and engg. Literature to refer to codes and
abbreviations that are relatively easy to remember .Assembly language programs must be
translated into machine code by a program called an ASSEMBLER. Assembly language is
referred to as a low-level-language.
Now we look at 8051 assembly language format and use an 8051
Assembler to create a ready-to run program.
An assembly language instruction consists of four fields’:-
[Label:] mnemonic [operands] [; comment]
Brackets indicate that a field is optional, and not all lines have them. Bracket should not be
typed in.
1. The label field allows the program to refer to a line of code by name. the label field can not
exceed a certain no. of character’s.
2. The assembly language mnemonics (instruction) and operands fields together perform the real
work of the program and accomplish the tasks for which the program was written.
3. The comment field begins with a “;”. Comments may be at the and of a line or on a line by
themselves.
(2.4.7) Basic instructions:
40
We describe the basic instructions of the 8051 and give their formats with some examples.
1).arithmetic instruction
2).logical instructions
3).jump, loop, call instructions
1) Arithmetic instructions:
The arithmetic instructions are used to perform arithmetic operations like addition, subtraction,
multiplication, division etc.
1) ADD: - this instruction is used to add 2 operands. The 1 operand should be in accumulator and
2 in the other register.
e.g. MOV R0, #20
MOV A, #10
ADD A, R0
MOV P1, A
Here, # is used to load immediate value and we observe the final value on port 1.
2) MUL:-this instruction is used to multiply 2 operands. The 1 operand should be in
Accumulator and 2 in the other register.
e.g. MOV R0, #20
MOV A, #10
MUL AB
MOV P1, A
Here, # is used to load immediate value and we observe the final value on port 1.
41
3) DIV: - this instruction is used to divide 2 operands. the 1 operand should be in accumulator
and 2 in the other register.
e.g. MOV R0,#20
MOV A, #10
DIV AB
MOV P1, A
Here, # is used to load immediate value and we observe the final value on port 1.
2) Logical instructions: Apart from the input/output instructions, logic instructions are some of
the most widely used instructions. The logical instructions are used to perform logical operations
like AND, OR, EXOR etc.
1). MOV A, #35H ; A=35H
ANL A, #0FH ; A AND 0FH (now A=05)
According to this operation, the content 35H gets ANDing with 0FH.
2). MOV A, #04 ; A=04
ORL A, #30H ; A=A OR 30H (now A=34H)
According to this operation, the content 35H gets ANDing with 0FH.
Jump, loop, and call instructions:
The Jump, loop, call instructions are used to perform logical operations in the sequence of
instructions to be executed, it is often necessary to transfer program control to a different
location. We have used high level language for microcontroller programming due to its given
advantages over assembly:
Advantages of C over Assembly language programming:
42
Knowledge of the processor instruction set is not required.
Details like register allocation and addressing of memory and data is managed by the
compiler.
Programs get a formal structure and can be divided into separate functions.
Programming and program test time is drastically reduced, this increases efficiency.
Keywords and operational functions can be used that come closer to how humans think.
The supplied and supported C libraries contain many standard routines such as numeric
conversions.
Reusable code: Existing program parts can be more easily included into new programs,
because of the comfortable modular program construction techniques.
The C language based on the ANSI standard is very portable. Existing programs can be
quickly adapted to other processors as needed.
(2.5) THE 8051 INTERRUPTS
There are two methods in which a micro-controller can provide its services to its internal and
external environment:
1) POLLING: Microcontroller checks the device continuously while using this method. But it
results in wastage of machine cycles of the micro-controller.
2) INTERRUPTS: Here every device tells the micro-controller when it needs the services from
microcontroller.
Actually, only 5 interrupts are available to the user in the 8051, but many manufacturers data
sheets state that there are 6 interrupts since they include reset. The 6 interrupts in the 8051 are
allocated as follows:
1).Reset: when the reset pin is activated, the 8051 jumps to address location 0000.this is the
power-up reset.
2).Two interrupts are set aside for the timers:
One for timer 0 and one for timer 1.memory locations 000BH and 001BH in the interrupt vector
table belong to timer0 and timer1, respectively.
43
3).Two interrupts are set aside for hardware external hardware interrupts. Pin numbers 12(p3.2)
and 13(p3.3) in port 3 are the external hardware interrupts INT0 and INT1, respectively. These
external interrupts are also referred to as EX1 and EX2.
4).Serial communication has a single interrupts that belongs to both receive and transmit.
(2.6) ELECTROMAGNETIC RELAYS
A relay is an electrically controllable switch widely used in industrial controls, automobiles and
appliances. It allows the isolation of two separate sections of a system with two different voltage
sources. The electromechanical (or electromagnetic) relay (EMR) has 3 components: the coil,
spring and contacts. When current flows through the coil, a magnetic field is created around the
coil (the coil is energized) which causes the armature to be attracted to the coil. The armature’s
contact acts like a switch and closes or opens a circuit. When the coil is not energized, a spring
pulls the armature to its normal state of open or closed.
In choosing a relay, the following characteristics need to be considered:
1) The contacts can be normally open (NO) or normally closed (NC). In the NC
type, the contacts are closed when the coil is not energized. In the NO, the
contacts are open when the coil is un-energized.
2) There can be one or more contacts (SPST, SPDT, DPDT relays).
3) The voltage and current needed to energize the coil. The voltage can vary
from a few volts to 50 volts, while the current can be from few mA to 20mA.
The relay has a minimum voltage below which the coil will not be energized.
This minimum voltage is called the “pull-in” voltage.
44
(2.7) INTERFACING OF VARIOUS DEVICES
(2.7.1) LED Interfacing
45
Hardware interfacing of LED with AT89s8252
Tit le
S ize D o c u m e n t N u m b e r R e v
D a t e : S h e e t o f
<D o c > <R e v C o d e >
<Tit le >
C u s t o m
1 1Tu e s d a y , D e c e m b e r 2 6 , 2 0 0 6
Q 2 1B C 5 4 7A
Q 1 4 B C 5 4 7A
D 2 6
L E D
V C C
R 4 0
3 3 0 E
D 2 7
L E D
V C C
R 4 1
3 3 0 E
V C C
D 2 8
L E D
R 6 1
3 3 0 E
D 2 9
L E D
R 6 2
3 3 0 E
V C C
Q 1 5
B C 5 4 7A
D 2 2
L E D
R 3 7
3 3 0 E
V C C
Q 1 6
B C 5 4 7A
Q 1 7
B C 5 4 7A
Q 1 8B C 5 4 7A
D 2 3
L E D
V C C
R 3 8
3 3 0 E
Q 1 9B C 5 4 7A D 2 4
L E D
V C C
R 3 9
3 3 0 E
D 2 5
L E D
R 6 3
3 3 0 E
V C C
Q 2 0B C 5 4 7A
U 1 0
A T8 9 S 8 2 5 2
R S T9
XTA L 21 8 XTA L 11 9
GN
D20
P S E N2 9
A L E / P R O G3 0
EA
/VP
P31
VC
C40
P 1 . 0 / T21
P 1 . 1 / T2 -E X2
P 1 . 23
P 1 . 34
P 1 . 4 / S S5
P 1 . 5 / M O S I6
P 1 . 6 / M I S O7
P 1 . 7 / S C K8
P 2 . 0 / A 82 1
P 2 . 1 / A 92 2
P 2 . 2 / A 1 02 3
P 2 . 3 / A 1 12 4
P 2 . 4 / A 1 22 5
P 2 . 5 / A 1 32 6
P 2 . 6 / A 1 42 7
P 2 . 7 / A 1 52 8
P 3 . 0 / R XD1 0P 3 . 1 / TXD1 1
P 3 . 2 / I N T01 2
P 3 . 3 / I N T11 3
P 3 . 4 / T01 4
P 3 . 5 / T11 5
P 3 . 6 / W R1 6P 3 . 7 / R D1 7
P 0 . 0 / A D 03 9
P 0 . 1 / A D 13 8
P 0 . 2 / A D 23 7
P 0 . 3 / A D 33 6
P 0 . 4 / A D 43 5
P 0 . 5 / A D 53 4
P 0 . 6 / A D 63 3
P 0 . 7 / A D 73 2
C 4 53 3 p F
C 4 63 3 p F
Y 8
8 M h z
12
3
4
V C C V C C
R 71 0 K
C 4 71 0 u F / 1 6 V
V C C
C 4 81 0 4
(2.7.1a) C code for Blinking LEDs connected on PORT2:-
#include<at89s8252.h>
46
Void delay (unsigned int i);
Void main (void)
{
While (1)
{
P2=0x00;
delay (0xffff);
P2=0x00;
delay (0xff);
}
}
Void delay (unsigned int i)
{
While (i! =0)
{
i--;
}
}
(2.7.1b) C code for running LED connected on PORT2:-
#include<at89s8252.h>
47
Void delay (unsigned int i);
Void main ()
{
P0=0x00;
While (1)
{
delay(0xffff);
P2_0=1;
delay(0xffff);
P2_0=0;
P2_1=1;
delay(0xffff);
P2_1=0;
P2_2=1;
delay(0xffff);
P2_2=0;
P2_3=1;
delay(0xffff);
P2_3=0;
P2_4=1;
delay(0xffff);
48
P2_4=0;
P2_5=1;
delay(0xffff);
P2_5=0;
P2_6=1;
delay(0xffff);
P2_6=0;
P2_7=1;
delay(0xffff);
P2_7=0;
P2_0=1
}
}
void delay(unsigned int i)
{
while (i!=0)
{
i--;
}
}
(2.7.2) Hardware interfacing of LCD (JHD162A):
49
On most displays, the pins are numbered on the LCD’s printed circuit board, but if not, it is quit
easy to locate pin1. Since the pin is connected to ground, it often has a thicker PCB track
connected to it, and it is generally connected to the metal work at some point.
The function of each of the connections is shown in the table below:-
Pins 1 & 2 are the power supply lines, Vss & Vdd. The Vdd pin should be connected to the positive
supply & Vss to the 0V supply or ground.
Although the LCD module data sheets specify 5V D.C. supply (at only a few milliamps), supplies of
6V & 4.5V both work well, and even 3V is sufficient for some modules. Consequently, these
modules can be effectively and economically powered by batteries.
Pin 3 is a control pin, Vee, which is used to alter the contrast of the display. Ideally, these pin should
be connected to a variable voltage supply. A preset potentiometer connected between the power
supply lines, with its wiper connected to the contrast pin is suitable in many cases, but be aware that
some modules may require a
Negative potential; as low as 7V in some cases. For absolute simplicity, connecting this pin to 0V
will often suffice.
Pin 4 is register select (RS) line.
(2.7.2a) Table:-
PIN NO. NAME FUNCTION
1 Vss Ground
50
2 Vdd +ve supply
3 Vee contrast
4 RS Register select
5 R/W Read/Write
6 E Enable
7 D0 Data Bit 0
8 D1 Data Bit 1
9 D2 Data Bit 2
10 D3 Data Bit 3
11 D4 Data Bit 4
12 D5 Data Bit 5
13 D6 Data Bit 6
14 D7 Data Bit 7
Three command control inputs. When this line is low, data bytes transferred to the display are
treated as commands, and data bytes read from the display indicate its status. By setting the RS
line high, character data can be transferred to and from the module.
Pin 5 is (R/W) line. This line is pulled low in order to write commands or character data to the
module, or pulled high to read character data or status information from its registers.
Pin 6 is Enable (E) line. This input is used to initiate the actual transfer of commands or
character data between the module and the data lines. When writing to the display, data is
transferred only on the high to low transition of this signal. However, when reading from the
display, data will become available shortly after the low to high transition and remain available
until the signal falls low again.
Pins 7 to 14 are the eight data bus lines (D0 to D7). Data can be transferred to and from the
display, either as a single 8-bit byte or as two 4-bit “nibbles”. In the latter case, only the upper
four data lines (D4 to D7) are used. This $-bit mode is beneficial when using a microcontroller,
as fewer I/O lines are required.
(2.7.2b) Hardware interfacing of LCD with AT89s52 microcontroller
51
U 1
A T8 9 S 5 2
R S T9
XTA L 21 8 XTA L 11 9
GN
D20
P S E N2 9
A L E / P R O G3 0
EA
/VP
P31
VC
C40
P 1 . 0 / T21
P 1 . 1 / T2 -E X2
P 1 . 23
P 1 . 34
P 1 . 4 / S S5
P 1 . 5 / M O S I6
P 1 . 6 / M I S O7
P 1 . 7 / S C K8
P 2 . 0 / A 82 1
P 2 . 1 / A 92 2
P 2 . 2 / A 1 02 3
P 2 . 3 / A 1 12 4
P 2 . 4 / A 1 22 5
P 2 . 5 / A 1 32 6
P 2 . 6 / A 1 42 7
P 2 . 7 / A 1 52 8
P 3 . 0 / R XD1 0
P 3 . 1 / TXD1 1
P 3 . 2 / I N T01 2
P 3 . 3 / I N T11 3
P 3 . 4 / T01 4
P 3 . 5 / T11 5
P 3 . 6 / W R1 6P 3 . 7 / R D1 7
P 0 . 0 / A D 03 9 P 0 . 1 / A D 13 8 P 0 . 2 / A D 23 7 P 0 . 3 / A D 33 6 P 0 . 4 / A D 43 5 P 0 . 5 / A D 53 4 P 0 . 6 / A D 63 3 P 0 . 7 / A D 73 2
J 2 L C D
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
C 13 3 p F
C 23 3 p F
Y 1
12
3
4
R 11 0 K
C 31 0 u F 1 6 V
V C CV
CC R 5 2
5 6 E
VC
C
V C C
RS
Hardware intetrfacing of LCD with AT89s52 microcontroler
EN
(2.7.2c) C code for LCD display
52
#include <at89s8252.h>
#define LCDPRT P1
#define RS P3_3
#define EN P3_4
void delay(unsigned int i);
void lcd_cmd(unsigned char a);
void display(unsigned char b);
void wait(void);
void Init_lcd(void);
void cursor_position(unsigned char c);
void main(void)
{
init_lcd();
while(1)
{
cursor_position(0x01);
display('N');
cursor_position(0x02);
display('E');
cursor_position(0x03);
53
display('T');
cursor_position(0x04);
display('M');
cursor_position(0x05);
display('A');
cursor_position(0x06);
display('X');
}
}
void delay (unsigned int i)
{
while (i!=0)
{
i--;
}
}
void lcd_cmd(unsigned char a)
{
wait();
LCDPRT=a;
RS=0;
54
EN=1;
EN=0;
}
void display(unsigned char b)
{
wait ();
LCDPRT=b;
RS=1;
EN=1;
EN=0;
}
void wait(void)
{
unsigned int count=300;
while(count!=0)
{
count--;
}
}
void Init_lcd(void)
{
55
lcd_cmd(0x3c);
lcd_cmd(0x0c);
lcd_cmd(0x06);
lcd_cmd(0x01);
}
void clear_lcd(void)
{
lcd_cmd(0x01);
}
void cursor_position(unsigned char c)
{
lcd_cmd(c+0x80);
}
(2.7.2d) C code for string display on LCD:
#include<at89s8252.h>
#define LCDPRT P1
#define RS P3_3
#define EN P3_4
code unsigned char name_arry[]={"NETMAX$"};
void display_string(unsigned char *sp);
void lcd_cmd(unsigned char a);
56
void display(unsigned char b);
void wait(void);
void Init_lcd(void);
void cursor_position(unsigned char c);
void main(void)
{
Init_lcd();
cursor_position(0x40);
display_string(&name_arry);
}
void display_string(unsigned char *sp)
{
while(*sp!='$')
{
display(*sp);
sp=sp+1;
}
}
void lcd_cmd(unsigned char a)
{
wait ();
57
LCDPRT=a;
RS=0;
EN=1;
EN=0;
}
void display(unsigned char b)
{
wait ();
LCDPRT=b;
RS=1;
EN=1;
EN=0;
}
void wait(void)
{
unsigned int count=300;
while(count!=0)
{
count--;
}
}
58
void Init_lcd(void)
{
lcd_cmd(0x3c);
lcd_cmd(0x0c);
lcd_cmd(0x06);
lcd_cmd(0x01);
}
void cursor_position(unsigned char c)
{
lcd_cmd(c+0x80);
}
(2.7.3) ADC-0804 interfacing with AT89s52:
The ADC0804 family is CMOS 8-Bit, successive-approximation A/D converters which use a
modified potentiometer ladder and are designed to operate with the 8080A control bus via three-
state outputs. These converters appear to the processor as memory locations or I/O ports, and
hence no interfacing logic is required. The differential analog voltage input has good common
mode- rejection and permits offsetting the analog zero-input voltage value. In addition, the
voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the
full 8 bits of resolution.
(2.7.3a) Features:-
• 80C48 and 80C80/85 Bus Compatible - No Interfacing Logic Required
• Conversion Time < 100s
• Easy Interface to Most Microprocessors
59
• Differential Analog Voltage Inputs
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• 0V to 5V Analog Voltage Input Range (Single + 5V Supply)
• No Zero-Adjust Required
(2.7.3b) PIN DIAGRAM OF ADC-0804
60
(2.7.4) Serial communication between At89s8252 and PC
61
(2.7.4a) Serial Transmission
SPT RXD
SPT TXD
U 5
A T8 9 S 8 2 5 2
R S T9
XTA L 21 8 XTA L 11 9
GND
20
P S E N2 9
A L E / P R O G3 0
EA/V
PP
31
VCC
40
P 1 . 0 / T21
P 1 . 1 / T2 -E X2
P 1 . 23
P 1 . 34
P 1 . 4 / S S5
P 1 . 5 / M O S I6
P 1 . 6 / M I S O7
P 1 . 7 / S C K8
P 2 . 0 / A 82 1
P 2 . 1 / A 92 2
P 2 . 2 / A 1 02 3
P 2 . 3 / A 1 12 4
P 2 . 4 / A 1 22 5
P 2 . 5 / A 1 32 6
P 2 . 6 / A 1 42 7
P 2 . 7 / A 1 52 8
P 3 . 0 / R XD1 0P 3 . 1 / TXD1 1
P 3 . 2 / I N T01 2
P 3 . 3 / I N T11 3
P 3 . 4 / T01 4
P 3 . 5 / T11 5
P 3 . 6 / W R1 6P 3 . 7 / R D1 7
P 0 . 0 / A D 03 9
P 0 . 1 / A D 13 8
P 0 . 2 / A D 23 7
P 0 . 3 / A D 33 6
P 0 . 4 / A D 43 5
P 0 . 5 / A D 53 4
P 0 . 6 / A D 63 3
P 0 . 7 / A D 73 2
C 1 63 3 p F
C 1 73 3 p F
Y 4
C R Y S TA L1
2
3
4
V C CV C C
R 41 0 K
C 1 81 0 u F 1 6 V
V C C
C 1 91 0 4
C 2 01 0 U F /1 6 V
C 2 11 0 U F / 1 6 V
V C C
V C C
C 2 21 0 U F /1 6 V
C 2 31 0 4
C 2 4 1 0 U F /1 6 V
U 6
M A X2 3 2
C 1 +1
C 1 -3
C 2 +4
C 2 -5
VCC
16GND
15
V +2
V -6
R 1 O U T1 2
R 2 O U T9
T1 I N1 1
T2 I N1 0
R 1 I N1 3
R 2 I N8
T1 O U T1 4
T2 O U T7
J 7
S E R I A L P O R T O F P C
123
(2.7.4b) C- code for serial transmission (from Microcontroller to PC)
62
#include<at89s8252.h>
void Init_SPT(void);
void transmit_serial(unsigned char a);
void delay(unsigned int i);
void main(void)
{
Init_SPT();
while(1)
{
delay(0XFFFF);
transmit_serial('N');
delay(0XFFFF);
transmit_serial('E');
delay(0XFFFF);
transmit_serial('T');
delay(0XFFFF);
transmit_serial('M');
delay(0XFFFF);
transmit_serial('A');
delay(0XFFFF);
transmit_serial('X');
63
delay(0XFFFF);
}
}
void Init_SPT(void)
{
TMOD=0x20;
TH1=0xfd;
TR1=1;
SCON=0x40; }
void transmit_serial(unsigned char a)
{
SBUF=a;
delay(500);
TI=0;
}
void delay(unsigned int i)
{while(i!=0)
{ i--;
}
}
(2.7.4c) Serial Reception (From PC to microcontroller)
64
(2.7.4d) C- code for serial reception:
J3 LCD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VC
C
INNOVATIVE
R54
56E
VC
C
RS EN
RSEN
SPT TXD
SPT RXD
U11
AT89S8252
RST9
XTAL218 XTAL119
GN
D20
PSEN29
ALE/PROG30
EA
/VP
P31
VC
C40
P1.0/T21
P1.1/T2-EX2
P1.23
P1.34
P1.4/SS5
P1.5/MOSI6
P1.6/MISO7
P1.7/SCK8
P2.0/A821
P2.1/A922
P2.2/A1023
P2.3/A1124
P2.4/A1225
P2.5/A1326
P2.6/A1427
P2.7/A1528
P3.0/RXD10P3.1/TXD11
P3.2/INT012
P3.3/INT113
P3.4/T014
P3.5/T115
P3.6/WR16P3.7/RD17
P0.0/AD039 P0.1/AD138 P0.2/AD237 P0.3/AD336 P0.4/AD435 P0.5/AD534 P0.6/AD633 P0.7/AD732
C3433pF
C3533pF
Y9
CRYSTAL
123
4
VCCVCC
R810K
C4910uF 16V
VCC
C50104
C5110UF/16V
VCC
C5210UF/16V
VCC
C5310UF/16V
C54104
C5510UF/16V
U12
MAX232
C1+1
C1-3
C2+4
C2-5
VC
C16
GN
D15
V+2
V-6
R1OUT12
R2OUT9
T1IN11
T2IN10
R1IN13
R2IN8
T1OUT14
T2OUT7
J8
SERIAL PORT OF PC
123
65
#include <at89s8252.h>
#define LCDPRT P1
#define RS P3_3
#define EN P3_4
void Init_SPT(void);
unsigned char receive_serial(void);
void delay(unsigned int i);
void lcd_cmd(unsigned char a);
void display(unsigned char b);
void wait(void);
void Init_lcd(void);
void clear_lcd(void);
void cursor_position(unsigned char d);
void disp_hex(unsigned char digit);
void disp_dec(unsigned int digit);
code unsigned char lkup_tbl01[16]={'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
void main(void)
{
unsigned char e;
Init_lcd();
Init_SPT();
66
while(1)
{
e=receive_serial();
cursor_position(0x00);
display(e);
}
}
void Init_SPT(void)
{
PCON=PCON&0x7F;
TMOD=TMOD&0x0F;
TMOD=TMOD|0x20;
TH1=0xfd;
SCON=0X50;
TR1=1;
}
void delay (unsigned int i)
{
while (i!=0)
{
i--;
67
}
}
void lcd_cmd(unsigned char a)
{
wait();
LCDPRT=a;
RS=0;
EN=1;
EN=0;
}
void display(unsigned char b)
{
wait ();
LCDPRT=b;
RS=1;
EN=1;
EN=0;
}
void wait(void)
{
unsigned int count=300;
68
while(count!=0)
{
count--;
}
}
void Init_lcd(void)
{
lcd_cmd(0x3c);
lcd_cmd(0x0C);
lcd_cmd(0x06);
lcd_cmd(0x14);
lcd_cmd(0x1C);
lcd_cmd(0x01);
}
void cursor_position(unsigned char d)
{
lcd_cmd(d+0x80);
}
(2.7.5) Interfacing of seven segment display
69
V C C
R 1 9 22 0 E
R 2 0 22 0 E
R 2 1 22 0 E
cR 2 4 22 0 E
V C C
R 2 5 22 0 E
U 1 6
A T89 S 8 2 52
R S T9
XTA L 218 XTA L 119
GN
D20
P S E N29 A L E / P R O G30
EA/V
PP
31
VCC
40
P 1 . 0 / T21
P 1 . 1 / T2 -E X2
P 1 . 23
P 1 . 34
P 1 . 4 / S S5
P 1 . 5 / M O S I6
P 1 . 6 / M I S O7
P 1 . 7 / S C K8
P 2 . 0 / A 821
P 2 . 1 / A 922
P 2 . 2 / A 1 023
P 2 . 3 / A 1 124
P 2 . 4 / A 1 225
P 2 . 5 / A 1 326
P 2 . 6 / A 1 427
P 2 . 7 / A 1 528
P 3 . 0 / R XD10P 3 . 1 / TXD11P 3 . 2 / I N T012P 3 . 3 / I N T113P 3 . 4 / T014P 3 . 5 / T115P 3 . 6 / W R16P 3 . 7 / R D17
P 0 . 0 / A D 039
P 0 . 1 / A D 138
P 0 . 2 / A D 237
P 0 . 3 / A D 336
P 0 . 4 / A D 435
P 0 . 5 / A D 534
P 0 . 6 / A D 633
P 0 . 7 / A D 732
Y 3
8 M h z
12
3
4
V C CV C C
R 3 4 22 0 E
R 3 510 K S I P 1
23456789
R 3 610 K
C 4 810 u F / 1 6 V
V C C
P 0 1P 0 2P 0 3P 0 4P 0 5P 0 6P 0 7
V C C
P 0 8
V C C
d
C 4 9 10 4
V C CV C C
VCC
R 3 710 k S I P
12345678
e
C 4 2
33 P F
C 4 333 P F
U 374 L S 4 7
D 07 D 11 D 22 D 36
B I / R B O4
R B I5
LT3
A13B12
C11
D10
E9
F15
G14
VCC
16GN
D8
U 1 274 L S 4 7
D 07 D 11 D 22 D 36
B I / R B O4
R B I5
LT3
A13B12
C11D10E9
F15
G14
VCC
16GN
D8
c
V C C
U 1 3D I P 2 0
d2
e1
d7
G/V
3
c4
dot
5
e6
G/V
8
dot
9
c10
b11
a12
G/v
13g
15b
16a
17G/V
18f
19g
20
f14
VCC
d
R 1 3 22 0 E
V C C
R 3 22 0 E
R 7 22 0 E
R 1 1
10 k S I P
12345678
R 1 4 22 0 E
R 8 22 0 E
e
R 9 22 0 ER 1 5 22 0 E
R 1 6 22 0 E
V C C
(2.7.5a) C code for seven segment display
70
#include<at89s8252.h>
#define EOC P3_6
#define SOC P3_7
void delay(unsigned int i);
unsigned char read_adc(void);
void dec(unsigned int digit) ;
void main (void)
{
unsigned char a=0;
P0=0x08;
while(1)
{
delay(0xffff);
a=read_adc();
dec(a);
a++;
delay(0xffff);
dec(a);
P0=1;
delay(0xffff);
P0=2;
71
delay(0xffff);
P0=3;
delay(0xffff);
P0=4;
delay(0xffff);
}
}
void delay(unsigned int i)
{
while(i!=0)
{
i--;
}
}
unsigned char read_adc(void)
{
unsigned char n=0;
SOC=0;
SOC=1;
while(EOC==1)
{
72
n=P2;
}
return n;
}
void dec(unsigned int x)
{
x=(x/10)*6+x;
P0=x;
}
void bcdconv(unsigned int mb)
{
unsigned char x;
unsigned char y;
x=mb&0x0f;
x=x|0x30;
y=mb&0xf0;
y=y>>4;
y=y|0x30;
display(y);
display(x);}
Chapter-(3)
73
OrCad 10.5
(3.1) Circuit Design Steps in OrCad 10.5
(3.1.1) Entry of Schematic Diagram
Schematic diagram provides the functional flow and the graphical representation of an electronic
circuit. The entry of schematic diagram is the first step in PCB design using OrCad.
A schematic diagram consists of:-
Electrical connections(nets)
Junctions
Integrated circuits symbols
Discrete components symbols like resistors, capacitors etc.
Input / output connectors
Power and ground symbols
Buses
No connection symbols
Components reference names
Text
(3.1.2) The Schematic Page Editor
The schematic page editor is used to display and edit schematic pages. So that one can parts;
wires; buses and draw graphics. The schematic page editor has a tool palette that you can use to
draw and place everything you need to create a schematic page. One can print from within the
schematic page editor, or from the project window.
(3.1.3) Schematic Diagram:-
74
(3.1.4) The Part editor
The part editor is used to create and edit parts.
From the view menu of the part editor you can choose either part or package. In part view one
can:-
Create and edit pars and symbols, then store in new or existing libraries.
Create and edit power and ground symbols, off-page connector symbols, and title block
Use the tool palette’s electrical tools to place pins on parts, and its drawing tools to draw
parts and symbols.
(3.1.5) The Session Log
The session log lists the events that have occurred during the current Capture session, includes
message resulting from using capture’s tools. To display context-sensitive help for an error
message, put the cursor in the error message line in the session log press F1.The ruler along the
top appears in either inches or mill meters, depending on which measurement system is selected
in the window panel. Your tab setting are saved and used each time you start capture.
(3.1.6) Schematic diagram:-
75
One can search for information in the session log using the find command on the Edit menu. You
can also save the contents of the of the session log to a file, which is useful when working with
Orcad’s technical support to solve technical problems. The default filename is SESSION.TXT.
(3.1.7) The Toolbar
Capture’s toolbar is dock able (that means you can select and drag the toolbar to new location) as
well as resizable, and displays tool tips for each tool; by choosing a tool button you can quickly
perform a task. If tool button is dimmed, you can’t perform that task in the current situation.
Some of the tools operate only on what you have selected, while others give you a choice of
either operating on what is selected or expanding the scope to entire project. You can hide the
toolbar, then display it again when u need it. For hiding select from the schematic page editor’s
view menu, choose TOOLBAR.
76
(3.1.8) The Tool Palette
Capture has two tool palettes: one for the schematic page editor and one for the part editor. Both
tool palettes are dock able and resizable. They can also display tool tips that identify each tool.
The drawing tools on the two tool palettes are identical, however, each tool palette has different
electrical tools after you choose a tool, and you press the right mouse button to display a context-
sensitive pop-up menu.
(3.1.9) The schematic page editor tool palette
The first group of tools on the tool palette is electrical tools, used to place electrical connectivity
objects. The second group of tools is drawing tools, used to create graphical objects without
electrical connectivity.
(3.1.10) The part editor tool palette
The first group of tools on the part palette is electrical tools, used to place pins and symbols.
They have been already explained above within the schematic page editor tools. The second
group of tools is drawing tools, used to create graphical objects without objects any electrical
connectivity and is described:
Pin Tools: Place pins on part
Pin Array: Place multiple pins on part
(3.1.11) Selecting and deselecting of objects
Once one selects an object, one can perform operations on it, include moving, copying, cutting,
mirroring, rotating, resizing, or editing. One can also select multiple, objects and edit them, or
77
group them in to a single object. Grouping objects maintain relation ship among them while one
moves them to another location.
(3.1.12) To select an object
Position the pointer on the object and click the left mouse button. The selected object displays in
the selection colors.
(3.1.13) To select multiple objects
For each object to be selected, keep the control key pressed while selecting the objects with the
cursor by pressing either left mouse button or the enter key.
(3.1.14) To deselect objects
Click on an area where there are no objects. Selected objects become deselected. Note that a part
occupies a rectangular area encompassing its entire graphics.
(3.1.15) Creation of net list in capture:
Select your design in the project manager.
From the tools, choose create net list. The net list dialog box displays.
Choose a net list format tab.
If necessary, set the part value and PCB foot print combined property strings to reflect the
information you want in the net list.
Click ok to create the net list.
In the net list file text box, enter a name for the output file. If the selected format creates
an additional file, enter its file name in the second text box.
(3.2) CREATING A SCHEMATIC DESIGN IN CAPTURE
(3.2.1) Creating a project
To create a new project, we will use Capture's Project Wizard. The Project Wizard provides you
with the framework for creating any kind of project.
1. Launch Capture.
78
2. From the File menu, choose New > Project.
3. In the New Project dialog box, specify the project name as Full Add.
4. To specify the project type, select Analog or Mixed A/D.
5. Specify the location where you want the project files to be created and click OK.
6. In the Create PSpice Project dialog box, select the Create a blank project option button.
7. Click OK to create the Full Add project with the above specifications.
The Full Add project is created. In the Project Manager window, a design file, fulladd.dsn, is
created. Below the design file, a schematic folder with the name SCHEMATIC1 is created. This
folder has a schematic page named PAGE1.
(3.2.2) Renaming the schematic folder and the schematic page
Now modify the design to change the name of both the schematic folder and the schematic page,
to HALFADD.
1. In the Project Manager window, right-click on SCHEMATIC1.
2. From the pop-up menu, select Rename.
3. In the Rename Schematic dialog box, specify the name as HALFADD.
4. Similarly, right-click on PAGE1 and from the pop-up menu select Rename.
5. In the Rename Page dialog box, specify the page name as HALFADD and click OK.
After renaming of the schematic folder and the schematic page, the directory structure in the
Project Manager window should be too similar to the figure below.
79
(3.2.3) Creating a flat design
In this section, we will create a simple flat half adder design with X and Y as inputs and SUM
and CARRY as outputs.
(3.2.4) Adding parts to schematic
To add parts to your design:
1. From the Place menu in Capture, select Part.
80
2. In the Place Part dialog box, first select the library from which the part is to be added and
then instantiate the part on the schematic page.
The gates shown in fisg.2.1 are available in the 7400.OLB.To add 7400.OLB to the project,
select the Add Library button.
3. Browse
to <install_dir>/tools/capture/library/pspice/7400.olb.
Select 7400.OLB and click Open.
The 7400 library appears in the Libraries list box.
4. From the Part List, select 7408 and click OK.
5. Place three instances of the AND gate, 7408, on the schematic page as shown in the
figure below.
81
6. Right-click and select End Mode.
7. Similarly, place an OR gate (7432) and two NOT gates (7404) as shown in the figure
below.
(3.2.5) Connecting parts
After placing the required parts on the schematic page, you need to connect the parts.
1. From the Place menu, choose Wire. The pointer changes to a crosshair.
2. Draw the wire from the output of the AND gate, U2A, to the one of the inputs of the OR
gate, U1B. To start drawing the wire, click the connection point of the output pin, pin3,
on the AND gate.
82
3. Drag the cursor to input pin, pin4, of the OR gate (7432) and click on the pin to end the
wire. Clicking on any valid connection point ends a wire.
4. Similarly, add wires to the design until all parts are connected as shown in the figure
below.
5. To stop wiring, right-click and select End Wire. The pointer changes to the default arrow.
(3.2.6) Adding ports
To add input and output ports to the design, complete the following sequence of steps:
1. From the Place menu in Capture, select Hierarchical Port. The Place Hierarchical Port
dialog box appears.
2. From the Libraries list box, select CAPSYM.
3. First add input ports. From the Symbols list, select PORTRIGHT-R and click OK.
4. Place two instances of the port as shown in the figure below
83
5. Right-click and select End Mode.
6. To rename the ports to indicate input signals X and Y, double-click the port name.
7. In the Display Properties dialog box, change the value of the Name property to X and
click OK.
8. Similarly, change the name of the second port to Y.
9. Add two output ports as shown in the figure2.1 (above). To do this, select PORTLEFT-L
from the CAPSYM library.
10. Rename the ports to SUM and CARRY, respectively.
11. Save the design.
The half adder design is ready. The next step is to create a full adder design that will use the half
adder design.
(3.2.7) Creating a hierarchical design
In Capture, you can create hierarchical designs using one of the following methods:
When you create a hierarchical design methodology, you need to follow these steps.
Create the lowest-level design.
Create higher-level designs that instantiate the lower-level designs in the form of
hierarchical blocks.
84
In this section, we will create a full adder design using hierarchical methodology. The steps
involved are:
1. Creating a project in Capture.
2. Creating the lowest-level design. In the full adder design example, the lowest-level
design is the half adder design. Creating the higher-level design. Create a schematic for
the full adder design that uses the half adder design created in the previous step.
(3.2.8) Creating the full adder design
1. In the Project Manager window, right-click on fulladd.dsn and select New Schematic.
2. In the New Schematic dialog box, specify the name of the new schematic folder as
FULLADD and click OK.
In the Project Manager window, the FULLADD folder appears below fulladd.dsn.
3. Save the design.
4. To make the full adder circuit as the root design (high-level design), right-click on
FULLADD and from the pop-up menu select Make Root.
The FULLADD folder moves up and a forward slash appears in the folder.
5. Right-click on FULLADD and select New Page.
6. In the New Page in schematic: FULLADD dialog box, specify the page name as
FULLADD and click OK.
A new page, FULLADD, gets added below the schematic folder FULLADD.
7. Double-click the FULLADD page to open it for editing.
8. From the Place menu, choose Hierarchical Block.
9. In the Place Hierarchical Block dialog box, specify the reference as HALFADD_A1.
10. Specify the Implementation Type as Schematic View.
85
11. Specify the Implementation name as HALFADD and click OK. The cursor changes to a
crosshair.
12. Draw a rectangle on the schematic page.
A hierarchical block with input and output ports is drawn on the page.
13. If required, resize the block. Also, reposition the input and output ports on the block.
14. Place another instance of the hierarchical block on the schematic page.
a. Select the hierarchical block.
b. From the Edit menu, choose Copy.
c. From the Edit menu, choose Paste.
d. Place the instance of the block at the desired location.
15. By default, the reference designator for the second hierarchical block is HALFADD_A2.
Double-click on the reference designator, and change the reference value to
HALFADD_B1.
16. Using the Place Part dialog box, add an OR gate (7432) to the schematic
17. To connect the blocks, add wires to the circuit. From the Place menu, choose Wire.
18. Draw wires from all four ports on each of the hierarchical blocks.
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19. Add wires until all the connections are made as shown in the figure below.
20. Add stimulus to the design. In the Place Part dialog box, use the Add Library button to
add SOURCSTM.OLB to the design.
21. From the Part List, select DigStim1 and click OK.
The symbol gets attached to the cursor.
22. Place the symbol at three input ports: port X of the HALFADD_A1, port X and Y of
HALFADD_B1.
23. Right-click on the schematic and select End Mode.
24. Specify the value of the Implementation property as Carry, X, and Y, respectively.
25. Select the Place Port button, to add an output port, CARRY_OUT, to the output of the
OR gate.
26. From the list of libraries, select CAPSYM.
27. From the list of symbols, select PORTLEFT-L and click OK.
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28. Place the output port as shown in the fig2.2.
29. Double-click the port name and change the port to CARRY_OUT.
30. Save the design.
We have only added digital components to the design so far. We will now add a bipolar junction
transistor to the SUM port of the HALFADD_A1 block.
1. Select the Place Part tool button.
2. In the Place Part dialog box, select the Add Library button.
3. Select ANALOG.OLB and BIPOLAR.OLB and click Open.
4. From the part list, add resistor R. Place this resistor on the schematic and connected one
end of the resistor to the SUM port of HALFADD_A1..
5. From the BIPOLAR.OLB, select Q2N2222 and place it on the schematic.
6. Complete the circuit by adding a collector resistance, Collector Voltage, and ground.
(3.2.9) Adding Collector Voltage
a. To add the voltage, add the SOURCE.OLB library to the project.
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b. From the Part List select VDC and click OK.
c. Place the voltage source on the schematic. By default, the source is of 0 volts.
Using the Property Editor, change it to a voltage source of 5V. To do this, double-
click the voltage source.
e. In the Property Editor window, change the value of the DC parameter to 5.
f. Save and close the Property Editor window.
(3.2.10) Adding Ground
a. To add ground, select the Place ground button.
b. In the Place Ground dialog box, select the SOURCE library.
c. From the part list, select 0 and click OK.
d. Place the ground symbol on the schematic..
7. Add a connector CON2 to the circuit. To do this, add a Capture library,
CONNECTOR.OLB to the project.
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(3.2.11) Generating parts for a schematic
Instead of creating a hierarchical block for the half adder design, you can generate a part for the
half adder design and then reuse the part in any design as and when required.
To generate a part from a circuit, complete the following steps.
1. In the Project Manager window, select the HALFADD folder.
2. From the Tools menu, choose Generate Part.
3. In the Generate Part dialog box, specify the location of the design file that contains
the circuit for which the part is to be made.
For this design example, specify the location of fulladd.dsn.
4. In the Net list/source file type drop-down list box, specify the source type as Capture
Schematic Design.
5. In the Part Name text box, specify the name of the part that is to be created, as
HALFADD.
6. Specify the name and the location of the library that will contain this new part being
created. For the current design example, specify the library name as fulladd.olb.
7. If you want the source schematic to be saved along with the new part, select the Copy
schematic to library check box. For this design, select the check box.
8. Ensure that the Create new part option is selected.
9. To specify the schematic folder that contains the design for which the part is to be
made, select HALFADD from the Source Schematic name drop-down list box.
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10. Click OK to generate the HalfAdd part.
A new library, fulladd.olb, is generated and is visible under the Outputs folder in the Project
Manager window. The new library also gets added in the Place part dialog box. You can now use
the Place part dialog box to add the half adder part in any design.
(3.2.11) Processing a design
After you have created your schematic design, you may need to process your design by adding
information for tasks such as, simulation, synthesis, and board layout. This section covers some
of the tasks that you can perform in OrCAD Capture while processing your design.
(3.2.12) Adding part references
To be able to take your schematic design to the Layout for packaging, you need to ensure that all
the components in the design are uniquely identified with part references. In OrCAD Capture
you can assign references either manually or by using the Annotate command.
In the full adder design, annotation is not required at this stage because by default, unique part
references are attached to all the components. This is so because by default, Capture adds part
reference to all the components placed on the schematic page. If required, you can disable this
feature by following the steps listed below.
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1. From the Options menu, choose Preferences.
2. In the Preferences dialog box, select the miscellaneous tab.
3. In the Auto Reference section, clear the automatically reference placed parts check box.
4. Click OK to save these settings.
In case the components in the design do not have unique part references attached to them, you
must run the Annotate command.
To assign unique part references to the components in the FULLADD design using the Annotate
command, complete the following steps:
1. In the Project Manager window, select the fulladd.dsn file.
2. From the Tools drop-down menu, choose Annotate.
3. In the Packaging tab of the Annotate dialog box, specify whether you want the complete
design or only a part of the design to be updated. Select the Update entire design option
button.
4. In the Actions section, select the Incremental reference update option button.
5. The full adder design is a complex hierarchical design. So choose the Update Occurrence
option button.
6. For the rest of the options, accept default values and click OK to save your settings. The
Undo Warning message box appears.
7. Click Yes. A message box stating that the annotation will be done appears.
8. Click OK.
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(3.2.13) Creating a cross reference report
Using Capture, you can create cross reference reports for all the parts in your design. A cross
reference report contains information, such as part name, part reference, and the library from
which the part was selected.
To generate a cross reference report using Capture:
1. From the Tools menu choose Cross References.
Alternatively, you can choose the cross reference parts button from the toolbar.
2. In the Cross Reference Parts dialog box, ensure that the Cross reference entire design
option button is selected.
3. In the Mode section, select the Use Occurrences option button.
4. Specify the report that you want to be generated.
5. In case you want the report to be displayed automatically, select the View Output check
box and Click OK to generate the report.
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A sample output below:
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(3.2.14) Generating a bill of materials
After you have finalized your design, you can use Capture to generate a bill of materials
(BOM). A bill of materials is a composite list of all the elements you need for your PCB design.
Using Capture, you can generate a BOM report for electrical and as well as non-electrical parts,
such as screws. A standard BOM report includes the item, quantity, part reference, and part
value.
To generate a BOM report:
1. In the Project Manager window, select fulladd.dsn.
2. From the Tools menu, select Bill of Materials.
3. To generate a BOM report for the complete design, ensure that the Process entire design
option button is selected.
4. For a complex hierarchical design, the preferred mode is the occurrence mode. Therefore,
select the Use Occurrences option button.
5. Specify the name of the BOM report to be generated. For the current design, accept the
default name, FULLADD.BOM.
6. Click OK and BOM report is generated.
(3.2.15) Design rules check
After you have completed your design, it is recommended that you run design rules check (DRC)
to isolate any unwanted design errors that might be there in the design.
To run DRC on the full adder design, complete the following steps:
1. In the Project Manager window, select the design file, fulladd.dsn.
2. From the Tools menu, select Design Rule Checks.
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In the Design Rules Check dialog box, the Design Rules Check tab is selected
by default. Specify your preferences.
By default, the Check entire design option button is selected. To run DRC on the complete
design, accept the default selection.
4. Select the Use Occurrences option button.
5. To run the DRC, select the Check design rule option button.
6. In the Report section, select appropriate check boxes to specify what all are required in
the DRC report. For the current design example, select the Check unconnected nets and
Report identical part references check boxes.
7. Select the View Output check box. When this check box is selected, the DRC report is
opened automatically for viewing after the checks are complete.
8. In the Report File text box, specify the name and the location of the DRC file to be
created and click OK.
After the checks are done, the DRC report is displayed in the format shown below.
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Checking Pins and Pin Connections
--------------------------------------------------
Checking Schematic: FULLADD
--------------------------------------------------
Checking Electrical Rules
Checking for Unconnected Nets
Checking for Invalid References
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------
Checking Schematic: HALFADD_A1 HALFADD
--------------------------------------------------
Checking Electrical Rules
Checking for Unconnected Nets
Checking for Invalid References
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------
Checking Schematic: HALFADD_B1 HALFADD
--------------------------------------------------
Checking Electrical Rules
Checking for Unconnected Nets
Checking for Invalid References
Checking for Duplicate References
Check Bus width mismatch
Chapter-(4)
PCB Design Soft wares
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There many soft wares which are used for PCB designing. All the soft wares are used according
to the level of their designing environments. The designing environment describes the whole
levels of working of designing and different operational uses and compatibility with other
designing soft wares. So different companies’ are using different software according to need.
Some of the soft wares are given below:-
OrCad
CADSTAR
Protel
TANGO
Allegro
Mentor
The most commonly software which are used for PCB design in India are Protel and OrCad.
98% of companies are using them. However Mentor and Allegro are used for high level
designing and also they are very complex and not user friendly.
(4.1) OrCad
ORCAD stands for Orgam Computer Aided Design. However Orgam is the name of place where
it was developed. The Orcad was first developed in 1998.
Till then there is continues upgrading is going on for it, which makes it the
most popular designing software. It contains all designing features of Allegro and mentor
graphics. It all has the compatibility with its older versions. The essential and new features of
Orcad are given below:-
Designing compatibilities.
Auto routing.
Fuzzy logic auto routing
Annotation
ECO layout run.
Upgraded simulating circuits
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User designed component libraries
14 Multilayer designing ability
Gerber post processing
Their many more options in this which we discuss later on. Now our first part of CAD designing
is to learn the design environment. This will show the whole over view of the designing criteria
of the software of Orcad that are used to design a circuit.
(4.1.2) DESIGN ENVIOURMENT
OrCad has a long history of providing individuals and teams with a complete set of technologies
that offer unprecedented productivity, seamless tool integration, and exceptional value. New 10.5
releases continue that tradition.
Today's lower cost and yet highly sophisticated electronic design automation systems have
created a unique challenge to nearly every engineering department. Therefore the use of EDA
tools has become increasingly important as product lifecycles have become shorter and shorter.
Modern electronic design automation (EDA) tools are beginning to support a more efficient and
integrated approach to electronic product development.
OrCad Capture® design entry is the most widely used schematic entry system in electronic
design today for one simple reason: fast and universal design entry. Whether you're designing a
new analog circuit, revising schematic diagram for an existing PCB, or designing a digital block
diagram with an HDL module, OrCad Capture provides simple schematic commands you need to
enter, modify and verify the design for PCB. OrCad Layout ® offers PCB designers and PCB
design teams the power and flexibility to create and share PCB data and constraints across the
design flow. OrCad Layout delivers all the capabilities to designers need from netlist to place
and route, to final output. The ease-of use and intuitive capabilities of OrCad Layout provides for
quick startup and rapid learning right out of the box.
The design terminology has following parts in ORCAD 10.5.
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CAPTURE CIS
PSPICE
LAYOUT PLUS
CAPTURE CIS is a schematic design tool. It used to design the circuits on the computer to
couple it with PCB design. The capture is the name of software and CIS stands for component
information server. This is the latest version of capture.
PSPICE is a simulation tool, used for simulating both Analog and digital circuits. It contains
over 1000 simulating circuits of Texas instruments. And give simulating values of designed
circuit.
LAYOUT PLUS is a tool used for PCB routing and floor-planning. The circuit in capture is
coupled here and the all PCB routing is done in here. Plus is the latest version of layout and
many more options than previous one
(4.1.3) Technique Used For PCB Design
There mainly two techniques which are use for the PCB designs.
1. Hand Taping
2. Computer Aided Design
1) PCBS USING HAND TAPING
o PCB design using hand taping is the process of technical drawing.
o In hand taping method layout should be prepared on grid paper.
o In hand taping, components pads can be prepared by using black pads.
o Routing of the board can be done by tapes with different widths.
o Each layer (top, bottom) has to prepare separately.
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DISADVANTAGS OF HAND-TAPING FOR PCB DESINING:
o Each layer has to be designed separately.
o We cannot generate NCD files for CNC drilling.
o Difficult to modify the design in the designing process or after designing.
o Difficult to get good design overview.
2) PCB DESIGNING USING CAD
All the above difficulties can be removed by using CAD system.
CAD system for PCB designing requires following:
o A computer system.
o PCB design software like OrCad, CADSTAR, Protel, TANGO, Mentor etc.
o A photo plotter for art work generation.
There are many enhanced features in electronic design automation tools which not possible in the
hand taping. The main advantages are given below:
o Auto placement
o Auto routing
o After routing, optimization of tracks can be done.
o Provides physical design reuse modules
o Electrical rule check (ERC)
o All the layers are generated from the same design by giving different options.
o Bill of material can be generated which contains number of different
components used.
o We can draw conductors as an arc, semi-circular at different angles.
o Design Rule Check
o Advanced CAD systems have high speed analysis.
o CAD system provides all NCD files and Gerber data files for photo plotting.
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(4.1.4) BASIC DESIGN STEPS IN CAD- SYSTEM
The following design steps are very common while designing a PCD in CAD:
Entry the schematic diagram.
Net list file creation.
Placement of components manually or automatically.
Routing of the board using manual routing tools or auto router
Design rule check physical and electrical.
Artwork generation.
(4.1.5) A TRADITIONAL DESIGN FLOW IN CAD- SYSTEM
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(4.2) PSpice
(4.2.1) Objective
PSpice is a simulator provided by OrCAD and can be used to simulate both analog and digital
circuits. PSpice simulator is closely integrated with OrCAD Capture to provide you with a rapid
design-and-simulate iterative cycle. Using PSpice, you can explore various design configurations
before committing to a specific implementation.
PSpice Schematics is a schematic capture front-end program with a direct interface to PSpice.
In one environment, you can do all of the following using PSpice Schematics:
design and draw circuits
simulate circuits using PSpice
analyze simulation results using Probe
graphically characterize simulation stimuli using the fully integrated PSpice Stimulus
Editor, so stimulus definitions are automatically associated with the appropriate symbols
Capture
Libraries
Footprint
Layout
Gerber tools
Gerber and drill files
Gerber and plotter drawing
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graphically characterize simulation models using the fully integrated PSpice Model
Editor utility, so model definitions are automatically associated with the appropriate
symbols
interface to PSpice Optimizer for analog circuit performance optimization
interface to PCB programs for printed circuit board layout
(4.2.2) Simulation using PSpice
PSpice models the behavior of a circuit containing any mix of analog and digital devices.
To simulate a design, PSpice needs to know about:
the circuit topology
the analysis type
the simulation models that correspond to the parts in your circuit
(4.2.3) Pspice files
The principal files used by Advanced Analysis are:
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PSpice simulation profiles (.sim)
Advanced Analysis profiles (.aap)
Device property files (.prp)
Custom derating files for Smoke (.drt)
Discrete value tables for Optimizer (.table)
(4.2.4) Files generated by PSpice
After reading various data files and any other required inputs, PSpice starts the simulation. As
the simulation progresses, PSpice saves the simulation results in two files, the Waveform data
file and the PSpice output file.
Waveform data file: The data file contains simulation results that can be displayed
graphically. PSpice reads this file and displays waveforms reflecting circuit response at
nets, pins, and parts that you marked in your schematic (cross-probing).
PSpice output file: This is a user-configurable file. Depending on the options specified by
the user, this file may or may not contain any information. To configure the output file,
you can use the Options tab in the Simulations Settings dialog box, as shown in the figure
below.
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(4.2.5) Analysis types
You can perform the following types of circuit analysis using PSpice:
DC Analysis
AC Analysis
Transient Analysis
Advanced Analysis
(4.2.5a) Overview of the full adder design
In this chapter, we will simulate the full adder design using PSpice. The full adder design is a
complex hierarchical design that has two hierarchical blocks referring to the same half adder
design.
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To go through the steps detailed in this chapter, you should have the full adder design ready. You
can either create the full adder design or use the one provided to you along with the tutorial.
To copy the design files provided with the tutorial, unzip the flowtut.zip file shipped along with
the tutorial. This file is located at <install_dir>/doc/demotut/tutorial_example.
(4.2.5b) Simulating the full adder design
To provide PSpice with information about the type of simulation you wish to perform and the
resources to be used in your simulation, you must create a simulation profile before you can start
a PSpice simulation. A simulation profile saves your simulation settings for an analysis type so
that you can reuse them easily. In this section, we will use the TRAN.sim profile to perform
transient analysis on the full adder circuit.
(4.2.6) Editing a simulation profile
After you have created a simulation profile, you can still make modifications to it. We will edit
the TRAN.sim profile to configure a stimulus file for providing inputs to X, Y and Carry.
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1. In the Project Manager window, right-click on FULLADD-TRAN simulation profile.
2. From the pop-up menu select Edit Simulation Settings.
3. In the Simulation Setting dialog box, select the Configuration Files tab.
4. From the Category list box, select Stimulus.
5. In the Filename text box, specify the location of the stimulus file.
6. Select the Add to Design button.
7. Click OK to save the settings.
(4.2.7) Running PSpice
1. To simulate the design, choose Run from the PSpice menu in OrCAD Capture.
The PSpice Net list Generation progress box appears indicating that the PSpice Netlist is being
generated. After the netlist generation is complete, the design is simulated and PSpice is started.
The Output window in PSpice indicates that the simulation is complete.
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Though the simulation is complete, the Probe window does not yet display any waveform
that might help you analyze the circuit behavior and determine the validity of your design.
(4.2.8) Viewing Output Waveforms
After simulating a design using PSpice, you can plot the output waveforms in the Probe window.
This will help you visualize the circuit behavior and determine the validity of your design. You
can analyze the output waveforms and evaluate your circuit for performance analysis and data
comparison from multiple files.
Using the Probe window, you can:
view simulation results in multiple Probe windows
compare simulation results from multiple circuit designs in a single Probe window
display simple voltages, currents, and noise data
display complex arithmetic expressions that use the basic measurements
display Fourier transforms of voltages and currents, or of arithmetic expressions
involving voltages and currents
for mixed analog/digital simulations, display analog and digital waveforms
simultaneously with a common time base
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add text labels and other annotation symbols for clarification
For PSpice to display output waveforms in the Probe window, you need to perform at least one
of the following steps.
Place markers
Add Plot Window template
Add complex traces
(4.2.9) Place markers
You place markers in your circuit design in Capture to indicate the points where you want to see
simulation waveforms displayed in PSpice.
You can place markers:
Before simulation to limit results written to the waveform data file, and automatically
display those traces in the active Probe window.
During or after simulation, to automatically display traces in the active Probe window.
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To add markers, from the PSpice menu in Capture, choose Markers.
You can also use the buttons provided on the Standard toolbar to add markers.
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We will now modify the full adder design in Capture by adding Voltage markers to view the
output waveforms in the Probe window.
1. From the PSpice menu in Capture, choose Markers and then select Voltage Level.
2. Place the marker between transistor Q1 and resistor R2, as shown in the figure given
below.
3. To view the output waveform at the marker location, double-click the marker.
The output waveform appears in the Probe window in PSpice..
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(4.2.10) Add Plot Window template
In addition to markers, you can place Plot Window Template markers in Capture. A Plot
Window Template marker will restore the associated template when you run the simulation in
PSpice.
The analysis type defined in the profile will determine the type of template that will be loaded.
To place a plot window template marker, select Markers from the PSpice menu, and then select
Plot Window Templates.
(4.2.11) Add complex traces
By default, the waveforms that PSpice displays are the simple voltages, currents, and noise data
from your circuit. Using the Trace menu in PSpice, you can add traces that are complex
arithmetic expressions that use the basic measurements, such as Fourier transforms of voltages
and currents and arithmetic expressions involving voltages and currents.
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(4.2.12) Configuring the Probe window
Using the Plot menu in PSpice, you can control the settings for the X- and Y-axis in the Probe
windows. Using the Plot menu, you can also customize the grid settings in the Probe window
and add text labels and other annotation symbols to your traces. You can also configure the way
you want to view the waveforms by defining display settings on the Probe Window tab in the
Simulation Settings dialog box.
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(4.2.13) Performing parametric analysis
In this section, you will perform the Parametric Sweep analysis on the full adder design.
You will evaluate the influence of varying base resistance on the switching characteristics of the
transistor.
To do this, you need to perform the following steps:
Modify the full adder circuit by changing the value of resistor R1 to a variable {RES}.
Place a PARAM part to declare values of the parameter {RES}.
Create a new simulation profile or modify the existing profile to set up the parametric
analysis.
In this example, there will be multiple simulation runs, one for each value of resistor R1. After
the analysis is complete, you can analyze output waveforms for the analysis runs using
PSpice A/D.
(4.2.14) Adding a variable circuit parameter
Changing the value of R1 to the expression {RES}
1. Open the full adder design, FullAdd.opj, in OrCAD Capture.
2. To display the Property Editor window for R1, double-click resistor R1.
3. In the Value text box, replace the original value of 1K with {RES}.
4. Click OK to save the modifications.
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Adding a PARAM part to the FULLADD design
1. From the Place menu in Capture, choose Part.
2. Using the Place Part dialog box, add SPECIAL.OLB to the FULLADD project.
3. In the Libraries list box, select SPECIAL.OLB.
4. From the Part List list box, select PARAM and click OK.
5. Place an instance of the PARAM part on the schematic page.
6. Double-click the PARAM part to display the Property Editor and click New Row.
The Add New Row dialog box appears.
7. In the Name text box, enter RES, without curly braces.
8. Specify the value as 10K and click OK.
This creates a new property for the PARAM part, as shown by the new column labeled RES
in the Property Editor window.
9. Select the new cell RES and click Display.
10. In the Display Format frame, select Name and Value and click OK.
11. Click Apply to update all the changes to the PARAM part.
12. Close the Property Editor window.
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(4.2.15) Adding a Plot Window Template marker
In this section, we will add a Plot Window Template marker to the circuit and observe the
change in the output for different values of R1.
1. Remove the voltage marker added to the schematic design in the Place markers section.
2. From the PSpice menu in Capture, choose Markers and then select Plot Window
Template.
3. Select the Rise time of Step response template marker from the Plot Window Templates
dialog box and click Place.
4. Place the marker between transistor Q1 and resistor R2, as shown in the figure given
below.
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(4.2.16) Setting up parametric analysis
In this section, we will use the FULLADD-SWEEP simulation profile to set up the parametric
analysis. This simulation profile has been created by inheriting the settings from the FULLADD-
TRANS profile.
The simulation profile created in the Creating a simulation profile from an existing profile
section, does not cover the settings for the parametric analysis. Therefore, we need to modify the
FULLADD-SWEEP simulation profile. To do this, you first make SWEEP the active simulation
profile in Capture and then open the profile for modifications.
1. In Capture, select FULLADD-SWEEP from the Active Profile drop-down list box.
2. From the PSpice menu, choose Edit Simulation Profile.
The Analysis tab of the Simulation Settings dialog box appears.
3. Select the Parametric sweep check box in the Options list box.
4. Select the Global parameter option button under the Sweep variable. This sets the value
to the sweep value and all expressions are re-evaluated.
5. Type RES in the Parameter name text box.
6. Type 25K, 50K, and 5K in the Start value, End value, and Increment text boxes,
respectively and click OK.
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(4.2.17) Running the simulation
To run the parametric analysis, choose Run from the Simulation drop-down menu.
When the simulation is complete, the Simulation complete message appears in the output
window, and the Available Sections dialog box appears as shown in the figure below.
This dialog box appears for all multi-run analyses.
Select the runs for which you want to display the data and click OK.
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(4.2.18) Exporting output waveforms
You can export the output waveforms in the following formats:
.dat file
.stl file
.txt file
To export the output waveform:
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(4.3) Layout Plus
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(4.3.1) Introduction
When the schematic has been fully entered and the simulation has been completed, the next step
is to place the components onto the designed PCB and then determining the pattern of the
interconnections between the components.
Layout plus is one part for the PCB design in which we place as well as route the components an
set unit of measurement, grids, and spacing in OrCad. Within other soft wares you also have to
place and route the components in similar way. For the placement and routing of the components
we normally use auto-placement and auto-routing. Unfortunately, in a lot of soft wares some
critical signals have to be routed manually before auto-routing. In layout plus we also define the
layer stacks, pad stacks and vias.
(4.3.2) Layout master workflow
Layout supports every phase of the design process. A typical printed circuit board design flow
has five key phases:
Board-level schematic
Component placement
Board routing
Post processing and Intertool communication
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(4.3.3) Repetition of the steps for board design:
At first, we have created a net list from our schematic diagram by using capture.
Layout plus includes design rules in order to guide logical placement and routing. That
means, load the net list into layout to create the board. At the same time you have to
specify the board parameters.
Specify board parameters: Specifying global setting for the board, including nits of
measurements, grid, and spacing
Place components: Use the components tool in order to place manually the components
which are fixed by the system designer on the board or otherwise use auto-placement.
Route the board: Use different routing technologies to route the board and take
advantage of push and shove (a routing technology), which moves track you are currently
routing as well as you can also auto route the board.
Provide finishing of the board: Layout supplies an ordered progression of commands
on the auto menu for finishing your design. These commands include design rule check,
cleanup design, rename components, back annotate, run post processor, and create
reports.
(4.3.4) The design window:
The design window provides a graphical display of printed circuit board, it is primary window
you use when designing your board. It also provides tools to facilitate the design process such as
to update components and design rule violation.
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(4.3.5) Method to create a broad with bard with Layout Plus
Ensure that net list with all footprints and necessary information has been created.
Create a directory in which the schematic design, net list, and boar will co-exit and put
the schematic design and net list. OrCad provides a directory for this purpose.
From the layout session frame’s file menu, choose New. The load template file in the
dialog box displayed.
Select the technology template (.TCH), then choose the open button and load the net list
in other box.
Then apply the auto ECO.
If necessary, respond to link footprints to component dialog.
Draw the board outline by using the obstacle tool in the tool bar.
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(4.3.6) Setting board parameters
There is some parameter which should be set before placing the components on board. They are
as follows:-
Set Datum
Create a board outline
Set units of measurements
Set system grid
Add mount holes
(4.3.7) Creating of board outline
Board outline is the graphical representation of the size of the actual PCB board. So it is the main
step in layout, to draw the board outline of the actual size of PCB board.
So to draw it, the obstacle is selected from the tool bar. And from obstacle layer drop down list,
select global layer, then choose the ok button. Then move to point on the board at which to want
to start drawing the outline, and draw the outline of requires size with the help of mouse.
(4.3.8) Placement of components
Placement of components means that to place the components in designed box. A designer
should follow the following steps before going for it:-
Optimize the board for component placement.
Load the placement strategy file.
Place components on the board.
Optimize placement using various placements
Components can be placed by using two techniques:-
1) Manual placement of components
2) Auto placement of components
Choose the components tool bar button. From the pop up men, choose the queue for placement.
The components selection criteria dialog box appears. Enter the reference designator of the
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components that you want to place in the appropriate text box, and click ok. Drag the
components to desired location, place it there.
(4.3.9) Conductor Routing in Layout
After placing all the components the other main step is to route the board to from the electrical
connections between the components. One c may route board manually or automatically by auto
router.100% auto routing can be achieved only when components are placed in the order of
functional flow of electronic circuit. The main routing tool available in OrCad is as flow:-
Add/edit route mode
Edit segment mode
Shove track mode
Auto path route mode
(4.3.10) Design Rule Check
In manual designs every thing was checked as a possible source of error. Components sizes, hole
sizes, conductor widths and clearance, land-to-hole-ratio, board areas to be free of components,
clearance to the edges, positional accuracy and of course electrical interconnections had tad to be
personally reviewed with a great deal of care. After completing the design of printed circuit
board with the help of an EDA-Tool, a designer has again to verify the PCB in order to find out
errors. Such type of verifications/design rule check contains beside the general verifications
commonly two types:-
Physical verification
Electrical verification
(4.3.11) Post processing
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Post processing can be done once the design is completed in all aspects. The common way is still
a process to generate GERBER data and NCD files which can be used for photo plotting and for
steps of CNC manufacturing and PCB- drilling.
(4.3.12) Component Placement
Placing components on a PCB is not a straightforward task. There are several points that must be
taken into consideration when placing the components on the board space; signal path length,
clock skewing and unconnectedly traces are typical problems. Placement can either be done
manually or by use of an automatic placement algorithm.
(4.3.13) Manual Placement:
Manual Placement is used when specific design features are to be implemented. Key components
can then be grouped together and placed in close proximity to one another. There are various
features that can be used to help with placement. Actual placement of the component depends on
several factors, many of which are interactive and rely on where the previous part has been
placed. Most important, as has already been mentioned, is the placement of connectors, switches,
displays etc. Exact positional placement is usually critical for this type of device. A connector is
one of the least flexible components and may even consist of simply a pattern etched into the
copper surface (e.g. an edge connector).
After the fixed components are in place the design must be considered as a single piece of work.
There are often associations between specific components; e.g. integrated circuits and
decoupling capacitors that must be adjacent to have any benefit. Where such an association
exists, the parts should be placed close together.
(4.3.14) Automatic Placement
Automatic placement programs are normally based on an algorithm that calculates the rout
ability of the pattern for a given interconnection pattern. It will examine several different options
and present a "maximally" good layout.
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(4.3.15) Automatic placement board
It should be noted at this stage that the placement program is only as good as the algorithm and
that there will be wide variations in package performance. The package will not necessarily be
very acceptable in terms of manufacturability and presentation, as is shown in the diagrams
below.
As can be seen from the above, rout ability does not correlate well with interconnect length. It
has the advantage that it is easy to calculate and therefore, runs very fast. It does tend to bunch
the components closely together in the middle of the board. Unless the designer has added
specific instructions about spacing manual separation of the components will be required.
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Many packages will give a guide as to whether a design is routable with some form of rout
ability analysis. The analysis will highlight any areas of the board where it may be difficult to
complete the required interconnections as per example below.
(4.3.16) Board Routing
Routing is the act of the placement of copper tracks on the PCB for electrical connection. At this
stage there are several design factors that must be implemented although these should have been
decided earlier.
The width of the conductors and their spacing determines the electrical characteristics of the
connection. This is mainly because the width of the conductor determines its current carrying
capacity. This particular factor will be investigated in much more detail later in the course.
Conductor spacing is an equally important parameter, the distance between adjacent edges of
conductors on the same layer. It is a measure of the insulating properties of the board. The
further apart the conductors are, the higher the voltage that can be carried on adjacent tracks.
The number of layers to be utilized is another key feature of the design. The more layers present,
the easier it is to route the design. However, more layers make the circuit more expensive to
build - more holes will be required and the drilling costs will increase.
Other factors must also be taken into account but these will not be considered at this stage.
(4.3.17) Manual Routing
Manual routing is quite straightforward. The required interconnection is selected for routing and
the connection between both ends made. It is usual to route key connections first, i.e. Vcc and
Ground as these can be most important to the electrical performance of the final product.
Any key connections in terms of length or placement are then routed as necessary. The procedure
is then done time and again until the board is fully routed and all interconnections have been
made. Manual routing is very time consuming but can give a very effective and often optimal
solution. The diagram below shows a partially routed circuit that has been done manually.
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(4.3.18) Auto Routing
Auto router software uses the CAD net list as its input as to how to generate the circuit
interconnections. It compares the placement of the components with the net list details and
decides which trace should go where. . Auto routers find paths for the connections by following a
prescribed set of wiring rules and following these much more speedily than a human operator.
The set of rules that can be produced is somewhat limited and the result is not always what the
designer requires. The auto router does not consider the manufacture of the board and can often
have redundant connections that lead to a poor looking design. It is usually necessary for the
designer to manually tidy up the design and enhance the finished product. The diagram below
illustrates how an auto router does not always produce the best result.
Example of Auto router Weakness
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The fact that an auto router does not always do as good work as expected must be realized and
accepted by the PCB designer where time to market is limited. Some of the most modern auto
routers do a much better job than some of the others; the cost of the product becomes the limiting
factor. Where many thousands of connections are to be made, it can be the only economic
method.
It is usually a mix of both automatic and manual methods that achieve the best results in terms of
an efficient and manufacturability design. The diagram below shows a board of 202 connections
auto routed for a two-sided board in 35 seconds on a PC. Try doing that by hand!!!
100% Routed Two-layer PCB
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(4.3.19) Fabricating the Layout
Usually fabrication of layout is the final step of circuit design. The ultimate goal is to produce
artwork that can be used to make a functional printed circuit board and generate the data to drive
a numerical controlled drilling machine and generate the co-ordinates and package data to drive a
pick-and-place machine. The artworks contain the trace patterns for each layer of the board. Each
layer in the ‘sandwich’ of the board will have its own unique artwork. Artworks will also be
produced for the Solder Resist Layers, for top and bottom and for any Silkscreen layers required.
The drill data will consist of a series of co-ordinates and drill data relative to some predefined
datum. Production documentation will also come under the generic term artwork. Data can be
produced which can be used with pick-and-place machines to populate boards and generate
component lists. More sophisticated packages will be capable of producing a set of test vectors
and values for test during manufacture.
The following diagram shows one of the outputs at this stage.
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BIBLIOGRAPHY
8051 Microcontroller – Programming (Mohammad Ali Mazidi) http://www.google.co.in/ www.ludhianaprojects.com www.asjobs4u.com www.atmel.com www.projectsidea.com www.toshankits.com
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