Gujarat Technological University (http://www.gtu.ac.in/)

A

Report

Of

Workshop

On

“ Beyond the Hills of the Multicores, lies

the valley of Accelerators”

By

Dr. Aviral Shrivastava Associate Professor, School of Computing Informatics and Decision Systems

Engineering, Arizona State University

Date:

17th July, 2015

Venue:

Gujarat Technological University Nr.Vishwakarma Government Engineering College

Nr.Visat Three Roads, Visat - Gandhinagar Highway Chandkheda, Ahmedabad – 382424 – Gujarat

Gujarat Technological University (http://www.gtu.ac.in/)

Coordinated and Reported By: Nidhi Thakore [adm_nidhi@gtu.edu.in]

Under the visionary leadership of Honorable Vice Chancellor, Dr. Akshai Aggarwal, Gujarat

Technological University successfully organized One Day Workshop on “Beyond the hills

of the Multicores, lies the valley of Accelerators” on 17th July, 2015 at its Chandkheda

Campus, Ahmedabad. The workshop was conducted by Dr. Aviral Shrivastava, Associate

Professor, Arizona State University. The core objective of the workshop was to help the

faculty and students of CE / IT to explore the scope of Multicore processors and the use of

Accelerators.

About Resource Person: Dr. Aviral Shrivastava, Associate Professor in the School of Computing Informatics and

Decision Systems Engineering at the Arizona State University and Head of Compiler and

Microarchitecture Labs (CML). Dr. Shrivastava received his Ph.D. and Masters in

Information and Computer Science from University of California, Irvine, and bachelors in

Computer Science and Engineering from Indian Institute of Technology, Delhi.

He is a 2011 NSF CAREER Award Recipient, and recipient of 2012 Outstanding Junior

Researcher in CSE at ASU. His research lies at the intersection of compilers and

architectures of embedded and multi-core systems, with the goal of improving power,

performance, temperature, energy, reliability and robustness. His research is funded by

NSF and several industries including Microsoft, Raytheon Missile Systems, Intel, Nvidia, etc.

He serves on organizing and program committees of several premier embedded system

conferences, including ISLPED, CODES+ISSS, CASES and LCTES and regularly serves on NSF

and DOE review panels.

Right now, he is a visiting faculty in the EECS department at University of California,

Berkeley.

The workshop commenced with welcome speech by Ms. Nidhi Thakore - Program

Coordinator. Inaugural session was graced by Mr. Naresh Jadeja - Deputy Director GTU. Mr.

Jadeja warmly welcomed the speaker Dr. Shrivastava and delivered encouraging words to

all participants by motivating them to attend such GTU events. He also explained the

objectives, importance of high speed computing to the participating faculty & students and

suggested that especially the students can explore on this subject and can work upon it for

their final year project.

Dr. Shrivastava started with the open discussion on what is the need of higher performance

and why do we need more computing? We are already having high performance computers

but still the world is running behind higher and higher computing. He bifurcated the need

of higher performance into High Performance Computing, Desktop Computing and

Embedded Computing by describing each of their applications. Later on he asked questions

to the participants regarding the various applications that take up more time in loading and

Gujarat Technological University (http://www.gtu.ac.in/)

Coordinated and Reported By: Nidhi Thakore [adm_nidhi@gtu.edu.in]

discussed the various possible the reasons behind them. He explained that power efficiency

is the bottleneck for high power computing and super computers by taking example of

power consumption and power dissipation at Data Center Level, Chip Level and Hardware

Block Level. Dr. Shrivastava showed calculation by establishing relationship between

frequency, power utilization and manufacturing cost.He discussed the use of thermal

sensors to save the processor from burning, heat dissipation mechanism and Dynamic

Thermal Management (DTM) of the processors starting from small device like mobile to

high end performing super computers.

Dr. Shrivastava said that “Multicores pave the road ahead” –Performance can be increased

by adding more and more cores. He added that the emergence of multi-cores will change

computing as never before. Software companies have to parallelize their applications or

face extinction. While last decade saw a tremendous need of software programmers, the

greatest need in the coming decade will be of parallel programmers.

Then he explained Accelerators which are Beyond the Multicores and added that power

and performance of critical computations can be off-loaded to accelerators. Accelerators

are those which perform application specific operations and achieve high throughput

without loss of CPU programmability.

Following are the types of accelerators which were discussed:

Hardware accelerators (e.g., IntelSSE)

Software accelerators (e.g., VLIW accelerators)

Reconfigurable accelerators (e.g., FPGAs)

Programmable accelerators (CGRAs)

Graphics accelerators (e.g. nVIDIA Tesla, Fermi)

The above examples are some of the foreseeable solutions that can further improve power

efficiency for computation. Among these, CGRAs, Or Coarse Grain Reconfigurable Arrays

are considered to be of very promising technology. He also discussed the how the change in

processor, hardware and software affects the power consumption and came down to a

conclusion that change in software leads to very high power consumption while change in

processor leads to least power consumption. He encouraged the participants to learn how

to program a multicore. He also talked about recent research in developing compiler

technology to enable CGRAs as general purpose accelerators.The distinguishing

characteristics of CGRAs and its comparison with ASICS, FPGA and GPUs were shown. The

working of CGRA through data dependency graph and its use for streaming applications

was explained broadly. Using CGRA as a co-processor (accelerator) improves the execution

time and reduces power consumption.

Later on he briefed the participants about the phenomenon of soft error and protection

against soft errors. Working of GPU (Graphics Processing Unit) through loops and the

Gujarat Technological University (http://www.gtu.ac.in/)

Coordinated and Reported By: Nidhi Thakore [adm_nidhi@gtu.edu.in]

concept of parallel loops was explained. The conclusion for GPU was that GPU are good for

parallel loops but are worse than CPU for non-parallel loops.

Dr. Shrivastava said that “Pipelining is one of the pillars of computer architecture”.

He explained Mapping a Kernel onto CGRA with the help of software pipelining for

preserving data dependencies. Then he presented the following topics in detail:

Spatial Mapping on a CGRA and the challenges of minimizing the routing

Graph Drawing Problem explaining Split & Push Algorithm by showing example of

Good Mapping and Bad Mapping

Graph Drawing Problem by Matching Cut

Split & Push KernelMapping

Temporal Mapping on CGRA

Recomputation and Routing

Exploiting registers in the CGRA

Using Registers for inter-iteration dependencies

Multi-threading on CGRA

Mapping Kernel onto Pages

Software-Managed Manycore (SMM) Architectures at Compiler Microarchitecture

Lab

Following conclusions were drawn from this workshop:

Multi-threading leads to Better Performance

Mapping to pages improves utilization CGRAs offer an extremely power-efficient and high performance computing

platform Throughput in CGRA improves as the number of threads increases

Utilization and therefore throughput improves as we increase CGRA size

Power-efficiency is the chief bottleneck for higher performance Multi-cores only go so far: Time for accelerators has come!

Gujarat Technological University (http://www.gtu.ac.in/)

Coordinated and Reported By: Nidhi Thakore [adm_nidhi@gtu.edu.in]

FEEDBACK

"Awesome!!!Looking forward for such more events.

Thanks for organizing such a superb and knowledgeable workshop."

--Kalim Mohammed Habib Puthawala,

Sankalchand Patel College of Engineering and Technology,Visnagar

“It was a nice experience at GTU Chandkheda. Specially Iam happy that our university is

taking initiative for students by calling highly qualified foreign professors and conducting

such workshops. And I hope that in future there will be many more Seminarsand

Workshops at University. Thank you..!!”

--Nihar Bhatt, Shanker Sinh Vaghela Bapu Institute of Technology

“Thank you for arranging this seminar. It is going to help me a lot and I am thing of doing a

project on it. Dr. Aviral Shrivastava shared great knowledge with us.”

--Purav Patel, GEC Sector 28, Gandhinagar

MEDIA COVERAGE

http://deshgujarat.com/2015/07/21/multi-cores-will-change-computing-need-in-

future-will-be-of-parallel-programmers/

Gujarat Technological University (http://www.gtu.ac.in/)

Coordinated and Reported By: Nidhi Thakore [adm_nidhi@gtu.edu.in]

WORKSHOP PHOTO GALLERY

Dr. Shrivastava delivering lecture to participants

Participants receiving certificate

Participants of Workshop