© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The...

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gital Integrated Circuits 2nd Devices Digital Digital Integrated Integrated Circuits Circuits A Design Perspective A Design Perspective The Devices The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic July 30, 2002
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Page 1: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Digital Integrated Digital Integrated CircuitsCircuitsA Design PerspectiveA Design Perspective

The DevicesThe Devices

Jan M. RabaeyAnantha ChandrakasanBorivoje Nikolic

July 30, 2002

Page 2: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Goal of this chapterGoal of this chapter

Present intuitive understanding of device operation

Introduction of basic device equations Introduction of models for manual

analysis Introduction of models for SPICE

simulation Analysis of secondary and deep-sub-

micron effects Future trends

Page 3: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The DiodeThe Diode

n

p

p

n

B A SiO2Al

A

B

Al

A

B

Cross-section of pn-junction in an IC process

One-dimensionalrepresentation diode symbol

Mostly occurring as parasitic element in Digital ICs

Page 4: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Depletion RegionDepletion Regionhole diffusion

electron diffusion

p n

hole driftelectron drift

ChargeDensity

Distancex+

-

ElectricalxField

x

PotentialV

W2-W1

(a) Current flow.

(b) Charge density.

(c) Electric field.

(d) Electrostaticpotential.

Page 5: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Diode CurrentDiode Current

Page 6: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Models for Manual AnalysisModels for Manual Analysis

VD

ID = IS(eVD/T – 1)+

VD

+

+

–VDon

ID

(a) Ideal diode model (b) First-order diode model

Page 7: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Diode ModelDiode Model

ID

RS

CD

+

-

VD

Page 8: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

SPICE ParametersSPICE Parameters

Page 9: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

What is a Transistor?What is a Transistor?

VGS VT

RonS D

A Switch!

|VGS|

An MOS Transistor

Page 10: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The MOS TransistorThe MOS Transistor

Polysilicon Aluminum

Page 11: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

MOS Transistors -MOS Transistors -Types and SymbolsTypes and Symbols

D

S

G

D

S

G

G

S

D D

S

G

NMOS Enhancement NMOS

PMOS

Depletion

Enhancement

B

NMOS withBulk Contact

Page 12: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Threshold Voltage: ConceptThreshold Voltage: Concept

n+n+

p-substrate

DSG

B

VGS

+

-

Depletion

Region

n-channel

Page 13: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Threshold VoltageThe Threshold Voltage

Page 14: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Body EffectThe Body Effect

-2.5 -2 -1.5 -1 -0.5 00.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

0.85

0.9

VBS

(V)

VT (

V)

Page 15: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Current-Voltage RelationsCurrent-Voltage RelationsA good ol’ transistorA good ol’ transistor

QuadraticRelationship

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Resistive Saturation

VDS = VGS - VT

Page 16: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Transistor in LinearTransistor in Linear

n+n+

p-substrate

D

SG

B

VGS

xL

V(x) +–

VDS

ID

MOS transistor and its bias conditions

Page 17: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Transistor in SaturationTransistor in Saturation

n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

Pinch-off

Page 18: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Current-Voltage RelationsCurrent-Voltage RelationsLong-Channel DeviceLong-Channel Device

Page 19: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

A model for manual analysisA model for manual analysis

Page 20: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Current-Voltage RelationsCurrent-Voltage RelationsThe Deep-Submicron EraThe Deep-Submicron Era

LinearRelationship

-4

VDS (V)0 0.5 1 1.5 2 2.5

0

0.5

1

1.5

2

2.5x 10

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Early Saturation

Page 21: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Velocity SaturationVelocity Saturation

(V/µm)c = 1.5

n

(m/s

)

sat = 105

Constant mobility (slope = µ)

Constant velocity

Page 22: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

PerspectivePerspective

IDLong-channel device

Short-channel device

VDSVDSAT VGS - VT

VGS = VDD

Page 23: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

IIDD versus V versus VGSGS

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VGS (V)

I D (

A)

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VGS (V)

I D (

A)

quadratic

quadratic

linear

Long Channel Short Channel

Page 24: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

IIDD versus V versus VDSDS

-4

VDS (V)0 0.5 1 1.5 2 2.5

0

0.5

1

1.5

2

2.5x 10

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D (

A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

ResistiveSaturation

VDS = VGS - VT

Long Channel Short Channel

Page 25: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

A unified modelA unified modelfor manual analysisfor manual analysis

S D

G

B

NB For PMOS, use Vmax=max(…) instead of Vmin

Page 26: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Simple Model versus SPICE Simple Model versus SPICE

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VDS

(V)

I D (

A)

VelocitySaturated

Linear

Saturated

VDSAT=VGT

VDS=VDSAT

VDS=VGT

Page 27: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

A PMOS TransistorA PMOS Transistor

-2.5 -2 -1.5 -1 -0.5 0-1

-0.8

-0.6

-0.4

-0.2

0x 10

-4

VDS (V)

I D (

A)

Assume all variablesnegative!

VGS = -1.0V

VGS = -1.5V

VGS = -2.0V

VGS = -2.5V

Page 28: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Transistor Model Transistor Model for Manual Analysisfor Manual Analysis

Page 29: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Transistor as a SwitchThe Transistor as a Switch

VGS VT

RonS D

ID

VDS

VGS = VD D

VDD/2 VDD

R0

Rmid

ID

VDS

VGS = VD D

VDD/2 VDD

R0

Rmid

Page 30: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Transistor as a SwitchThe Transistor as a Switch

0.5 1 1.5 2 2.50

1

2

3

4

5

6

7x 10

5

VDD

(V)

Req

(O

hm)

Page 31: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Transistor as a SwitchThe Transistor as a Switch

Page 32: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Unified Model ExamplesUnified Model Examples

Page 33: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

MOS CapacitancesMOS CapacitancesDynamic BehaviorDynamic Behavior

Page 34: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Dynamic Behavior of MOS TransistorDynamic Behavior of MOS Transistor

DS

G

B

CGDCGS

CSB CDBCGB

Page 35: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

The Gate CapacitanceThe Gate Capacitance

tox

n+ n+

Cross section

L

Gate oxide

xd xd

L d

Polysilicon gate

Top view

Gate-bulkoverlap

Source

n+

Drain

n+W

Page 36: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Gate CapacitanceGate Capacitance

S D

G

CGC

S D

G

CGC

S D

G

CGC

Cut-off Resistive Saturation

Most important regions in digital design: saturation and cut-off

Page 37: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Gate CapacitanceGate Capacitance

WLCox

WLCox

2

2WLCox

3

CGC

CGCS

VDS /(VGS-VT)

CGCD

0 1

CGC

CGCS = CGCDCGC B

WLCox

WLCox

2

VGS

Capacitance as a function of VGS(with VDS = 0)

Capacitance as a function of the degree of saturation

Page 38: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Measuring the Gate CapMeasuring the Gate Cap

2 1.52 12 0.5 0

3

4

5

6

7

8

9

103 102 16

2

VGS (V)

VGS

Gate

Ca

paci

tan

ce (

F)

0.5 1 1.5 22 2

I

Page 39: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Diffusion CapacitanceDiffusion Capacitance

Bottom

Side wall

Side wallChannel

SourceND

Channel-stop implant NA1

SubstrateNA

W

xj

LS

Page 40: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Junction CapacitanceJunction Capacitance

Page 41: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Linearizing the Junction CapacitanceLinearizing the Junction Capacitance

Replace non-linear capacitance bylarge-signal equivalent linear capacitance

which displaces equal charge over voltage swing of interest

Page 42: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Capacitances in 0.25 Capacitances in 0.25 m CMOS m CMOS processprocess

Page 43: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Sub-Threshold ConductionSub-Threshold Conduction

0 0.5 1 1.5 2 2.510

-12

10-10

10-8

10-6

10-4

10-2

VGS (V)

I D (

A)

VT

Linear

Exponential

Quadratic

Typical values for S:60 .. 100 mV/decade

The Slope Factor

ox

DnkT

qV

D C

CneII

GS

1 ,~ 0

S is VGS for ID2/ID1 =10

Page 44: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Sub-Threshold Sub-Threshold IIDD vs vs VVGSGS

VDS from 0 to 0.5V

kT

qV

nkT

qV

D

DSGS

eeII 10

Page 45: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Sub-Threshold Sub-Threshold IIDD vs vs VVDSDS

DSkT

qV

nkT

qV

D VeeIIDSGS

110

VGS from 0 to 0.3V

Page 46: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Summary of MOSFET Operating Summary of MOSFET Operating RegionsRegions

Strong Inversion VGS > VT

Linear (Resistive) VDS < VDSAT

Saturated (Constant Current) VDS VDSAT

Weak Inversion (Sub-Threshold) VGS VT

Exponential in VGS with linear VDS dependence

Page 47: © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

© Digital Integrated Circuits2nd Devices

Parasitic ResistancesParasitic Resistances

W

LD

Drain

Draincontact

Polysilicon gate

DS

G

RS RD

VGS,eff