Chip v4: Measurement from room temperature down to LN2. Chip v4: MIP signal with oscilloscope...
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Transcript of Chip v4: Measurement from room temperature down to LN2. Chip v4: MIP signal with oscilloscope...
Chip v4:Measurement from room temperaturedown to LN2.
Chip v4:MIP signal with oscilloscope persistence
Experimental results of various versions chips.- First version noise is better since the shaper was external.- For the latest version, a noise reduction is obtained by coolingdown the chip at the level of the actual detector capacitance.
Chip v4:Histograms measure of the noise could be experimentally observed out of the ADC with the DAQ system [3]. The delta : 5.4mV corresponds to FWHM/2(Full width at half maximum). Since the rms Noise (σ) ~ FWHM/2.35We verify that "sqrt-integ-noise**2" maximum value : 5.32 ~5.4mV*2/2.35
Chip v4:Noise comparisonof the CSA withideal bias current (PA1^2)versus fully designed CSA (PA^2)
Version 4 configurations :•Cpa : 250 or 500fF•Rpa : 1, 2, 3 or 4MΩ•Shaping center frequency : 0.5, 1, 2 or 4 µs
Charge Sensitive Amplifier (CSA) in cold gas of Liquid Charge Sensitive Amplifier (CSA) in cold gas of Liquid Argon (LAr) Time Projection Chamber (TPC)Argon (LAr) Time Projection Chamber (TPC)
Charge Sensitive Amplifier (CSA) in cold gas of Liquid Charge Sensitive Amplifier (CSA) in cold gas of Liquid Argon (LAr) Time Projection Chamber (TPC)Argon (LAr) Time Projection Chamber (TPC)
Specifications : • Multichannel 3fC to 120fC (0.5μs pulse) Charge Sensitive Amplifier• Less than 1500 e- ENC with 250pF Detector capacitance (Signal/Noise ratio of 10)• Able to work in LAr vapours @ -150°C with an affordable power dissipation : 1mW/channel, considering a power pulsing rate of 2.5% (effective consumption : 40mW)• Low cost highly integrated solution implies an ASIC CMOS process circuit.
E.Bechetoille, H. Mathez, Y. ZoccaratoIPNL, 4 rue E. Fermi 69622 Villeurbanne, France — University Lyon 1,
CNRS/IN2P3, MICRhAu contact : e.bechetoille (at) ipnl.in2p3.fr
Noise summary[** OUT_PA-noise **]Device Param Noise Contribution % Of Total/MP34 id 0.000417014 32.85 /MN8 id 0.000292864 16.20 /MN8 fn 0.000186043 6.54 /MN180 id 0.000185096 6.47 /MN19 id 0.000155535 4.57 /MN180 fn 0.000144948 3.97 /MP36 id 0.000129472 3.17 /R1/R2 thermal_noise 0.000128369 3.11 /R1/R1 thermal_noise 0.000128365 3.11 /R27 rn 0.00012745 3.07 /MN33 id 0.000112945 2.41 /MP1 id 0.000109437 2.26 /MP2 id 0.000101267 1.94 /MN19 fn 8.17541e-05 1.26 /MP33 id 8.03967e-05 1.22 /R5 rn 7.19811e-05 0.98 /MP123 id 6.79982e-05 0.87 R6.R2.rpolyh1 thermal_noise 6.73008e-05 0.86 /MP35 id 6.48913e-05 0.80 /MP34 fn 5.46878e-05 0.56 R6.R1.rpolyh1 thermal_noise 5.10705e-05 0.49 /MN32 id 5.08948e-05 0.49 R3.R2.rpolyh1 thermal_noise 4.92785e-05 0.46 R3.R1.rpolyh1 thermal_noise 4.25442e-05 0.34 R4.R1.rpolyh1 thermal_noise 4.15188e-05 0.33 R4.R2.rpolyh1 thermal_noise 3.98648e-05 0.30 R2.R1.rpolyh1 thermal_noise 3.98639e-05 0.30 R2.R2.rpolyh1 thermal_noise 3.97519e-05 0.30 /I10/MP1 id 3.08658e-05 0.18 Integrated Noise Summary (in V) Sorted By Noise
ContributorsTotal Summarized Noise = 0.000727636Total Input Referred Noise = 0.493965
Noise
Conclusion and PerspectivesConclusion and Perspectives
4 chips comparison
•Evident difficulties of prototyping a circuit without models at low temperature (-150°C)•Improvement on the consumption at equal noise level are under study. Effort on biasing element could be profitable. •A low quiescent current buffer is under test. •Specifications fulfilled.
NSS-MIC 2010 - 2010 IEEE Nuclear Science Symposium and Medical Imaging Conference - Knoxville, Tennessee, 30 October – 6 November 2010
•Version 1 detailed in [1] has no integrated shaper. With an external shaper, noise reaches 1100 e- at -110°C.•Version 2 has a default in the amplifier of the shaper. A re-design was necessary.•Version 3: Modified CSA using Gain Boost technique[2]. Stability issue due to a bad sizing of the compensation resistance. Results : higher noise at low temperature•Version 4 is range limited because the intrinsic gain had been voluntary increased
Context
Cpa
Rpa
CD
250pF
Detector
H
τ= [0.5; 1; 2 ;4]µs
2)1()(
p
pHpH o
Charge Sensitive Amplifier
-A
shaper
buffer
500ns
Input current
500ns
CSA output Shaper output
500ns
•An investigation on the AMS 180nm will be done when the technology will be available.•A 128-channel test (4 cards of 4 chips of 8 channels) on a detector with a digital acquisition [3] system will be published rapidly.•When the design will be validated, a 32 or 64-channel chip will be submitted.
http://micrhau.in2p3.fr/
CSA Shaper Buffer
Version 1 : PA_TOP
1654µm X 1664µm=2.75mm²
Version 1 : PA_TOP
1654µm X 1664µm=2.75mm²
Version 2 : TOP_EST1974µm X 2364µm=4.66mm²
Version 2 : TOP_EST1974µm X 2364µm=4.66mm²
Version 3 : TOPPING1914µm X
2544µm=4.876mm²
Version 3 : TOPPING1914µm X
2544µm=4.876mm²Version 4 : T2K_V4
1914µm X 2684µm=5.14mm²
Version 4 : T2K_V41914µm X
2684µm=5.14mm²
Physic experiment :•A near detector (from the Hardron target) will allows physic experiments as well as electronic experiments for larger scale detectors (100 kilotonnes )
[1] CMOS Charge amplifier for liquid argon Time Projection Chamber detectors, E. Bechetoille, WOLTE08, Jena, Germany. http://hal.in2p3.fr/in2p3-00339737/[2] Feedforward compensation techniques for high-frequency CMOS amplifiers, W. Sansen, [3] MicroTCA implementation of synchronous Ethernet-Based DAQ systems for large scale experiments, C. Girerd et al. RT2009, Beijing, China. http://hal.in2p3.fr/in2p3-00394783/
1
Cpa
Rpa
H
Charge Sensitive Amplifier
-A
Shaper
buffer
1
234
5
67
2
3
4
5
6
7
1524
1584
17991915 18.1
14.0
18.9 18.6
1400
1600
1800
2000
-200 -150 -100 -50 0 50
10
12
14
16
18
20
AVERAGE ENC (e-)Gain (mV/fC)
Fully digital ‘I2C-like’ configuration protocol
Experimental application
•Application in a joint test with LHEP Bern
Cpa
Rpa
H
Charge Sensitive Amplifier
-A
Shaper
buffer
8 channels x 4 chips =32 channels per pane.3 pane in the LAr tank (vapours) one outside
32-channel