Post on 27-Jan-2021
Politecnico di Torino CAD Group – Dipartimento di Automatica e Informatica Torino - Italy
Sarah Azimi Boyang Du
Luca Sterpone
Goal ¨ Analysis of Single Event Transients (SETs) occurrency ¨ Effective SET mitigation
2
Outline ¨ SET effects on Flash-based FPGAs ¨ Single Event Transient Analysis (SETA) tool
¨ Analysis ¨ Mitigation ¨ Experimental results
¨ Conclusions and future activities
3
SET effect 4
¨ A Single Event Transient (SET) is generated by the injunction of charge collection ¨ A charged particle crosses a junction area ¨ It generates an amount of current, provoking a “glitch” ¨ SET can be indistinguishable from normal signal and
exist for notable distances
SET width SET amplitude Rise ΔV/ΔT Fall ΔV/ΔT
Circuits on Flash-based FPGAs 5
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
Flash configura/on memory FPGA array
Circuits on Flash-based FPGAs 6
Flash configura/on memory FPGA array
Configura/on process
0 1 0 0 0 0
1 0 0 0 0 0
1 1 0 0 0 0
0 0 0 0 1 0
0 1 0 1 0 0
0 0 0 0 0 0
SET scenario 7
¨ Considering a place and route design on FPGA ¨ Fixed logic cells
¨ Defined number of routing segments
Source of SET
SET scenario 8
¨ Considering a place and route design on FPGA ¨ Fixed logic cells
¨ Defined number of routing segments
Source of SET Propagation through Gates
Propagation through Routing
SET scenario 9
¨ Considering a place and route design on FPGA ¨ Fixed logic cells
¨ Defined number of routing segments
Source of SET Propagation through Gates
SET Classification
FFs / IOs
Propagation through Routing
SET Propagation through gates 10
For a 1→0→1 transi,on Δtp is defined as: Δtp = tpHL – tpLH For a 0→1→0 transi,on Δtp is defined as: Δtp = tpLH – tpHL
Fist Region: If(τn < k*tp ) then τn+1 = 0 Second Region: If (τn > (k+3)*tp) then τn+1 = τn + Δtp Third Region: If ((k+1)*tp < τn < (k+3)*tp) then τn+1 = (τn2 -‐ tp2 )/ τn + Δtp Fourth Region: If (k*tp < τn < (k+1)*tp) then τn+1 = (k+1)*tp(1 -‐ e(k – ( τn / tp )) ) + Δtp
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
[Wirth et al, NSREC 2008]
SET Propagation through gates 11
For a 1→0→1 transi,on Δtp is defined as: Δtp = tpHL – tpLH For a 0→1→0 transi,on Δtp is defined as: Δtp = tpLH – tpHL
Fist Region: If(τn < k*tp ) then τn+1 = 0 Second Region: If (τn > (k+3)*tp) then τn+1 = τn + Δtp Third Region: If ((k+1)*tp < τn < (k+3)*tp) then τn+1 = (τn2 -‐ tp2 )/ τn + Δtp Fourth Region: If (k*tp < τn < (k+1)*tp) then τn+1 = (k+1)*tp(1 -‐ e(k – ( τn / tp )) ) + Δtp
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V
[Wirth et al, NSREC 2008]
SET Propagation through routing 12
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V
[Sterpone et al, RADECS 2014]
SET Propagation through routing 13
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V
[Sterpone et al, RADECS 2014]
Propagation Induced Pulse Broadening
SET Propagation through routing 14
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V
[Sterpone et al, RADECS 2014]
Propagation Induced Pulse Broadening
Gate to Gate Characterization
SET Propagation through routing 15
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V
[Sterpone et al, RADECS 2014]
V
Propagation Induced Pulse Broadening
Gate to Gate Characterization
SET classification on FFs and IOs 16
¨ A tool has been developed: ¨ Single Event Transient Analyzer (SETA)
HDL
Synthesis and Implementation
(Place and Route)
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
IO/FF expected Pulses
SETA Tool
SETA tool 17
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Gate PIPB Characterization
SETA tool 18
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection
Gate PIPB Characterization
SETA tool 19
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
Gate PIPB Characterization
SETA tool 20
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
Gate PIPB Characterization
SETA tool 21
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
Gate PIPB Characterization
SETA tool 22
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
Propagation is performed up to “terminal” nodes
(IOs / FFs)
Gate PIPB Characterization
SETA tool 23
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
SET classification on FFs or IOs
Gate PIPB Characterization
SETA tool 24
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V
Netlist
Constraints
Physical Design Description (PDD)
Sensitive nodes selection SET propagation
SET classification on FFs or IOs
V
Gate PIPB Characterization
SET classification on FFs and IOs 25
¨ The classification identifies the number of SET: ¨ Totally filtered
¨ Partially filtered ¨ Equally propagated ¨ Broadened
SETA results – EUCLID project (WP1) 26
0"5000"10000"15000"20000"25000"30000"35000"40000"45000"
0,1"ns" 0,3"ns" 0,45"ns" 0,7"ns" 1"ns" 1,5"ns" 2,0"ns" 2,5"ns" 3,0"ns" 4,0"ns"
Combina2onal"Path"7"Single"Event"Transient"sensi2vity"
Filtered" Par2ally"Filtered" Equal" Broadened"
!
SETA results – EUCLID project (WP1) 27
0"5000"10000"15000"20000"25000"30000"35000"40000"45000"
0,1"ns" 0,3"ns" 0,45"ns" 0,7"ns" 1"ns" 1,5"ns" 2,0"ns" 2,5"ns" 3,0"ns" 4,0"ns"
Combina2onal"Path"7"Single"Event"Transient"sensi2vity"
Filtered" Par2ally"Filtered" Equal" Broadened"
!Total number of analyzed SET
Type of SET per injected pulse
SET: mitigation 28
¨ Selective guard gate (GG) mapper ¨ Inserting a GG logic structure in the input of the
selected FF
[Sterpone and Du, IEEE ETS 2014]
SET: mitigation solution 1 29
¨ Selective guard gate (GG) mapper ¨ Inserting a GG logic structure in the input of the
selected FF
[Sterpone and Du, IEEE ETS 2014]
Filtering estimated on the basis of the SETA
report
SET: mitigation solution 2 30
¨ Accurate placement acting on the critical paths ¨ Distance between gates is modified in order to
maximize the electrical filtering effect
[Sterpone and Du, IEEE ETS 2014]
SET: mitigation solution 2 31
¨ Accurate placement acting on the critical paths ¨ Distance between gates is modified in order to
maximize the electrical filtering effect
[Sterpone and Du, IEEE ETS 2014]
SET: mitigation solution 2 32
¨ Accurate placement acting on the critical paths ¨ Distance between gates is modified in order to
maximize the electrical filtering effect
[Sterpone and Du, IEEE ETS 2014]
SET: mitigation results 33
Different place and route constraints
Average SET sensitivity
SET: mitigation results 34
Different place and route constraints
Average SET sensitivity
Original RISC circuit
Post SETA RISC circuit
SET: mitigation results 35
Different place and route constraints
Average SET sensitivity
Effective mitigation of SET
SET: mitigation radiation test results ¨ Heavy ions test performed at the Cyclotron of the
Université Catholique de Louvain (UCL) ¨ Kripton ion with a fluence of 3.04E8 (particles) ¨ Average flux 1E4 (particles/sec) ¨ RISC working frequency of 20MHz on ProASIC3
A3P250 RISC processor version SEE Cross-section
[MeV cm2/mg]
Unhardened 1.45E-9
Full TMR + GG 6.37E-10
Our Approach 3.12E-12
36
SET: in conclusion… 37
¨ SETA tools are available ¨ Effective analysis of SET propagation
¨ Effective overall SET mitigation
SET: in conclusion… 38
¨ SETA tools are available ¨ Effective analysis of SET propagation
¨ Effective overall SET mitigation
SET: in conclusion… 39
¨ SETA tools are available ¨ Effective analysis of SET propagation
¨ Effective overall SET mitigation
SET: in conclusion… 40
¨ SETA tools are available ¨ Effective analysis of SET propagation
¨ Effective overall SET mitigation
Source of SET Propagation through gates Propagation through routing SET classification on FFs or IOs
V V V
X
Physical Design Description 41
¨ The circuit is modeled as a graph ¨ Cell functionality
¨ Routing model
AND
OR INV
SET generation phenomena 42
¨ Particle hitting a sensitive node ¨ Generate a SET pulse
¨ Propagates through the logic
AND
OR INV
SET generation phenomena 43
[Azimi and Sterpone, IEEE DDECS 2016] [Azimi, Du, Sterpone, Micro Rel, 2015]
¨ SET generation is related to ¨ Linear Energy Transfer (LET) ¨ VersaTile architecture ¨ Technology
Why SET generation ? ¨ The type of source SET is mandatory to understand
the exact type of propagation ¨ Mitigation GG insertion is related to SET length
¨ It is necessary to establish the absolute SET count ¨ Calculation of the realistic IOs/FFs error rate for
the whole space mission duration
44
Why SET generation ? 45
0"5000"10000"15000"20000"25000"30000"35000"40000"45000"
0,1"ns" 0,3"ns" 0,45"ns" 0,7"ns" 1"ns" 1,5"ns" 2,0"ns" 2,5"ns" 3,0"ns" 4,0"ns"
Combina2onal"Path"7"Single"Event"Transient"sensi2vity"
Filtered" Par2ally"Filtered" Equal" Broadened"
!
Identification of source SET length 46
0"5000"10000"15000"20000"25000"30000"35000"40000"45000"
0,1"ns" 0,3"ns" 0,45"ns" 0,7"ns" 1"ns" 1,5"ns" 2,0"ns" 2,5"ns" 3,0"ns" 4,0"ns"
Combina2onal"Path"7"Single"Event"Transient"sensi2vity"
Filtered" Par2ally"Filtered" Equal" Broadened"
!Effective source SET designer must care
Identification of effective SET counts 47
0"5000"10000"15000"20000"25000"30000"35000"40000"45000"
0,1"ns" 0,3"ns" 0,45"ns" 0,7"ns" 1"ns" 1,5"ns" 2,0"ns" 2,5"ns" 3,0"ns" 4,0"ns"
Combina2onal"Path"7"Single"Event"Transient"sensi2vity"
Filtered" Par2ally"Filtered" Equal" Broadened"
!Effective source SET designer must care
Effective SET counts
Thank you! ¨ luca.sterpone@polito.it
48